Re: [PATCH 5/6] drm/xe/vf: Cache value of the GMDID register

[Matt Roper <matthew.d.roper@intel.com>]

On Thu, May 23, 2024 at 09:22:39PM +0200, Michal Wajdeczko wrote:
> Read and cache value of the GMDID register as part of the config
> query that VF driver is doing over MMIO.
> 
> While the VF driver likely already obtained the value of the GMDID
> register once during the early driver probe, we couldn't cache it
> then as the GT structures were not ready yet.
> 
> Cache it now, in case the driver needs it later when the GuC MMIO
> communication, required to query GMDID from GuC, could be no longer
> desired as it will be replaced by the CTB communication.
> 
> While around, assert that we will query GMDID only when applicable.
> 
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>

> ---
>  drivers/gpu/drm/xe/xe_gt_sriov_vf.c       | 17 +++++++++++++++++
>  drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h |  2 ++
>  2 files changed, 19 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
> index 5b8771f831f7..347ab7060588 100644
> --- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c
> @@ -284,6 +284,11 @@ static int guc_action_query_single_klv64(struct xe_guc *guc, u32 key, u64 *value
>  	return 0;
>  }
>  
> +static bool has_gmdid(struct xe_device *xe)
> +{
> +	return GRAPHICS_VERx100(xe) >= 1270;
> +}
> +
>  /**
>   * xe_gt_sriov_vf_gmdid - Query GMDID over MMIO.
>   * @gt: the &xe_gt
> @@ -300,6 +305,7 @@ u32 xe_gt_sriov_vf_gmdid(struct xe_gt *gt)
>  	int err;
>  
>  	xe_gt_assert(gt, IS_SRIOV_VF(gt_to_xe(gt)));
> +	xe_gt_assert(gt, !GRAPHICS_VERx100(gt_to_xe(gt)) || has_gmdid(gt_to_xe(gt)));
>  	xe_gt_assert(gt, gt->sriov.vf.guc_version.major > 1 || gt->sriov.vf.guc_version.minor >= 2);
>  
>  	err = guc_action_query_single_klv32(guc, GUC_KLV_GLOBAL_CFG_GMD_ID_KEY, &value);
> @@ -409,6 +415,14 @@ static int vf_get_submission_cfg(struct xe_gt *gt)
>  	return config->num_ctxs ? 0 : -ENODATA;
>  }
>  
> +static void vf_cache_gmdid(struct xe_gt *gt)
> +{
> +	xe_gt_assert(gt, has_gmdid(gt_to_xe(gt)));
> +	xe_gt_assert(gt, IS_SRIOV_VF(gt_to_xe(gt)));
> +
> +	gt->sriov.vf.runtime.gmdid = xe_gt_sriov_vf_gmdid(gt);
> +}
> +
>  /**
>   * xe_gt_sriov_vf_query_config - Query SR-IOV config data over MMIO.
>   * @gt: the &xe_gt
> @@ -436,6 +450,9 @@ int xe_gt_sriov_vf_query_config(struct xe_gt *gt)
>  	if (unlikely(err))
>  		return err;
>  
> +	if (has_gmdid(xe))
> +		vf_cache_gmdid(gt);
> +
>  	return 0;
>  }
>  
> diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h b/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
> index 519492f4b7d0..a57f13b5afcd 100644
> --- a/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
> +++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf_types.h
> @@ -52,6 +52,8 @@ struct xe_gt_sriov_vf_selfconfig {
>   * struct xe_gt_sriov_vf_runtime - VF runtime data.
>   */
>  struct xe_gt_sriov_vf_runtime {
> +	/** @gmdid: cached value of the GDMID register. */
> +	u32 gmdid;
>  	/** @regs_size: size of runtime register array. */
>  	u32 regs_size;
>  	/** @num_regs: number of runtime registers in the array. */
> -- 
> 2.43.0
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation