From: Matthew Brost <matthew.brost@intel.com>
To: intel-xe@lists.freedesktop.org
Subject: [PATCH v5 02/10] drm/xe: Add MI_COPY_MEM_MEM GPU instruction definitions
Date: Mon, 10 Jun 2024 07:18:15 -0700 [thread overview]
Message-ID: <20240610141823.2605496-3-matthew.brost@intel.com> (raw)
In-Reply-To: <20240610141823.2605496-1-matthew.brost@intel.com>
MI_COPY_MEM_MEM GPU instructions are used to copy ctx timestamp from a
LRC registers to another location at the beginning of every jobs
execution. Add MI_COPY_MEM_MEM GPU instruction definitions.
v2:
- Include MI_COPY_MEM_MEM based on instruction order (Michal)
- Fix tabs/spaces issue (Michal)
- Use macro for DW definition (Michal)
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/instructions/xe_mi_commands.h | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/xe/instructions/xe_mi_commands.h b/drivers/gpu/drm/xe/instructions/xe_mi_commands.h
index c74ceb550dce..b7bf99dd4848 100644
--- a/drivers/gpu/drm/xe/instructions/xe_mi_commands.h
+++ b/drivers/gpu/drm/xe/instructions/xe_mi_commands.h
@@ -59,6 +59,10 @@
#define MI_LOAD_REGISTER_MEM (__MI_INSTR(0x29) | XE_INSTR_NUM_DW(4))
#define MI_LRM_USE_GGTT REG_BIT(22)
+#define MI_COPY_MEM_MEM (__MI_INSTR(0x2e) | XE_INSTR_NUM_DW(5))
+#define MI_COPY_MEM_MEM_SRC_GGTT REG_BIT(22)
+#define MI_COPY_MEM_MEM_DST_GGTT REG_BIT(21)
+
#define MI_BATCH_BUFFER_START __MI_INSTR(0x31)
#endif
--
2.34.1
next prev parent reply other threads:[~2024-06-10 14:18 UTC|newest]
Thread overview: 37+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-06-10 14:18 [PATCH v5 00/10] Only timeout jobs if they run longer than timeout period Matthew Brost
2024-06-10 14:18 ` [PATCH v5 01/10] drm/xe: Add LRC ctx timestamp support functions Matthew Brost
2024-06-10 17:32 ` Cavitt, Jonathan
2024-06-10 14:18 ` Matthew Brost [this message]
2024-06-10 16:39 ` [PATCH v5 02/10] drm/xe: Add MI_COPY_MEM_MEM GPU instruction definitions Cavitt, Jonathan
2024-06-10 14:18 ` [PATCH v5 03/10] drm/xe: Emit ctx timestamp copy in ring ops Matthew Brost
2024-06-10 14:44 ` Cavitt, Jonathan
2024-06-10 14:18 ` [PATCH v5 04/10] drm/xe: Add ctx timestamp to LRC snapshot Matthew Brost
2024-06-10 16:40 ` Cavitt, Jonathan
2024-06-10 14:18 ` [PATCH v5 05/10] drm/xe: Add xe_gt_clock_interval_to_ms helper Matthew Brost
2024-06-10 16:34 ` Cavitt, Jonathan
2024-06-12 12:09 ` Ghimiray, Himal Prasad
2024-06-10 14:18 ` [PATCH v5 06/10] drm/xe: Improve unexpected state error messages Matthew Brost
2024-06-10 16:36 ` Cavitt, Jonathan
2024-06-10 16:45 ` Michal Wajdeczko
2024-06-10 17:09 ` Matthew Brost
2024-06-11 0:09 ` John Harrison
2024-06-11 1:43 ` Matthew Brost
2024-06-10 14:18 ` [PATCH v5 07/10] drm/xe: Add GuC state asserts to deregister_exec_queue Matthew Brost
2024-06-10 17:12 ` Cavitt, Jonathan
2024-06-10 14:18 ` [PATCH v5 08/10] drm/xe: Add pending disable assert to handle_sched_done Matthew Brost
2024-06-10 16:35 ` Cavitt, Jonathan
2024-06-10 14:18 ` [PATCH v5 09/10] drm/xe: Add killed, banned, or wedged as stick bit during GuC reset Matthew Brost
2024-06-10 16:35 ` Cavitt, Jonathan
2024-06-10 14:18 ` [PATCH v5 10/10] drm/xe: Sample ctx timestamp to determine if jobs have timed out Matthew Brost
2024-06-10 19:32 ` Cavitt, Jonathan
2024-06-10 20:12 ` Matthew Brost
2024-06-11 0:36 ` John Harrison
2024-06-11 1:35 ` Matthew Brost
2024-06-12 4:21 ` Zbigniew Kempczyński
2024-06-10 14:23 ` ✓ CI.Patch_applied: success for Only timeout jobs if they run longer than timeout period Patchwork
2024-06-10 14:23 ` ✗ CI.checkpatch: warning " Patchwork
2024-06-10 14:24 ` ✓ CI.KUnit: success " Patchwork
2024-06-10 14:36 ` ✓ CI.Build: " Patchwork
2024-06-10 14:38 ` ✗ CI.Hooks: failure " Patchwork
2024-06-10 14:39 ` ✓ CI.checksparse: success " Patchwork
2024-06-10 15:16 ` ✓ CI.BAT: " Patchwork
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