[RFC 5/7] drm/intel/guc: Add new KLV definitions

[Michal Wajdeczko <michal.wajdeczko@intel.com>]

Some KLVs were not used by the Xe driver, but are used by the i915.
Add scheduling policy update key and another workaround key.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
---
 drivers/gpu/drm/intel/guc/abi/guc_klvs_abi.h | 8 ++++++++
 1 file changed, 8 insertions(+)

diff --git a/drivers/gpu/drm/intel/guc/abi/guc_klvs_abi.h b/drivers/gpu/drm/intel/guc/abi/guc_klvs_abi.h
index 191995e4cb1d..e6dcd8346ac2 100644
--- a/drivers/gpu/drm/intel/guc/abi/guc_klvs_abi.h
+++ b/drivers/gpu/drm/intel/guc/abi/guc_klvs_abi.h
@@ -111,6 +111,13 @@
 #define GUC_KLV_SELF_CFG_G2H_CTB_SIZE_KEY		0x0907
 #define GUC_KLV_SELF_CFG_G2H_CTB_SIZE_LEN		1u
 
+/*
+ * Global scheduling policy update keys.
+ */
+enum {
+	GUC_SCHEDULING_POLICIES_KLV_ID_RENDER_COMPUTE_YIELD	= 0x1001,
+};
+
 /*
  * Per context scheduling policy update keys.
  */
@@ -347,6 +354,7 @@ enum  {
  * Workaround keys:
  */
 enum xe_guc_klv_ids {
+	GUC_WORKAROUND_KLV_SERIALIZED_RA_MODE						= 0x9001,
 	GUC_WORKAROUND_KLV_BLOCK_INTERRUPTS_WHEN_MGSR_BLOCKED				= 0x9002,
 	GUC_WORKAROUND_KLV_ID_GAM_PFQ_SHADOW_TAIL_POLLING				= 0x9005,
 	GUC_WORKAROUND_KLV_ID_DISABLE_MTP_DURING_ASYNC_COMPUTE				= 0x9007,
-- 
2.43.0