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From: Alexander Usyskin <alexander.usyskin@intel.com>
To: "Mark Brown" <broonie@kernel.org>,
	"Lucas De Marchi" <lucas.demarchi@intel.com>,
	"Oded Gabbay" <ogabbay@kernel.org>,
	"Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
	"Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
	"Maxime Ripard" <mripard@kernel.org>,
	"Thomas Zimmermann" <tzimmermann@suse.de>,
	"David Airlie" <airlied@gmail.com>,
	"Daniel Vetter" <daniel@ffwll.ch>,
	"Jani Nikula" <jani.nikula@linux.intel.com>,
	"Joonas Lahtinen" <joonas.lahtinen@linux.intel.com>,
	"Rodrigo Vivi" <rodrigo.vivi@intel.com>,
	"Tvrtko Ursulin" <tursulin@ursulin.net>
Cc: Tomas Winkler <tomas.winkler@intel.com>,
	Alexander Usyskin <alexander.usyskin@intel.com>,
	Vitaly Lubart <vitaly.lubart@intel.com>,
	intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org,
	linux-spi@vger.kernel.org, intel-gfx@lists.freedesktop.org
Subject: [PATCH v6 05/12] spi: intel-dg: implement mtd access handlers
Date: Mon, 16 Sep 2024 16:49:21 +0300	[thread overview]
Message-ID: <20240916134928.3654054-6-alexander.usyskin@intel.com> (raw)
In-Reply-To: <20240916134928.3654054-1-alexander.usyskin@intel.com>

From: Tomas Winkler <tomas.winkler@intel.com>

Implement mtd read, erase, and write handlers.
For erase operation address and size should be 4K aligned.
For write operation address and size has to be 4bytes aligned.

CC: Rodrigo Vivi <rodrigo.vivi@intel.com>
CC: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Signed-off-by: Vitaly Lubart <vitaly.lubart@intel.com>
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
---
 drivers/spi/spi-intel-dg.c | 152 +++++++++++++++++++++++++++++++++++--
 1 file changed, 147 insertions(+), 5 deletions(-)

diff --git a/drivers/spi/spi-intel-dg.c b/drivers/spi/spi-intel-dg.c
index a936014f1a76..dfb457c43a5d 100644
--- a/drivers/spi/spi-intel-dg.c
+++ b/drivers/spi/spi-intel-dg.c
@@ -174,7 +174,6 @@ static int intel_dg_spi_is_valid(struct intel_dg_spi *spi)
 	return 0;
 }
 
-__maybe_unused
 static unsigned int spi_get_region(const struct intel_dg_spi *spi, loff_t from)
 {
 	unsigned int i;
@@ -206,7 +205,6 @@ static ssize_t spi_rewrite_partial(struct intel_dg_spi *spi, loff_t to,
 	return len;
 }
 
-__maybe_unused
 static ssize_t spi_write(struct intel_dg_spi *spi, u8 region,
 			 loff_t to, size_t len, const unsigned char *buf)
 {
@@ -265,7 +263,6 @@ static ssize_t spi_write(struct intel_dg_spi *spi, u8 region,
 	return len;
 }
 
-__maybe_unused
 static ssize_t spi_read(struct intel_dg_spi *spi, u8 region,
 			loff_t from, size_t len, unsigned char *buf)
 {
@@ -324,7 +321,6 @@ static ssize_t spi_read(struct intel_dg_spi *spi, u8 region,
 	return len;
 }
 
-__maybe_unused
 static ssize_t
 spi_erase(struct intel_dg_spi *spi, u8 region, loff_t from, u64 len, u64 *fail_addr)
 {
@@ -413,18 +409,164 @@ static int intel_dg_spi_init(struct intel_dg_spi *spi, struct device *device)
 
 static int intel_dg_spi_erase(struct mtd_info *mtd, struct erase_info *info)
 {
-	return 0;
+	struct intel_dg_spi *spi;
+	unsigned int idx;
+	u8 region;
+	u64 addr;
+	ssize_t bytes;
+	loff_t from;
+	size_t len;
+	size_t total_len;
+	int ret = 0;
+
+	if (!mtd || !info)
+		return -EINVAL;
+
+	spi = mtd->priv;
+	if (WARN_ON(!spi))
+		return -EINVAL;
+
+	if (!IS_ALIGNED(info->addr, SZ_4K) || !IS_ALIGNED(info->len, SZ_4K)) {
+		dev_err(&mtd->dev, "unaligned erase %llx %llx\n",
+			info->addr, info->len);
+		info->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
+		return -EINVAL;
+	}
+
+	total_len = info->len;
+	addr = info->addr;
+
+	mutex_lock(&spi->lock);
+
+	while (total_len > 0) {
+		if (!IS_ALIGNED(addr, SZ_4K) || !IS_ALIGNED(total_len, SZ_4K)) {
+			dev_err(&mtd->dev, "unaligned erase %llx %zx\n", addr, total_len);
+			info->fail_addr = addr;
+			ret = -ERANGE;
+			goto out;
+		}
+
+		idx = spi_get_region(spi, addr);
+		if (idx >= spi->nregions) {
+			dev_err(&mtd->dev, "out of range");
+			info->fail_addr = MTD_FAIL_ADDR_UNKNOWN;
+			ret = -ERANGE;
+			goto out;
+		}
+
+		from = addr - spi->regions[idx].offset;
+		region = spi->regions[idx].id;
+		len = total_len;
+		if (len > spi->regions[idx].size - from)
+			len = spi->regions[idx].size - from;
+
+		dev_dbg(&mtd->dev, "erasing region[%d] %s from %llx len %zx\n",
+			region, spi->regions[idx].name, from, len);
+
+		bytes = spi_erase(spi, region, from, len, &info->fail_addr);
+		if (bytes < 0) {
+			dev_dbg(&mtd->dev, "erase failed with %zd\n", bytes);
+			info->fail_addr += spi->regions[idx].offset;
+			ret = bytes;
+			goto out;
+		}
+
+		addr += len;
+		total_len -= len;
+	}
+
+out:
+	mutex_unlock(&spi->lock);
+	return ret;
 }
 
 static int intel_dg_spi_read(struct mtd_info *mtd, loff_t from, size_t len,
 			     size_t *retlen, u_char *buf)
 {
+	struct intel_dg_spi *spi;
+	ssize_t ret;
+	unsigned int idx;
+	u8 region;
+
+	if (!mtd)
+		return -EINVAL;
+
+	spi = mtd->priv;
+	if (WARN_ON(!spi))
+		return -EINVAL;
+
+	idx = spi_get_region(spi, from);
+
+	dev_dbg(&mtd->dev, "reading region[%d] %s from %lld len %zd\n",
+		spi->regions[idx].id, spi->regions[idx].name, from, len);
+
+	if (idx >= spi->nregions) {
+		dev_err(&mtd->dev, "out of ragnge");
+		return -ERANGE;
+	}
+
+	from -= spi->regions[idx].offset;
+	region = spi->regions[idx].id;
+	if (len > spi->regions[idx].size - from)
+		len = spi->regions[idx].size - from;
+
+	mutex_lock(&spi->lock);
+
+	ret = spi_read(spi, region, from, len, buf);
+	if (ret < 0) {
+		dev_dbg(&mtd->dev, "read failed with %zd\n", ret);
+		mutex_unlock(&spi->lock);
+		return ret;
+	}
+
+	*retlen = ret;
+
+	mutex_unlock(&spi->lock);
 	return 0;
 }
 
 static int intel_dg_spi_write(struct mtd_info *mtd, loff_t to, size_t len,
 			      size_t *retlen, const u_char *buf)
 {
+	struct intel_dg_spi *spi;
+	ssize_t ret;
+	unsigned int idx;
+	u8 region;
+
+	if (!mtd)
+		return -EINVAL;
+
+	spi = mtd->priv;
+	if (WARN_ON(!spi))
+		return -EINVAL;
+
+	idx = spi_get_region(spi, to);
+
+	dev_dbg(&mtd->dev, "writing region[%d] %s to %lld len %zd\n",
+		spi->regions[idx].id, spi->regions[idx].name, to, len);
+
+	if (idx >= spi->nregions) {
+		dev_err(&mtd->dev, "out of range");
+		return -ERANGE;
+	}
+
+	to -= spi->regions[idx].offset;
+	region = spi->regions[idx].id;
+	if (len > spi->regions[idx].size - to)
+		len = spi->regions[idx].size - to;
+
+	mutex_lock(&spi->lock);
+
+	ret = spi_write(spi, region, to, len, buf);
+	if (ret < 0) {
+		dev_dbg(&mtd->dev, "write failed with %zd\n", ret);
+		mutex_unlock(&spi->lock);
+		return ret;
+	}
+
+	*retlen = ret;
+
+	mutex_unlock(&spi->lock);
 	return 0;
 }
 
-- 
2.34.1


  parent reply	other threads:[~2024-09-16 13:57 UTC|newest]

Thread overview: 42+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-09-16 13:49 [PATCH v6 00/12] spi: add driver for Intel discrete graphics Alexander Usyskin
2024-09-16 13:49 ` [PATCH v6 01/12] spi: add driver for intel graphics on-die spi device Alexander Usyskin
2024-09-18 13:33   ` Mark Brown
2024-09-19  9:54     ` Winkler, Tomas
2024-09-19 10:32       ` Mark Brown
2024-09-21 13:00         ` Winkler, Tomas
2024-09-23  8:02           ` Tvrtko Ursulin
2024-09-23 12:49           ` Mark Brown
2024-09-25 12:31             ` Usyskin, Alexander
2024-09-25 13:12               ` Mark Brown
2024-09-16 13:49 ` [PATCH v6 02/12] spi: intel-dg: implement region enumeration Alexander Usyskin
2024-09-18 13:35   ` Mark Brown
2024-09-19  9:55     ` Winkler, Tomas
2024-09-19 10:34       ` Mark Brown
2024-09-16 13:49 ` [PATCH v6 03/12] spi: intel-dg: implement spi access functions Alexander Usyskin
2024-09-16 13:49 ` [PATCH v6 04/12] spi: intel-dg: spi register with mtd Alexander Usyskin
2024-09-18 13:38   ` Mark Brown
2024-09-19 10:01     ` Winkler, Tomas
2024-09-19 10:43       ` Mark Brown
2024-09-16 13:49 ` Alexander Usyskin [this message]
2024-09-16 13:49 ` [PATCH v6 06/12] spi: intel-dg: align 64bit read and write Alexander Usyskin
2024-09-16 13:49 ` [PATCH v6 07/12] spi: intel-dg: wake card on operations Alexander Usyskin
2024-09-16 18:00   ` Rodrigo Vivi
2024-09-16 13:49 ` [PATCH v6 08/12] drm/i915/spi: add spi device for discrete graphics Alexander Usyskin
2024-09-23  8:31   ` Jani Nikula
2024-09-23 11:33     ` Usyskin, Alexander
2024-09-16 13:49 ` [PATCH v6 09/12] drm/i915/spi: add intel_spi_region map Alexander Usyskin
2024-09-16 13:49 ` [PATCH v6 10/12] drm/i915/spi: add support for access mode Alexander Usyskin
2024-09-16 13:49 ` [PATCH v6 11/12] drm/xe/spi: add on-die spi device Alexander Usyskin
2024-09-16 18:04   ` Rodrigo Vivi
2024-09-16 13:49 ` [PATCH v6 12/12] drm/xe/spi: add support for access mode Alexander Usyskin
2024-09-16 14:05 ` ✓ CI.Patch_applied: success for spi: add driver for Intel discrete graphics (rev5) Patchwork
2024-09-16 14:05 ` ✗ CI.checkpatch: warning " Patchwork
2024-09-16 14:06 ` ✓ CI.KUnit: success " Patchwork
2024-09-16 14:18 ` ✓ CI.Build: " Patchwork
2024-09-16 14:20 ` ✓ CI.Hooks: " Patchwork
2024-09-16 14:22 ` ✗ CI.checksparse: warning " Patchwork
2024-09-16 14:49 ` ✓ CI.BAT: success " Patchwork
2024-09-16 17:36 ` ✓ CI.FULL: " Patchwork
2024-09-18 13:45 ` [PATCH v6 00/12] spi: add driver for Intel discrete graphics Mark Brown
2024-09-19  6:56   ` Usyskin, Alexander
2024-09-19  8:31     ` Mark Brown

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