From: Matt Roper <matthew.d.roper@intel.com>
To: Suraj Kandpal <suraj.kandpal@intel.com>
Cc: <intel-xe@lists.freedesktop.org>,
<intel-gfx@lists.freedesktop.org>, <ankit.k.nautiyal@intel.com>
Subject: Re: [PATCH 2/3] drm/i915/psr: Change psr size limits check
Date: Mon, 28 Oct 2024 14:11:10 -0700 [thread overview]
Message-ID: <20241028211110.GV4891@mdroper-desk1.amr.corp.intel.com> (raw)
In-Reply-To: <20241028074333.182041-3-suraj.kandpal@intel.com>
On Mon, Oct 28, 2024 at 01:13:32PM +0530, Suraj Kandpal wrote:
> Change the check to only check for psr size limits till Pre-Xe2
> since after that the psr size is equal to maximum pipe size anyways.
>
> --v2
> -Check only size limit until pre-Xe2 [Matt]
This will skip setting the limits (leaving them as 0), but I think the
important thing is actually to avoid the check against these values
farther down:
if (!crtc_state->enable_psr2_sel_fetch &&
(crtc_hdisplay > psr_max_h || crtc_vdisplay > psr_max_v)) {
You can add another condition to that to make it only apply to pre-Xe2,
or you could probably change the assignments here to something like
if (DISPLAY_VER(display) >= 20) {
/* There are no PSR-specific resolution limits */
psr_max_h = INT_MAX;
psr_max_v = INT_MAX;
max_bpp = 30;
} else if (DISPLAY_VER(display) >= 12) {
...
which will make the condition always pass on these platforms.
Matt
>
> Bspec: 69885, 68858
> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com>
> ---
> drivers/gpu/drm/i915/display/intel_psr.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c
> index 4176163ec19a..7bc64eae9c8e 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1453,11 +1453,11 @@ static bool intel_psr2_config_valid(struct intel_dp *intel_dp,
> return false;
> }
>
> - if (DISPLAY_VER(display) >= 12) {
> + if (IS_DISPLAY_VER(display, 12, 14)) {
> psr_max_h = 5120;
> psr_max_v = 3200;
> max_bpp = 30;
> - } else if (DISPLAY_VER(display) >= 10) {
> + } else if (IS_DISPLAY_VER(display, 10, 11)) {
> psr_max_h = 4096;
> psr_max_v = 2304;
> max_bpp = 24;
> --
> 2.34.1
>
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
next prev parent reply other threads:[~2024-10-28 21:11 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-10-28 7:43 [PATCH 0/5] Add 6k resolution support for a single CRTC Suraj Kandpal
2024-10-28 7:43 ` [PATCH 1/3] drm/i915/xe3lpd: Increase resolution for plane to support 6k Suraj Kandpal
2024-10-28 7:43 ` [PATCH 2/3] drm/i915/psr: Change psr size limits check Suraj Kandpal
2024-10-28 12:44 ` Nautiyal, Ankit K
2024-10-28 12:54 ` Nautiyal, Ankit K
2024-10-28 13:00 ` Suraj Kandpal
2024-10-28 21:11 ` Matt Roper [this message]
2024-10-28 7:43 ` [PATCH 3/3] drm/i914/xe3lpd: Increase bigjoiner limitations Suraj Kandpal
2024-10-28 15:00 ` ✓ CI.Patch_applied: success for Add 6k resolution support for a single CRTC (rev5) Patchwork
2024-10-28 15:00 ` ✓ CI.checkpatch: " Patchwork
2024-10-28 15:02 ` ✓ CI.KUnit: " Patchwork
2024-10-28 15:20 ` ✓ CI.Build: " Patchwork
2024-10-28 15:23 ` ✓ CI.Hooks: " Patchwork
2024-10-28 15:24 ` ✗ CI.checksparse: warning " Patchwork
2024-10-28 16:09 ` ✓ CI.BAT: success " Patchwork
2024-10-28 17:19 ` ✗ CI.FULL: failure " Patchwork
2024-10-29 11:51 ` Patchwork
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