From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7FF8AD597AA for ; Tue, 12 Nov 2024 22:01:00 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4988C10E673; Tue, 12 Nov 2024 22:01:00 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="POQ48Spi"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.17]) by gabe.freedesktop.org (Postfix) with ESMTPS id 75CF810E670 for ; Tue, 12 Nov 2024 22:00:56 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1731448857; x=1762984857; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=Qn4UOt4lnhlyxqpnNeoSHjtuBp8KofrMPOH2kV3mcwg=; b=POQ48SpiaNjpyUoEmLKCiSilpoc2X4H1xZOBDTzjYeU1QzrBe7JFYj0L rgemuTlPCF/0RA/cjxMbx9KwozPPh1fronf6RiKUQfF2d7/NNQm7KDBPO lbuiso8FTGMYK/rFlCPoX2YYB/xCdcQ4KJKT+1iqpiBRILE9UREUsJUxb m0ZJ+uuN6n7f+03sQa1DnnKYk3baH9cASLjdWje5muO6r4TJgCEUN2rdD mI3HD3iCBKHkjdBRDeB+ttJZ/Jwz/LqjW3Cwsz4rdgfU0qFrBOm+IfxsM UebAahCHWJBRTufBh5KIvDQKNCDPyaewz+YPw6Na5R+3L7K2x31xcLTae A==; X-CSE-ConnectionGUID: +2/SXG3sTza0JYAyAhlMYQ== X-CSE-MsgGUID: 95CIA7sQQPCoSsQCz+X7mw== X-IronPort-AV: E=McAfee;i="6700,10204,11254"; a="31403995" X-IronPort-AV: E=Sophos;i="6.12,149,1728975600"; d="scan'208";a="31403995" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by orvoesa109.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Nov 2024 14:00:57 -0800 X-CSE-ConnectionGUID: 7AZyhs9OSVm1D3pB93GGKg== X-CSE-MsgGUID: J1Wc/FguSTmp6xPCDjDaAA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.12,149,1728975600"; d="scan'208";a="118605698" Received: from lstrano-desk.jf.intel.com ([10.54.39.91]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 12 Nov 2024 14:00:56 -0800 From: Matthew Brost To: intel-xe@lists.freedesktop.org Subject: [PATCH v3 3/7] drm/xe: Add ring start to LRC snapshot Date: Tue, 12 Nov 2024 14:01:23 -0800 Message-Id: <20241112220127.1369527-4-matthew.brost@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20241112220127.1369527-1-matthew.brost@intel.com> References: <20241112220127.1369527-1-matthew.brost@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" Add LRC ring start register to LRC snapshot to verify no LRC register corruption upon hang. This could be possible if the indirect ring state was mapped to user space or via an internal KMD memory corruption. Signed-off-by: Matthew Brost Reviewed-by: Jonathan Cavitt --- drivers/gpu/drm/xe/xe_lrc.c | 10 ++++++++++ drivers/gpu/drm/xe/xe_lrc.h | 1 + 2 files changed, 11 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_lrc.c b/drivers/gpu/drm/xe/xe_lrc.c index cc77e5132157..22e58c6e2a35 100644 --- a/drivers/gpu/drm/xe/xe_lrc.c +++ b/drivers/gpu/drm/xe/xe_lrc.c @@ -1061,6 +1061,14 @@ u32 xe_lrc_ring_tail(struct xe_lrc *lrc) return xe_lrc_read_ctx_reg(lrc, CTX_RING_TAIL) & TAIL_ADDR; } +static u32 xe_lrc_ring_start(struct xe_lrc *lrc) +{ + if (xe_lrc_has_indirect_ring_state(lrc)) + return xe_lrc_read_indirect_ctx_reg(lrc, INDIRECT_CTX_RING_START); + else + return xe_lrc_read_ctx_reg(lrc, CTX_RING_START); +} + void xe_lrc_set_ring_head(struct xe_lrc *lrc, u32 head) { if (xe_lrc_has_indirect_ring_state(lrc)) @@ -1641,6 +1649,7 @@ struct xe_lrc_snapshot *xe_lrc_snapshot_capture(struct xe_lrc *lrc) snapshot->head = xe_lrc_ring_head(lrc); snapshot->tail.internal = lrc->ring.tail; snapshot->tail.memory = xe_lrc_ring_tail(lrc); + snapshot->start = xe_lrc_ring_start(lrc); snapshot->start_seqno = xe_lrc_start_seqno(lrc); snapshot->seqno = xe_lrc_seqno(lrc); snapshot->lrc_bo = xe_bo_get(lrc->bo); @@ -1701,6 +1710,7 @@ void xe_lrc_snapshot_print(struct xe_lrc_snapshot *snapshot, struct drm_printer drm_printf(p, "\tLRC Head: (memory) %u\n", snapshot->head); drm_printf(p, "\tLRC Tail: (internal) %u, (memory) %u\n", snapshot->tail.internal, snapshot->tail.memory); + drm_printf(p, "\tRing start: (memory) 0x%08x\n", snapshot->start); drm_printf(p, "\tStart seqno: (memory) %d\n", snapshot->start_seqno); drm_printf(p, "\tSeqno: (memory) %d\n", snapshot->seqno); drm_printf(p, "\tTimestamp: 0x%08x\n", snapshot->ctx_timestamp); diff --git a/drivers/gpu/drm/xe/xe_lrc.h b/drivers/gpu/drm/xe/xe_lrc.h index 37ca321ed492..b459dcab8787 100644 --- a/drivers/gpu/drm/xe/xe_lrc.h +++ b/drivers/gpu/drm/xe/xe_lrc.h @@ -28,6 +28,7 @@ struct xe_lrc_snapshot { u32 ring_addr; u32 indirect_context_desc; u32 head; + u32 start; struct { u32 internal; u32 memory; -- 2.34.1