From: Uma Shankar <uma.shankar@intel.com>
To: dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
intel-xe@lists.freedesktop.org
Cc: ville.syrjala@linux.intel.com, harry.wentland@amd.com,
pekka.paalanen@haloniitty.fi, sebastian.wick@redhat.com,
jadahl@redhat.com, mwen@igalia.com, contact@emersion.fr,
naveen1.kumar@intel.com,
Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>,
Uma Shankar <uma.shankar@intel.com>
Subject: [v2 02/25] drm: Add support for 3x3 CTM
Date: Tue, 26 Nov 2024 18:57:07 +0530 [thread overview]
Message-ID: <20241126132730.1192571-3-uma.shankar@intel.com> (raw)
In-Reply-To: <20241126132730.1192571-1-uma.shankar@intel.com>
From: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Add support for 3x3 Color Transformation Matrices in Color Pipeline.
Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
Signed-off-by: Uma Shankar <uma.shankar@intel.com>
---
drivers/gpu/drm/drm_atomic.c | 3 +++
drivers/gpu/drm/drm_atomic_uapi.c | 3 +++
drivers/gpu/drm/drm_colorop.c | 29 +++++++++++++++++++++++++++++
include/drm/drm_colorop.h | 2 ++
include/uapi/drm/drm_mode.h | 8 ++++++++
5 files changed, 45 insertions(+)
diff --git a/drivers/gpu/drm/drm_atomic.c b/drivers/gpu/drm/drm_atomic.c
index 3161e2ab4efc..8a75f4a0637a 100644
--- a/drivers/gpu/drm/drm_atomic.c
+++ b/drivers/gpu/drm/drm_atomic.c
@@ -802,6 +802,9 @@ static void drm_atomic_colorop_print_state(struct drm_printer *p,
drm_printf(p, "\tinterpolation=%s\n", drm_get_colorop_lut1d_interpolation_name(colorop->lut1d_interpolation));
drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data->base.id : 0);
break;
+ case DRM_COLOROP_CTM_3X3:
+ drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data->base.id : 0);
+ break;
case DRM_COLOROP_CTM_3X4:
drm_printf(p, "\tdata blob id=%d\n", state->data ? state->data->base.id : 0);
break;
diff --git a/drivers/gpu/drm/drm_atomic_uapi.c b/drivers/gpu/drm/drm_atomic_uapi.c
index d6c71135f290..ba68358c0ffe 100644
--- a/drivers/gpu/drm/drm_atomic_uapi.c
+++ b/drivers/gpu/drm/drm_atomic_uapi.c
@@ -708,6 +708,9 @@ static int drm_atomic_color_set_data_property(struct drm_colorop *colorop,
case DRM_COLOROP_CTM_3X4:
size = sizeof(struct drm_color_ctm_3x4);
break;
+ case DRM_COLOROP_CTM_3X3:
+ size = sizeof(struct drm_color_ctm);
+ break;
case DRM_COLOROP_3D_LUT:
index = state->lut_3d_mode_index;
if (index >= (state->lut_3d_modes->length / sizeof(struct drm_mode_3dlut_mode)))
diff --git a/drivers/gpu/drm/drm_colorop.c b/drivers/gpu/drm/drm_colorop.c
index fd1cd934df48..a427cfc5bbbc 100644
--- a/drivers/gpu/drm/drm_colorop.c
+++ b/drivers/gpu/drm/drm_colorop.c
@@ -315,6 +315,35 @@ int drm_colorop_ctm_3x4_init(struct drm_device *dev, struct drm_colorop *colorop
}
EXPORT_SYMBOL(drm_colorop_ctm_3x4_init);
+/**
+ * drm_colorop_ctm_3x3 - Initialize a DRM_COLOROP_CTM_3X3
+ *
+ * @dev: DRM device
+ * @colorop: The drm_colorop object to initialize
+ * @plane: The associated drm_plane
+ * @allow_bypass: true if BYPASS property should be created, false if bypass of
+ * this colorop is not possible
+ * @return zero on success, -E value on failure
+ */
+int drm_colorop_ctm_3x3_init(struct drm_device *dev, struct drm_colorop *colorop,
+ struct drm_plane *plane, bool allow_bypass)
+{
+ int ret;
+
+ ret = drm_colorop_init(dev, colorop, plane, DRM_COLOROP_CTM_3X3, allow_bypass);
+ if (ret)
+ return ret;
+
+ ret = drm_colorop_create_data_prop(dev, colorop);
+ if (ret)
+ return ret;
+
+ drm_colorop_reset(colorop);
+
+ return 0;
+}
+EXPORT_SYMBOL(drm_colorop_ctm_3x3_init);
+
/**
* drm_colorop_mult_init - Initialize a DRM_COLOROP_MULTIPLIER
*
diff --git a/include/drm/drm_colorop.h b/include/drm/drm_colorop.h
index bf5117f30c80..56b51fafebdf 100644
--- a/include/drm/drm_colorop.h
+++ b/include/drm/drm_colorop.h
@@ -377,6 +377,8 @@ int drm_colorop_curve_1d_lut_init(struct drm_device *dev, struct drm_colorop *co
struct drm_plane *plane, uint32_t lut_size,
enum drm_colorop_lut1d_interpolation_type lut1d_interpolation,
bool allow_bypass);
+int drm_colorop_ctm_3x3_init(struct drm_device *dev, struct drm_colorop *colorop,
+ struct drm_plane *plane, bool allow_bypass);
int drm_colorop_ctm_3x4_init(struct drm_device *dev, struct drm_colorop *colorop,
struct drm_plane *plane, bool allow_bypass);
int drm_colorop_mult_init(struct drm_device *dev, struct drm_colorop *colorop,
diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
index 290c2e32f692..a4a7ab689631 100644
--- a/include/uapi/drm/drm_mode.h
+++ b/include/uapi/drm/drm_mode.h
@@ -905,6 +905,14 @@ enum drm_colorop_type {
*/
DRM_COLOROP_CTM_3X4,
+ /**
+ * @DRM_COLOROP_CTM_3X3:
+ *
+ * A 3x3 matrix. Its values are specified via the
+ * &drm_color_ctm struct provided via the DATA property.
+ */
+ DRM_COLOROP_CTM_3X3,
+
/**
* @DRM_COLOROP_MULTIPLIER:
*
--
2.42.0
next prev parent reply other threads:[~2024-11-26 13:19 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-11-26 13:27 [v2 00/25] Plane Color Pipeline support for Intel platforms Uma Shankar
2024-11-26 13:27 ` [v2 01/25] [NOT FOR REVIEW] drm: color pipeline base work Uma Shankar
2024-11-26 13:27 ` Uma Shankar [this message]
2024-11-30 9:38 ` [v2 02/25] drm: Add support for 3x3 CTM Dmitry Baryshkov
2024-12-03 9:03 ` Shankar, Uma
2024-11-26 13:27 ` [v2 03/25] drm: Add Enhanced LUT precision structure Uma Shankar
2024-11-26 13:27 ` [v2 04/25] drm: Add Color lut range attributes Uma Shankar
2024-11-26 13:27 ` [v2 05/25] drm: Add Color ops capability property Uma Shankar
2024-11-30 9:43 ` Dmitry Baryshkov
2024-12-03 9:09 ` Shankar, Uma
2024-11-26 13:27 ` [v2 06/25] drm: Define helper to create color " Uma Shankar
2024-11-26 13:27 ` [v2 07/25] drm: Add 1D LUT multi-segmented color op Uma Shankar
2024-11-30 9:44 ` Dmitry Baryshkov
2024-12-03 9:11 ` Shankar, Uma
2024-11-26 13:27 ` [v2 08/25] drm: Define helper for adding capability property for 1D LUT MULTSEG Uma Shankar
2024-11-26 13:27 ` [v2 09/25] drm: Add helper to initialize segmented 1D LUT Uma Shankar
2024-11-30 9:46 ` Dmitry Baryshkov
2024-12-03 9:14 ` Shankar, Uma
2024-12-05 23:38 ` Dmitry Baryshkov
2024-11-26 13:27 ` [v2 10/25] drm/i915: Add identifiers for intel color blocks Uma Shankar
2024-11-26 13:27 ` [v2 11/25] drm/i915: Add intel_color_op Uma Shankar
2024-11-26 13:27 ` [v2 12/25] drm/i915/color: Add helper to create intel colorop Uma Shankar
2024-11-26 13:27 ` [v2 13/25] drm/i915/color: Create a transfer function color pipeline Uma Shankar
2024-11-26 13:27 ` [v2 14/25] drm/i915/color: Add and attach COLORPIPELINE plane property Uma Shankar
2024-11-26 13:27 ` [v2 15/25] drm/i915/color: Add framework to set colorop Uma Shankar
2024-11-26 13:27 ` [v2 16/25] drm/i915/color: Add callbacks to set plane CTM Uma Shankar
2024-11-26 13:27 ` [v2 17/25] drm/i915/color: Add new color callbacks for Xelpd Uma Shankar
2024-11-26 13:27 ` [v2 18/25] drm/i915/color: Add plane CTM callback for D13 and beyond Uma Shankar
2024-11-26 13:27 ` [v2 19/25] drm/i915: Add register definitions for Plane Degamma Uma Shankar
2024-11-26 13:27 ` [v2 20/25] drm/i915/color: Add framework to program PRE/POST CSC LUT Uma Shankar
2024-11-26 13:27 ` [v2 21/25] drm/i915: Add register definitions for Plane Post CSC Uma Shankar
2024-11-26 13:27 ` [v2 22/25] drm/i915/color: Program Pre-CSC registers Uma Shankar
2024-11-26 13:27 ` [v2 23/25] drm/i915/xelpd: Program Plane Post CSC Registers Uma Shankar
2024-11-26 13:27 ` [v2 24/25] drm/i915/color: Enable Plane Color Pipelines Uma Shankar
2024-11-26 13:27 ` [v2 25/25] drm/doc/rfc: Add documentation for multi-segmented 1D LUT Uma Shankar
2024-11-26 13:27 ` ✓ CI.Patch_applied: success for Plane Color Pipeline support for Intel platforms Patchwork
2024-11-26 13:28 ` ✗ CI.checkpatch: warning " Patchwork
2024-11-26 13:31 ` ✓ CI.KUnit: success " Patchwork
2024-11-26 14:00 ` ✓ CI.Build: " Patchwork
2024-11-26 14:03 ` ✓ CI.Hooks: " Patchwork
2024-11-26 14:04 ` ✗ CI.checksparse: warning " Patchwork
2024-11-26 14:31 ` ✓ Xe.CI.BAT: success " Patchwork
2024-11-26 16:09 ` ✗ Xe.CI.Full: failure " Patchwork
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