From: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org, ankit.k.nautiyal@intel.com,
jani.nikula@intel.com
Subject: [PATCH v3 4/5] drm/i915/scaler: Check if vblank is sufficient for scaler
Date: Mon, 6 Jan 2025 22:21:10 +0530 [thread overview]
Message-ID: <20250106165111.1672722-5-mitulkumar.ajitkumar.golani@intel.com> (raw)
In-Reply-To: <20250106165111.1672722-1-mitulkumar.ajitkumar.golani@intel.com>
Check if vblank is too short for scaler prefill latency.
--v2:
- Use hweight* family of functions for counting bits. [Jani]
- Update precision handling for hscale and vscale. [Ankit]
- Consider chroma downscaling factor during latency
calculation. [Ankit]
- Replace function name from scaler_prefill_time to
scaler_prefill_latency.
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
---
drivers/gpu/drm/i915/display/skl_watermark.c | 31 ++++++++++++++++++++
1 file changed, 31 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 29e8ea91c858..95f60819fe0a 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -2292,6 +2292,36 @@ static int icl_build_plane_wm(struct intel_crtc_state *crtc_state,
return 0;
}
+static int
+scaler_prefill_latency(const struct intel_crtc_state *crtc_state)
+{
+ const struct intel_crtc_scaler_state *scaler_state =
+ &crtc_state->scaler_state;
+ int count = hweight32(scaler_state->scaler_users);
+ int latency;
+ long long hscale_k =
+ mul_u32_u32(scaler_state->scalers[0].hscale, 1000);
+ long long vscale_k =
+ mul_u32_u32(scaler_state->scalers[0].vscale, 1000);
+
+ if (!count)
+ return 0;
+
+ if (count > 1) {
+ int chroma_downscaling_factor =
+ crtc_state->output_format == INTEL_OUTPUT_FORMAT_YCBCR444 ? 2 : 1;
+
+ latency = (4 * crtc_state->linetime) +
+ (chroma_downscaling_factor *
+ DIV_ROUND_UP_ULL((4 * crtc_state->linetime * hscale_k * vscale_k),
+ USHRT_MAX));
+ } else {
+ latency = 4 * crtc_state->linetime;
+ }
+
+ return latency;
+}
+
static bool
skl_is_vblank_too_short(const struct intel_crtc_state *crtc_state,
int wm0_lines, int latency)
@@ -2302,6 +2332,7 @@ skl_is_vblank_too_short(const struct intel_crtc_state *crtc_state,
/* FIXME missing scaler and DSC pre-fill time */
return crtc_state->framestart_delay +
intel_usecs_to_scanlines(adjusted_mode, latency) +
+ scaler_prefill_latency(crtc_state) +
wm0_lines >
adjusted_mode->crtc_vtotal - adjusted_mode->crtc_vblank_start;
}
--
2.46.0
next prev parent reply other threads:[~2025-01-06 16:54 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-06 16:51 [PATCH v3 0/5] Check Scaler and DSC Prefill Latency Against Vblank Mitul Golani
2025-01-06 16:51 ` [PATCH v3 1/5] drm/i915/scaler: Add and compute scaling factors Mitul Golani
2025-01-07 13:00 ` Nautiyal, Ankit K
2025-01-06 16:51 ` [PATCH v3 2/5] drm/i915/scaler: Use crtc_state to setup plane or pipe scaler Mitul Golani
2025-01-07 13:04 ` Nautiyal, Ankit K
2025-01-06 16:51 ` [PATCH v3 3/5] drm/i915/scaler: Compute scaling factors for " Mitul Golani
2025-01-07 13:54 ` Nautiyal, Ankit K
2025-01-08 8:45 ` Dan Carpenter
2025-01-08 13:29 ` Golani, Mitulkumar Ajitkumar
2025-01-06 16:51 ` Mitul Golani [this message]
2025-01-07 14:01 ` [PATCH v3 4/5] drm/i915/scaler: Check if vblank is sufficient for scaler Nautiyal, Ankit K
2025-01-06 16:51 ` [PATCH v3 5/5] drm/i915/dsc: Check if dsc prefill sufficient for vblank Mitul Golani
2025-01-07 14:06 ` Nautiyal, Ankit K
2025-01-06 17:17 ` ✓ CI.Patch_applied: success for Check Scaler and DSC Prefill Latency Against Vblank Patchwork
2025-01-06 17:17 ` ✓ CI.checkpatch: " Patchwork
2025-01-06 17:19 ` ✓ CI.KUnit: " Patchwork
2025-01-06 17:37 ` ✓ CI.Build: " Patchwork
2025-01-06 17:39 ` ✓ CI.Hooks: " Patchwork
2025-01-06 17:41 ` ✗ CI.checksparse: warning " Patchwork
2025-01-06 18:07 ` ✓ Xe.CI.BAT: success " Patchwork
2025-01-07 11:57 ` ✗ Xe.CI.Full: failure " Patchwork
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