Intel-XE Archive on lore.kernel.org
 help / color / mirror / Atom feed
From: Pekka Paalanen <pekka.paalanen@haloniitty.fi>
To: Arun R Murthy <arun.r.murthy@intel.com>
Cc: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org,
	dri-devel@lists.freedesktop.org, suraj.kandpal@intel.com,
	dmitry.baryshkov@linaro.org
Subject: Re: [PATCH v8 01/14] drm: Define histogram structures exposed to user
Date: Mon, 17 Feb 2025 14:27:50 +0200	[thread overview]
Message-ID: <20250217142750.7da2dcb8@eldfell> (raw)
In-Reply-To: <20250217120808.708b9b4d@eldfell>

[-- Attachment #1: Type: text/plain, Size: 7735 bytes --]

On Mon, 17 Feb 2025 12:08:08 +0200
Pekka Paalanen <pekka.paalanen@haloniitty.fi> wrote:

> Hi Arun,
> 
> this whole series seems to be missing all the UAPI docs for the DRM
> ReST files, e.g. drm-kms.rst. The UAPI header doc comments are not a
> replacement for them, I would assume both are a requirement.
> 
> Without the ReST docs it is really difficult to see how this new UAPI
> should be used.
> 
> 
> On Tue, 28 Jan 2025 21:21:07 +0530
> Arun R Murthy <arun.r.murthy@intel.com> wrote:
> 
> > Display Histogram is an array of bins and can be generated in many ways
> > referred to as modes.
> > Ex: HSV max(RGB), Wighted RGB etc.
> > 
> > Understanding the histogram data format(Ex: HSV max(RGB))
> > Histogram is just the pixel count.
> > For a maximum resolution of 10k (10240 x 4320 = 44236800)
> > 25 bits should be sufficient to represent this along with a buffer of 7
> > bits(future use) u32 is being considered.
> > max(RGB) can be 255 i.e 0xFF 8 bit, considering the most significant 5
> > bits, hence 32 bins.
> > Below mentioned algorithm illustrates the histogram generation in
> > hardware.
> > 
> > hist[32] = {0};
> > for (i = 0; i < resolution; i++) {
> > 	bin = max(RGB[i]);
> > 	bin = bin >> 3;	/* consider the most significant bits */
> > 	hist[bin]++;
> > }
> > If the entire image is Red color then max(255,0,0) is 255 so the pixel
> > count of each pixels will be placed in the last bin. Hence except
> > hist[31] all other bins will have a value zero.
> > Generated histogram in this case would be hist[32] = {0,0,....44236800}
> > 
> > Description of the structures, properties defined are documented in the
> > header file include/uapi/drm/drm_mode.h
> > 
> > v8: Added doc for HDR planes, removed reserved variables (Dmitry)
> > 
> > Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
> > ---
> >  include/uapi/drm/drm_mode.h | 65 +++++++++++++++++++++++++++++++++++++++++++++
> >  1 file changed, 65 insertions(+)
> > 
> > diff --git a/include/uapi/drm/drm_mode.h b/include/uapi/drm/drm_mode.h
> > index c082810c08a8b234ef2672ecf54fc8c05ddc2bd3..b8b7b18843ae7224263a9c61b20ac6cbf5df69e9 100644
> > --- a/include/uapi/drm/drm_mode.h
> > +++ b/include/uapi/drm/drm_mode.h
> > @@ -1355,6 +1355,71 @@ struct drm_mode_closefb {
> >  	__u32 pad;
> >  };
> >  
> > +/**
> > + * enum drm_mode_histogram
> > + *
> > + * @DRM_MODE_HISTOGRAM_HSV_MAX_RGB:
> > + * Maximum resolution at present 10k, 10240x4320 = 44236800
> > + * can be denoted in 25bits. With an additional 7 bits in buffer each bin
> > + * can be a u32 value.
> > + * For SDL, Maximum value of max(RGB) is 255, so max 255 bins.  
> 
> I assume s/SDL/SDR/.
> 
> This assumption seems false. SDR can be also 10-bit and probably even
> more.
> 
> > + * If the most significant 5 bits are considered, then bins = 2^5
> > + * will be 32 bins.
> > + * For HDR, maximum value of max(RGB) is 65535, so max 65535 bins.  

As another reviewer pointed out before, there are 256 different
possible values for an 8-bit integer, and not 255. Likewise, a 16-bit
integer can have 65536 different values, not 65535. Zero is a possible
value.


> 
> Does this mean that the histogram is computed on the pixel values
> emitted to the cable? What if the cable format is YUV?
> 
> > + * For illustration consider a full RED image of 10k resolution considering all
> > + * 8 bits histogram would look like hist[255] = {0,0,....44236800} with SDR
> > + * plane similarly with HDR the same would look like hist[65535] =
> > + * {0,0,0,....44236800}  
> 
> This SDR vs. HDR is a false dichotomy. I presume the meaningful
> difference is bits-per-channel, not the dynamic range.
> 
> It would be good to have the pseudocode snippet here instead of the
> commit message. The commit message should not contain any UAPI notes
> that are not in the UAPI docs. OTOH, repeating UAPI docs in the commit
> message is probably not very useful, as the more interesting questions
> are why this exists and what it can be used for.
> 
> > + */
> > +enum drm_mode_histogram {
> > +	DRM_MODE_HISTOGRAM_HSV_MAX_RGB = 0x01,  
> 
> What does the HSV stand for?
> 
> When talking about pixel values, my first impression is
> hue-saturation-value. But there are no hue-saturation-value
> computations at all?
> 
> > +};
> > +
> > +/**
> > + * struct drm_histogram_caps
> > + *
> > + * @histogram_mode: histogram generation modes, defined in the
> > + *		    enum drm_mode_histogram
> > + * @bins_count: number of bins for a chosen histogram mode. For illustration
> > + *		refer the above defined histogram mode.
> > + */
> > +struct drm_histogram_caps {
> > +	__u32 histogram_mode;
> > +	__u32 bins_count;
> > +};  
> 
> Patch 3 says:
> 
> + * Property HISTOGRAM_CAPS is a blob pointing to the struct drm_histogram_caps
> + * Description of the structure is in include/uapi/drm/drm_mode.h
> 
> This is a read-only property, right?
> 
> The blob contains one struct drm_histogram_caps. What if more than one
> mode is supported?
> 
> If the bin count depends on the bits-per-channel of something which
> depends on set video mode or other things, how does updating work?
> What if userspace uses a stale count? How does userspace ensure it uses
> the current count?
> 
> > +
> > +/**
> > + * struct drm_histogram_config
> > + *
> > + * @hist_mode_data: address to the histogram mode specific data if any  
> 
> Do I understand correctly that the KMS blob will contain a userspace
> virtual memory address (a user pointer)? How does that work? What are
> the lifetime requirements for that memory?
> 
> I do not remember any precedent of this, and I suspect it's not a good
> design. I believe all the data should be contained in the blobs, e.g.
> how IN_FORMATS does it. I'm not sure what would be the best UAPI here
> for returning histogram data to userspace, but at least all the data
> sent to the kernel should be contained in the blob itself since it
> seems to be quite small. Variable length is ok for blobs.
> 
> > + * @nr_hist_mode_data: number of elements pointed by the address in
> > + *		       hist_mode_data
> > + * @hist_mode: histogram mode(HSV max(RGB), RGB, LUMA etc)
> > + * @enable: flag to enable/disable histogram
> > + */
> > +struct drm_histogram_config {
> > +	__u64 hist_mode_data;
> > +	__u32 nr_hist_mode_data;
> > +	enum drm_mode_histogram hist_mode;
> > +	bool enable;  
> 
> Don't enum and bool have non-fixed sizes? Hence inappropriate as UABI,
> if architecture, build options, or the contents of the enum change the
> ABI.

To clarify: defining named values with an enum {...} block is ok. Using
the enum type in ABI may cause problems.


Thanks,
pq

> > +};
> > +
> > +/**
> > + * struct drm_histogram
> > + *
> > + * @config: histogram configuration data pointed by struct drm_histogram_config  
> 
> s/pointed by/defined by/ I presume? That much is obvious from the field
> type. What does it mean? Why is struct drm_histogram_config a separate
> struct?
> 
> > + * @data_ptr: pointer to the array of histogram.
> > + *	      Histogram is an array of bins. Data format for each bin depends
> > + *	      on the histogram mode. Refer to the above histogram modes for
> > + *	      more information.  
> 
> Another userspace virtual address stored in a KMS blob?
> 
> > + * @nr_elements: number of bins in the histogram.
> > + */
> > +struct drm_histogram {
> > +	struct drm_histogram_config config;
> > +	__u64 data_ptr;
> > +	__u32 nr_elements;
> > +};
> > +
> >  #if defined(__cplusplus)
> >  }
> >  #endif
> >   
> 
> Thanks,
> pq


[-- Attachment #2: OpenPGP digital signature --]
[-- Type: application/pgp-signature, Size: 833 bytes --]

  reply	other threads:[~2025-02-17 12:28 UTC|newest]

Thread overview: 63+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-01-28 15:51 [PATCH v8 00/14] Display Global Histogram Arun R Murthy
2025-01-28 15:51 ` [PATCH v8 01/14] drm: Define histogram structures exposed to user Arun R Murthy
2025-02-14  6:38   ` Kandpal, Suraj
2025-02-14  8:38     ` Kandpal, Suraj
2025-03-13  6:10     ` Murthy, Arun R
2025-02-17 10:08   ` Pekka Paalanen
2025-02-17 12:27     ` Pekka Paalanen [this message]
2025-03-03  7:52       ` Murthy, Arun R
2025-03-03  9:33         ` Pekka Paalanen
2025-02-17 17:26     ` Simona Vetter
2025-02-17 22:23       ` Simona Vetter
2025-02-18  6:01       ` Murthy, Arun R
2025-02-19 13:31       ` Simona Vetter
2025-03-03  7:50         ` Murthy, Arun R
2025-02-18  5:43     ` Murthy, Arun R
2025-02-18 16:18       ` Pekka Paalanen
2025-02-19  3:58         ` Murthy, Arun R
2025-02-20 15:50           ` Pekka Paalanen
2025-03-03  7:53             ` Murthy, Arun R
2025-03-03  9:20               ` Pekka Paalanen
2025-03-19 12:08                 ` Murthy, Arun R
2025-03-20  9:23                   ` Pekka Paalanen
2025-03-26  6:03                     ` Murthy, Arun R
2025-03-27  8:59                       ` Pekka Paalanen
2025-03-28  5:06                         ` Murthy, Arun R
2025-04-17  6:31                           ` Shankar, Uma
2025-04-17  7:18                             ` Pekka Paalanen
2025-04-17 10:50                               ` Shankar, Uma
2025-02-20 16:26       ` Dmitry Baryshkov
2025-03-03  7:54         ` Murthy, Arun R
2025-01-28 15:51 ` [PATCH v8 02/14] drm: Define ImageEnhancemenT LUT " Arun R Murthy
2025-02-14  9:11   ` Kandpal, Suraj
2025-01-28 15:51 ` [PATCH v8 03/14] drm/crtc: Expose API to create drm crtc property for histogram Arun R Murthy
2025-02-14  9:36   ` Kandpal, Suraj
2025-01-28 15:51 ` [PATCH v8 04/14] drm/crtc: Expose API to create drm crtc property for IET LUT Arun R Murthy
2025-02-14  9:47   ` Kandpal, Suraj
2025-01-28 15:51 ` [PATCH v8 05/14] drm/i915/histogram: Define registers for histogram Arun R Murthy
2025-01-28 15:51 ` [PATCH v8 06/14] drm/i915/histogram: Add support " Arun R Murthy
2025-02-14 10:02   ` Kandpal, Suraj
2025-02-14 10:24     ` Kandpal, Suraj
2025-02-17  6:09       ` Kandpal, Suraj
2025-02-16 14:32   ` [v8,06/14] " Thasleem, Mohammed
2025-01-28 15:51 ` [PATCH v8 07/14] drm/xe: Add histogram support to Xe builds Arun R Murthy
2025-01-28 15:51 ` [PATCH v8 08/14] drm/i915/histogram: histogram interrupt handling Arun R Murthy
2025-02-14 10:19   ` Kandpal, Suraj
2025-01-28 15:51 ` [PATCH v8 09/14] drm/i915/histogram: Hook i915 histogram with drm histogram Arun R Murthy
2025-02-14 10:22   ` Kandpal, Suraj
2025-01-28 15:51 ` [PATCH v8 10/14] drm/i915/iet: Add support to writing the IET LUT data Arun R Murthy
2025-02-17  4:23   ` Kandpal, Suraj
2025-01-28 15:51 ` [PATCH v8 11/14] drm/i915/crtc: Hook i915 IET LUT with the drm IET properties Arun R Murthy
2025-01-28 15:51 ` [PATCH v8 12/14] drm/i915/histogram: histogram delay counter doesnt reset Arun R Murthy
2025-01-28 15:51 ` [PATCH v8 13/14] drm/i915/histogram: Histogram changes for Display 20+ Arun R Murthy
2025-02-17  6:25   ` Kandpal, Suraj
2025-01-28 15:51 ` [PATCH v8 14/14] drm/i915/histogram: Enable pipe dithering Arun R Murthy
2025-02-17  6:20   ` Kandpal, Suraj
2025-01-28 18:16 ` ✓ CI.Patch_applied: success for Display Global Histogram (rev9) Patchwork
2025-01-28 18:16 ` ✗ CI.checkpatch: warning " Patchwork
2025-01-28 18:18 ` ✓ CI.KUnit: success " Patchwork
2025-01-28 18:47 ` ✓ CI.Build: " Patchwork
2025-01-28 18:49 ` ✗ CI.Hooks: failure " Patchwork
2025-01-28 18:50 ` ✗ CI.checksparse: warning " Patchwork
2025-01-28 19:24 ` ✓ Xe.CI.BAT: success " Patchwork
2025-01-29  7:39 ` ✗ Xe.CI.Full: failure " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=20250217142750.7da2dcb8@eldfell \
    --to=pekka.paalanen@haloniitty.fi \
    --cc=arun.r.murthy@intel.com \
    --cc=dmitry.baryshkov@linaro.org \
    --cc=dri-devel@lists.freedesktop.org \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=intel-xe@lists.freedesktop.org \
    --cc=suraj.kandpal@intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox