Re: [RFC 1/6] PCI/ACPI: Implement PCI FW _DSM method

[Bjorn Helgaas <helgaas@kernel.org>]

On Tue, Feb 25, 2025 at 06:25:52PM +0000, Gupta, Anshuman wrote:
> > -----Original Message-----
> > From: Bjorn Helgaas <helgaas@kernel.org>
> ... redundant headers snipped

> > On Mon, Feb 24, 2025 at 10:18:44PM +0530, Anshuman Gupta wrote:
> > > Implement _DSM method 10 and _DSM Method 11 as per PCI firmware
> > specs
> > > section 4.6.10 and 4.6.11.
> > 
> > Please split into two patches, one for each _DSM.  Include spec
> > citations, e.g., PCI Firmware r3.3, sec 4.6.10.  Section numbers
> > are not guaranteed to stay consistent across spec revisions, so we
> > need both the revision and section number.
> > 
> > Include some descriptive words about the DSM in each subject line,
> > e.g., "D3cold Aux Power Limit", "PERST# Assertion Delay".
> > 
> > > Current assumption is only one PCIe Endpoint driver (XeKMD for
> > > Battlemage GPU) will request for Aux Power Limit under a given Root
> > > Port but theoretically it is possible that other Non-Intel GPU or
> > > Non-GPU PCIe Endpoint driver can also request for Aux Power Limit and
> > > request to block the core power removal under same Root Port.
> > > That will disrupt the Battlemage GPU VRAM Self Refresh.
> > 
> > I guess this is sort of an acknowledgement of the r3.3, sec 4.6.10 spec text
> > about system software being responsible for tracking and aggregating
> > requests when there are multiple functions below the Downstream Port?

> AFAIU apart from multiple function below the Downstream Port (from
> same PCIe Card), there can be possibility of another PCie card
> connected via a switch to same root port like below topology.
> 
> 			                 |-> PCIe PCIe Downstream Port -> End Point Device 	
> Root Port -> PCIe Upstream Port   |-> PCIe PCIe Downstream Port -> End Point Device	
> 			                 |-> PCIe PCIe Downstream Port -> PCIe Upstream Port ->  PCIe Downstream Port -> *EndPoint Device 	
> 
> *Endpoint Device from different PCIe card can also request to block the core power removal under same Root Port ?

Of course.

>  How to document such limitation ?

> > If so, remove the Battlemage-specific language and just say something about
> > the fact that this implementation doesn't do any of that tracking and
> > aggregation.

^^ Here's a hint about how to document this.  My point is that this
has nothing to do with Battlemage in particular, so the text about
Battlemage-specific things is a distraction from the real point, which
IIUC is this:

  Note that this implementation assumes only a single device below the
  Downstream Port because it does not track and aggregate requests
  from all child devices below the Downstream Port as required by sec
  4.6.10.

> > > One possible mitigation would be only allowing only first PCIe
> > > Non-Bridge Endpoint Function 0 driver to call_DSM method 10.