From: Jonathan Cavitt <jonathan.cavitt@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: saurabhg.gupta@intel.com, alex.zuo@intel.com,
jonathan.cavitt@intel.com, joonas.lahtinen@linux.intel.com,
matthew.brost@intel.com, jianxun.zhang@intel.com,
dri-devel@lists.freedesktop.org
Subject: [PATCH 3/6] drm/xe/xe_gt_pagefault: Migrate pagefault struct to header
Date: Wed, 26 Feb 2025 22:55:53 +0000 [thread overview]
Message-ID: <20250226225557.133076-4-jonathan.cavitt@intel.com> (raw)
In-Reply-To: <20250226225557.133076-1-jonathan.cavitt@intel.com>
Migrate the pagefault struct from xe_gt_pagefault.c to the
xe_gt_pagefault.h header file, along with the associated enum values.
v2: Normalize names for common header (Matt Brost)
Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
---
drivers/gpu/drm/xe/xe_gt_pagefault.c | 41 +++++-----------------------
drivers/gpu/drm/xe/xe_gt_pagefault.h | 28 +++++++++++++++++++
2 files changed, 35 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_gt_pagefault.c b/drivers/gpu/drm/xe/xe_gt_pagefault.c
index 4a4cf0c4b68d..76d7feecf98e 100644
--- a/drivers/gpu/drm/xe/xe_gt_pagefault.c
+++ b/drivers/gpu/drm/xe/xe_gt_pagefault.c
@@ -22,33 +22,6 @@
#include "xe_trace_bo.h"
#include "xe_vm.h"
-struct pagefault {
- u64 page_addr;
- u32 asid;
- u16 pdata;
- u8 vfid;
- u8 access_type;
- u8 fault_type;
- u8 fault_level;
- u8 engine_class;
- u8 engine_instance;
- u8 fault_unsuccessful;
- bool trva_fault;
-};
-
-enum access_type {
- ACCESS_TYPE_READ = 0,
- ACCESS_TYPE_WRITE = 1,
- ACCESS_TYPE_ATOMIC = 2,
- ACCESS_TYPE_RESERVED = 3,
-};
-
-enum fault_type {
- NOT_PRESENT = 0,
- WRITE_ACCESS_VIOLATION = 1,
- ATOMIC_ACCESS_VIOLATION = 2,
-};
-
struct acc {
u64 va_range_base;
u32 asid;
@@ -60,9 +33,9 @@ struct acc {
u8 engine_instance;
};
-static bool access_is_atomic(enum access_type access_type)
+static bool access_is_atomic(enum xe_pagefault_access_type access_type)
{
- return access_type == ACCESS_TYPE_ATOMIC;
+ return access_type == XE_PAGEFAULT_ACCESS_TYPE_ATOMIC;
}
static bool vma_is_valid(struct xe_tile *tile, struct xe_vma *vma)
@@ -102,7 +75,7 @@ static int xe_pf_begin(struct drm_exec *exec, struct xe_vma *vma,
return 0;
}
-static int handle_vma_pagefault(struct xe_gt *gt, struct pagefault *pf,
+static int handle_vma_pagefault(struct xe_gt *gt, struct xe_pagefault *pf,
struct xe_vma *vma)
{
struct xe_vm *vm = xe_vma_vm(vma);
@@ -181,7 +154,7 @@ static struct xe_vm *asid_to_vm(struct xe_device *xe, u32 asid)
return vm;
}
-static int handle_pagefault(struct xe_gt *gt, struct pagefault *pf)
+static int handle_pagefault(struct xe_gt *gt, struct xe_pagefault *pf)
{
struct xe_device *xe = gt_to_xe(gt);
struct xe_vm *vm;
@@ -235,7 +208,7 @@ static int send_pagefault_reply(struct xe_guc *guc,
return xe_guc_ct_send(&guc->ct, action, ARRAY_SIZE(action), 0, 0);
}
-static void print_pagefault(struct xe_device *xe, struct pagefault *pf)
+static void print_pagefault(struct xe_device *xe, struct xe_pagefault *pf)
{
drm_dbg(&xe->drm, "\n\tASID: %d\n"
"\tVFID: %d\n"
@@ -255,7 +228,7 @@ static void print_pagefault(struct xe_device *xe, struct pagefault *pf)
#define PF_MSG_LEN_DW 4
-static bool get_pagefault(struct pf_queue *pf_queue, struct pagefault *pf)
+static bool get_pagefault(struct pf_queue *pf_queue, struct xe_pagefault *pf)
{
const struct xe_guc_pagefault_desc *desc;
bool ret = false;
@@ -342,7 +315,7 @@ static void pf_queue_work_func(struct work_struct *w)
struct xe_gt *gt = pf_queue->gt;
struct xe_device *xe = gt_to_xe(gt);
struct xe_guc_pagefault_reply reply = {};
- struct pagefault pf = {};
+ struct xe_pagefault pf = {};
unsigned long threshold;
int ret;
diff --git a/drivers/gpu/drm/xe/xe_gt_pagefault.h b/drivers/gpu/drm/xe/xe_gt_pagefault.h
index 839c065a5e4c..33616043d17a 100644
--- a/drivers/gpu/drm/xe/xe_gt_pagefault.h
+++ b/drivers/gpu/drm/xe/xe_gt_pagefault.h
@@ -11,6 +11,34 @@
struct xe_gt;
struct xe_guc;
+struct xe_pagefault {
+ u64 page_addr;
+ u32 asid;
+ u16 pdata;
+ u8 vfid;
+ u8 access_type;
+ u8 fault_type;
+ u8 fault_level;
+ u8 engine_class;
+ u8 engine_instance;
+ u8 fault_unsuccessful;
+ bool prefetch;
+ bool trva_fault;
+};
+
+enum xe_pagefault_access_type {
+ XE_PAGEFAULT_ACCESS_TYPE_READ = 0,
+ XE_PAGEFAULT_ACCESS_TYPE_WRITE = 1,
+ XE_PAGEFAULT_ACCESS_TYPE_ATOMIC = 2,
+ XE_PAGEFAULT_ACCESS_TYPE_RESERVED = 3,
+};
+
+enum xe_pagefault_type {
+ XE_PAGEFAULT_TYPE_NOT_PRESENT = 0,
+ XE_PAGEFAULT_TYPE_WRITE_ACCESS_VIOLATION = 1,
+ XE_PAGEFAULT_TYPE_ATOMIC_ACCESS_VIOLATION = 2,
+};
+
int xe_gt_pagefault_init(struct xe_gt *gt);
void xe_gt_pagefault_reset(struct xe_gt *gt);
int xe_guc_pagefault_handler(struct xe_guc *guc, u32 *msg, u32 len);
--
2.43.0
next prev parent reply other threads:[~2025-02-26 22:56 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-02-26 22:55 [PATCH 0/6] drm/xe/xe_vm: Implement xe_vm_get_property_ioctl Jonathan Cavitt
2025-02-26 22:55 ` [PATCH 1/6] drm/xe/xe_gt_pagefault: Migrate lookup_vma to xe_vm.h Jonathan Cavitt
2025-02-26 22:55 ` [PATCH 2/6] drm/xe/xe_exec_queue: Add ID param to exec queue struct Jonathan Cavitt
2025-02-26 22:55 ` Jonathan Cavitt [this message]
2025-02-26 22:55 ` [PATCH 4/6] drm/xe/xe_vm: Add per VM pagefault info Jonathan Cavitt
2025-02-26 22:55 ` [PATCH 5/6] drm/xe/xe_vm: Add per VM reset stats Jonathan Cavitt
2025-02-26 22:55 ` [PATCH 6/6] drm/xe/xe_vm: Implement xe_vm_get_property_ioctl Jonathan Cavitt
2025-02-27 2:36 ` kernel test robot
2025-02-27 5:14 ` kernel test robot
2025-02-27 8:25 ` Matthew Brost
2025-02-27 16:51 ` Cavitt, Jonathan
2025-02-28 3:34 ` Matthew Brost
2025-02-27 0:11 ` ✓ CI.Patch_applied: success for " Patchwork
2025-02-27 0:12 ` ✗ CI.checkpatch: warning " Patchwork
2025-02-27 0:12 ` ✗ CI.KUnit: failure " Patchwork
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