From: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>
To: intel-xe@lists.freedesktop.org
Cc: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
"Matthew Brost" <matthew.brost@intel.com>,
himal.prasad.ghimiray@intel.com,
"Matthew Auld" <matthew.auld@intel.com>
Subject: [PATCH v3 4/5] drm/xe/migrate: Allow xe_migrate_vram() also on non-pagefault capable devices
Date: Mon, 24 Mar 2025 17:54:59 +0100 [thread overview]
Message-ID: <20250324165500.20680-5-thomas.hellstrom@linux.intel.com> (raw)
In-Reply-To: <20250324165500.20680-1-thomas.hellstrom@linux.intel.com>
The drm_pagemap functionality does not depend on the device having
recoverable pagefaults available. So allow xe_migrate_vram() also for
such devices. Even if this will have little use in practice, it's
beneficial for testin multi-device SVM, since a memory provider could
be a non-pagefault capable gpu.
Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
Reviewed-by: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_migrate.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_migrate.c b/drivers/gpu/drm/xe/xe_migrate.c
index d364c9f458e7..f17234533504 100644
--- a/drivers/gpu/drm/xe/xe_migrate.c
+++ b/drivers/gpu/drm/xe/xe_migrate.c
@@ -1609,6 +1609,7 @@ static struct dma_fence *xe_migrate_vram(struct xe_migrate *m,
{
struct xe_gt *gt = m->tile->primary_gt;
struct xe_device *xe = gt_to_xe(gt);
+ bool use_usm_batch = xe->info.has_usm;
struct dma_fence *fence = NULL;
u32 batch_size = 2;
u64 src_L0_ofs, dst_L0_ofs;
@@ -1625,7 +1626,7 @@ static struct dma_fence *xe_migrate_vram(struct xe_migrate *m,
batch_size += pte_update_cmd_size(round_update_size);
batch_size += EMIT_COPY_DW;
- bb = xe_bb_new(gt, batch_size, true);
+ bb = xe_bb_new(gt, batch_size, use_usm_batch);
if (IS_ERR(bb)) {
err = PTR_ERR(bb);
return ERR_PTR(err);
@@ -1650,7 +1651,7 @@ static struct dma_fence *xe_migrate_vram(struct xe_migrate *m,
XE_PAGE_SIZE);
job = xe_bb_create_migration_job(m->q, bb,
- xe_migrate_batch_base(m, true),
+ xe_migrate_batch_base(m, use_usm_batch),
update_idx);
if (IS_ERR(job)) {
err = PTR_ERR(job);
--
2.48.1
next prev parent reply other threads:[~2025-03-24 16:55 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-03-24 16:54 [PATCH v3 0/5] drm/xe: xe-only patches from the multi-device GPUSVM series Thomas Hellström
2025-03-24 16:54 ` [PATCH v3 1/5] drm/xe: Introduce CONFIG_DRM_XE_GPUSVM Thomas Hellström
2025-03-24 16:54 ` [PATCH v3 2/5] drm/xe/svm: Fix a potential bo UAF Thomas Hellström
2025-03-24 16:54 ` [PATCH v3 3/5] drm/xe/bo: Add a bo remove callback Thomas Hellström
2025-03-25 9:02 ` Matthew Auld
2025-03-25 9:07 ` Thomas Hellström
2025-03-25 10:08 ` Matthew Auld
2025-03-25 16:45 ` Thomas Hellström
2025-03-24 16:54 ` Thomas Hellström [this message]
2025-03-24 16:55 ` [PATCH v3 5/5] drm/xe: Make the PT code handle placement per PTE rather than per vma / range Thomas Hellström
2025-03-24 17:00 ` ✓ CI.Patch_applied: success for drm/xe: xe-only patches from the multi-device GPUSVM series (rev5) Patchwork
2025-03-24 17:01 ` ✗ CI.checkpatch: warning " Patchwork
2025-03-24 17:02 ` ✓ CI.KUnit: success " Patchwork
2025-03-24 17:18 ` ✓ CI.Build: " Patchwork
2025-03-24 17:21 ` ✓ CI.Hooks: " Patchwork
2025-03-24 17:22 ` ✓ CI.checksparse: " Patchwork
2025-03-24 17:41 ` ✓ Xe.CI.BAT: " Patchwork
2025-03-24 19:37 ` ✗ Xe.CI.Full: failure " Patchwork
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