From: Shuicheng Lin <shuicheng.lin@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: Shuicheng Lin <shuicheng.lin@intel.com>,
Janga Rahul Kumar <janga.rahul.kumar@intel.com>,
Lucas De Marchi <lucas.demarchi@intel.com>
Subject: [PATCH] drm/xe: Add the missed value paramter of LE_COS
Date: Tue, 1 Apr 2025 20:52:21 +0000 [thread overview]
Message-ID: <20250401205221.4179660-1-shuicheng.lin@intel.com> (raw)
Cc: Janga Rahul Kumar <janga.rahul.kumar@intel.com>
Cc: Lucas De Marchi <lucas.demarchi@intel.com>
Signed-off-by: Shuicheng Lin <shuicheng.lin@intel.com>
---
drivers/gpu/drm/xe/regs/xe_gt_regs.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
index da1f198ac107..042c8401aee9 100644
--- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
@@ -62,7 +62,7 @@
#define LE_SSE_MASK REG_GENMASK(18, 17)
#define LE_SSE(value) REG_FIELD_PREP(LE_SSE_MASK, value)
#define LE_COS_MASK REG_GENMASK(16, 15)
-#define LE_COS(value) REG_FIELD_PREP(LE_COS_MASK)
+#define LE_COS(value) REG_FIELD_PREP(LE_COS_MASK, value)
#define LE_SCF_MASK REG_BIT(14)
#define LE_SCF(value) REG_FIELD_PREP(LE_SCF_MASK, value)
#define LE_PFM_MASK REG_GENMASK(13, 11)
--
2.25.1
next reply other threads:[~2025-04-01 20:52 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-01 20:52 Shuicheng Lin [this message]
2025-04-01 20:57 ` ✓ CI.Patch_applied: success for drm/xe: Add the missed value paramter of LE_COS Patchwork
2025-04-01 20:57 ` ✗ CI.checkpatch: warning " Patchwork
2025-04-01 20:59 ` ✓ CI.KUnit: success " Patchwork
2025-04-01 21:15 ` ✓ CI.Build: " Patchwork
2025-04-01 21:17 ` ✓ CI.Hooks: " Patchwork
2025-04-01 21:19 ` ✓ CI.checksparse: " Patchwork
2025-04-01 21:38 ` ✓ Xe.CI.BAT: " Patchwork
2025-04-02 0:40 ` ✗ Xe.CI.Full: failure " Patchwork
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