From: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com>
To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Cc: ville.syrjala@linux.intel.com, uma.shankar@intel.com,
chaitanya.kumar.borah@intel.com, animesh.manna@intel.com
Subject: [PATCH 02/11] drm/i915/dsb: Extract assert_dsb_tail_is_aligned()
Date: Tue, 8 Apr 2025 16:30:13 +0530 [thread overview]
Message-ID: <20250408110022.1907802-3-chaitanya.kumar.borah@intel.com> (raw)
In-Reply-To: <20250408110022.1907802-1-chaitanya.kumar.borah@intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Extract the DSB tail alignment checks into helper. We already
have two uses of this, and soo we'll get a third.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_dsb.c | 19 +++++++++++++++----
1 file changed, 15 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c
index c166e02b8af0..08e3bbea1a67 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.c
+++ b/drivers/gpu/drm/i915/display/intel_dsb.c
@@ -204,6 +204,15 @@ static bool assert_dsb_has_room(struct intel_dsb *dsb)
crtc->base.base.id, crtc->base.name, dsb->id);
}
+static bool assert_dsb_tail_is_aligned(struct intel_dsb *dsb)
+{
+ struct intel_crtc *crtc = dsb->crtc;
+ struct intel_display *display = to_intel_display(crtc->base.dev);
+
+ return !drm_WARN_ON(display->drm,
+ !IS_ALIGNED(dsb->free_pos * 4, CACHELINE_BYTES));
+}
+
static void intel_dsb_dump(struct intel_dsb *dsb)
{
struct intel_crtc *crtc = dsb->crtc;
@@ -621,10 +630,11 @@ static void _intel_dsb_chain(struct intel_atomic_state *state,
if (drm_WARN_ON(display->drm, dsb->id == chained_dsb->id))
return;
- tail = chained_dsb->free_pos * 4;
- if (drm_WARN_ON(display->drm, !IS_ALIGNED(tail, CACHELINE_BYTES)))
+ if (!assert_dsb_tail_is_aligned(chained_dsb))
return;
+ tail = chained_dsb->free_pos * 4;
+
intel_dsb_reg_write(dsb, DSB_CTRL(pipe, chained_dsb->id),
ctrl | DSB_ENABLE);
@@ -695,10 +705,11 @@ static void _intel_dsb_commit(struct intel_dsb *dsb, u32 ctrl,
enum pipe pipe = crtc->pipe;
u32 tail;
- tail = dsb->free_pos * 4;
- if (drm_WARN_ON(display->drm, !IS_ALIGNED(tail, CACHELINE_BYTES)))
+ if (!assert_dsb_tail_is_aligned(dsb))
return;
+ tail = dsb->free_pos * 4;
+
if (is_dsb_busy(display, pipe, dsb->id)) {
drm_err(display->drm, "[CRTC:%d:%s] DSB %d is busy\n",
crtc->base.base.id, crtc->base.name, dsb->id);
--
2.25.1
next prev parent reply other threads:[~2025-04-08 11:15 UTC|newest]
Thread overview: 36+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-08 11:00 [PATCH 00/11] drm/xe/display: Program double buffered LUT registers Chaitanya Kumar Borah
2025-04-08 11:00 ` [PATCH 01/11] drm/i915/dsb: Extract intel_dsb_ins_align() Chaitanya Kumar Borah
2025-04-21 12:40 ` Manna, Animesh
2025-04-08 11:00 ` Chaitanya Kumar Borah [this message]
2025-04-21 12:43 ` [PATCH 02/11] drm/i915/dsb: Extract assert_dsb_tail_is_aligned() Manna, Animesh
2025-04-08 11:00 ` [PATCH 03/11] drm/i915/dsb: Extract intel_dsb_{head,tail}() Chaitanya Kumar Borah
2025-04-21 12:44 ` Manna, Animesh
2025-04-08 11:00 ` [PATCH 04/11] drm/i915/dsb: Implement intel_dsb_gosub() Chaitanya Kumar Borah
2025-04-16 7:28 ` Manna, Animesh
2025-04-08 11:00 ` [PATCH v2 05/11] drm/i915/dsb: add intel_dsb_gosub_finish() Chaitanya Kumar Borah
2025-05-14 9:19 ` Shankar, Uma
2025-04-08 11:00 ` [PATCH v2 06/11] drm/i915/dsb: Add support for GOSUB interrupt Chaitanya Kumar Borah
2025-05-14 9:46 ` Shankar, Uma
2025-04-08 11:00 ` [PATCH 07/11] drm/i915: s/dsb_color_vblank/dsb_color Chaitanya Kumar Borah
2025-04-08 11:00 ` [PATCH v2 08/11] drm/i915: use GOSUB to program doubled buffered LUT registers Chaitanya Kumar Borah
2025-05-14 11:40 ` Shankar, Uma
2025-04-08 11:00 ` [PATCH v2 09/11] drm/i915: Program DB LUT registers before vblank Chaitanya Kumar Borah
2025-05-14 11:44 ` Shankar, Uma
2025-04-08 11:00 ` [PATCH 10/11] drm/i915/color: Do not pre-load LUTs with DB registers Chaitanya Kumar Borah
2025-05-14 11:46 ` Shankar, Uma
2025-04-08 11:00 ` [PATCH 11/11] drm/i915: Disable updating of LUT values during vblank Chaitanya Kumar Borah
2025-05-14 11:50 ` Shankar, Uma
2025-04-08 11:21 ` ✓ CI.Patch_applied: success for drm/xe/display: Program double buffered LUT registers (rev6) Patchwork
2025-04-08 11:21 ` ✓ CI.checkpatch: " Patchwork
2025-04-08 11:22 ` ✓ CI.KUnit: " Patchwork
2025-04-08 11:26 ` ✗ CI.Build: failure " Patchwork
2025-04-08 21:37 ` ✓ CI.Patch_applied: success for drm/xe/display: Program double buffered LUT registers (rev7) Patchwork
2025-04-08 21:37 ` ✓ CI.checkpatch: " Patchwork
2025-04-08 21:38 ` ✓ CI.KUnit: " Patchwork
2025-04-08 22:05 ` ✓ CI.Build: " Patchwork
2025-04-08 22:08 ` ✓ CI.Hooks: " Patchwork
2025-04-08 22:10 ` ✗ CI.checksparse: warning " Patchwork
2025-04-08 22:55 ` ✓ Xe.CI.BAT: success " Patchwork
2025-04-08 23:58 ` ✗ Xe.CI.Full: failure " Patchwork
2025-04-09 6:27 ` Patchwork
-- strict thread matches above, loose matches on Subject: below --
2025-04-07 14:23 [PATCH 00/11] drm/xe/display: Program double buffered LUT registers Chaitanya Kumar Borah
2025-04-07 14:23 ` [PATCH 02/11] drm/i915/dsb: Extract assert_dsb_tail_is_aligned() Chaitanya Kumar Borah
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