From: Jonathan Cavitt <jonathan.cavitt@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: saurabhg.gupta@intel.com, alex.zuo@intel.com,
jonathan.cavitt@intel.com, joonas.lahtinen@linux.intel.com,
matthew.brost@intel.com, jianxun.zhang@intel.com,
shuicheng.lin@intel.com, dri-devel@lists.freedesktop.org,
Michal.Wajdeczko@intel.com, michal.mrozek@intel.com,
raag.jadav@intel.com, john.c.harrison@intel.com,
ivan.briano@intel.com, matthew.auld@intel.com
Subject: [PATCH v21 1/5] drm/xe/xe_gt_pagefault: Disallow writes to read-only VMAs
Date: Wed, 23 Apr 2025 20:18:51 +0000 [thread overview]
Message-ID: <20250423201858.132630-2-jonathan.cavitt@intel.com> (raw)
In-Reply-To: <20250423201858.132630-1-jonathan.cavitt@intel.com>
The page fault handler should reject write/atomic access to read only
VMAs. Add code to handle this in handle_pagefault after the VMA lookup.
Fixes: 3d420e9fa848 ("drm/xe: Rework GPU page fault handling")
Signed-off-by: Jonathan Cavitt <jonathan.cavitt@intel.com>
Suggested-by: Matthew Brost <matthew.brost@intel.com>
Reviewed-by: Shuicheng Lin <shuicheng.lin@intel.com>
---
drivers/gpu/drm/xe/xe_gt_pagefault.c | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_gt_pagefault.c b/drivers/gpu/drm/xe/xe_gt_pagefault.c
index 10622ca471a2..d4e3b7eb165a 100644
--- a/drivers/gpu/drm/xe/xe_gt_pagefault.c
+++ b/drivers/gpu/drm/xe/xe_gt_pagefault.c
@@ -237,6 +237,11 @@ static int handle_pagefault(struct xe_gt *gt, struct pagefault *pf)
goto unlock_vm;
}
+ if (xe_vma_read_only(vma) && pf->access_type != ACCESS_TYPE_READ) {
+ err = -EPERM;
+ goto unlock_vm;
+ }
+
atomic = access_is_atomic(pf->access_type);
if (xe_vma_is_cpu_addr_mirror(vma))
--
2.43.0
next prev parent reply other threads:[~2025-04-23 20:19 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-04-23 20:18 [PATCH v21 0/5] drm/xe/xe_vm: Implement xe_vm_get_property_ioctl Jonathan Cavitt
2025-04-23 20:18 ` Jonathan Cavitt [this message]
2025-04-23 20:18 ` [PATCH v21 2/5] drm/xe/xe_gt_pagefault: Move pagefault struct to header Jonathan Cavitt
2025-04-23 20:18 ` [PATCH v21 3/5] drm/xe/uapi: Define drm_xe_vm_get_property Jonathan Cavitt
2025-04-24 1:57 ` Lin, Shuicheng
2025-04-24 2:15 ` Matthew Brost
2025-04-24 4:28 ` Lin, Shuicheng
2025-04-23 20:18 ` [PATCH v21 4/5] drm/xe/xe_vm: Add per VM fault info Jonathan Cavitt
2025-04-24 3:49 ` Lin, Shuicheng
2025-04-24 14:13 ` Cavitt, Jonathan
2025-04-23 20:18 ` [PATCH v21 5/5] drm/xe/xe_vm: Implement xe_vm_get_property_ioctl Jonathan Cavitt
2025-04-24 4:22 ` Lin, Shuicheng
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20250423201858.132630-2-jonathan.cavitt@intel.com \
--to=jonathan.cavitt@intel.com \
--cc=Michal.Wajdeczko@intel.com \
--cc=alex.zuo@intel.com \
--cc=dri-devel@lists.freedesktop.org \
--cc=intel-xe@lists.freedesktop.org \
--cc=ivan.briano@intel.com \
--cc=jianxun.zhang@intel.com \
--cc=john.c.harrison@intel.com \
--cc=joonas.lahtinen@linux.intel.com \
--cc=matthew.auld@intel.com \
--cc=matthew.brost@intel.com \
--cc=michal.mrozek@intel.com \
--cc=raag.jadav@intel.com \
--cc=saurabhg.gupta@intel.com \
--cc=shuicheng.lin@intel.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox