From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 998EDC3ABC3 for ; Tue, 13 May 2025 11:35:34 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5FA7010E3BF; Tue, 13 May 2025 11:35:34 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="fmSJ0Sus"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id C665510E3BF; Tue, 13 May 2025 11:35:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1747136134; x=1778672134; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=jdn9I3Tr6B5Qym8Orun2yQd38hLHg+UyLbGF4fw92as=; b=fmSJ0SusNCqW+lnGU32UXgBOqxkMYqTjgueEZqDI+03itDc3lXxpu+9Z xZYo+x+z2Ylp9cWypH6rx2Mdl7c8lB/Y4fRwAFWUdkYVe5k1LVVBemFcO 5NhwBycztbQUccnz5A9DEASwinQ85O5GSgN2Zbuj1yGJRN4g5zNA/bgru FKVKh6THXxTkJUVZL6EcPpWrvvTp+d7NeQGmYYIVGGHAR3D/JCEMMIC4J o/Fyz0q5fhxFxZ3tMJHiUxglFVcHZsktbGz8q5+hYfirP37b//0m00bV9 MhSFo5BWdNY3NcHctpNofH11+NLGMhjc/adDg160ALIcCJf/i5M008ViZ g==; X-CSE-ConnectionGUID: EdDc3ePYQ1qLolGbuexstw== X-CSE-MsgGUID: Ezk7blGRQbOhkL20i0YA5w== X-IronPort-AV: E=McAfee;i="6700,10204,11431"; a="59614407" X-IronPort-AV: E=Sophos;i="6.15,285,1739865600"; d="scan'208";a="59614407" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by fmvoesa105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 May 2025 04:35:33 -0700 X-CSE-ConnectionGUID: GSEa00LHRZiArKE6yUWuhA== X-CSE-MsgGUID: 8Dq/ODCkS3Gu5DeuSciDxQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.15,285,1739865600"; d="scan'208";a="142577260" Received: from administrator-system-product-name.igk.intel.com ([10.91.214.181]) by fmviesa005.fm.intel.com with ESMTP; 13 May 2025 04:35:32 -0700 From: =?UTF-8?q?Micha=C5=82=20Grzelak?= To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: =?UTF-8?q?Micha=C5=82=20Grzelak?= Subject: [PATCH v1 1/1] drm/i915/display: Add no_psr_reason to PSR debugfs Date: Tue, 13 May 2025 13:35:26 +0200 Message-ID: <20250513113526.2758433-2-michal.grzelak@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250513113526.2758433-1-michal.grzelak@intel.com> References: <20250513113526.2758433-1-michal.grzelak@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Organization: Intel Technology Poland sp. z o.o. - ul. Slowackiego 173, 80-298 Gdansk - KRS 101882 - NIP 957-07-52-316 Content-Transfer-Encoding: 8bit X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" There is no reason in debugfs why PSR has been disabled. Add no_psr_reason field into struct intel_psr. Write the reason, e.g. PSR setup timing not met, into proper PSR debugfs file. Signed-off-by: Michał Grzelak --- .../gpu/drm/i915/display/intel_display_types.h | 2 ++ drivers/gpu/drm/i915/display/intel_psr.c | 15 ++++++++------- 2 files changed, 10 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 7415564d058a..7d598357a702 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1653,6 +1653,8 @@ struct intel_psr { bool link_ok; u8 active_non_psr_pipes; + + const char *no_psr_reason; }; struct intel_dp { diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index ccd66bbc72f7..f0fdff236fef 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1577,6 +1577,7 @@ static bool _psr_compute_config(struct intel_dp *intel_dp, if (entry_setup_frames >= 0) { intel_dp->psr.entry_setup_frames = entry_setup_frames; } else { + intel_dp->psr.no_psr_reason = "PSR setup timing not met"; drm_dbg_kms(display->drm, "PSR condition failed: PSR setup timing not met\n"); return false; @@ -3918,12 +3919,7 @@ static void intel_psr_print_mode(struct intel_dp *intel_dp, struct seq_file *m) { struct intel_psr *psr = &intel_dp->psr; - const char *status, *mode, *region_et; - - if (psr->enabled) - status = " enabled"; - else - status = "disabled"; + const char *mode, *region_et; if (psr->panel_replay_enabled && psr->sel_update_enabled) mode = "Panel Replay Selective Update"; @@ -3941,7 +3937,12 @@ static void intel_psr_print_mode(struct intel_dp *intel_dp, else region_et = ""; - seq_printf(m, "PSR mode: %s%s%s\n", mode, status, region_et); + if (psr->enabled) { + seq_puts(m, "PSR enabled\n"); + seq_printf(m, "PSR mode: %s%s\n", mode, region_et); + } else { + seq_printf(m, "PSR disabled: %s\n", psr->no_psr_reason); + } } static int intel_psr_status(struct seq_file *m, struct intel_dp *intel_dp) -- 2.45.2