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([10.245.244.119]) by fmviesa008-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 21 May 2025 04:53:52 -0700 From: =?UTF-8?q?Jouni=20H=C3=B6gander?= To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: =?UTF-8?q?Jouni=20H=C3=B6gander?= , Ankit Nautiyal Subject: [PATCH v4 08/12] drm/i915/alpm: Move port alpm configuration Date: Wed, 21 May 2025 14:53:15 +0300 Message-ID: <20250521115319.2380655-9-jouni.hogander@intel.com> X-Mailer: git-send-email 2.43.0 In-Reply-To: <20250521115319.2380655-1-jouni.hogander@intel.com> References: <20250521115319.2380655-1-jouni.hogander@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Organization: Intel Finland Oy - BIC 0357606-4 - Westendinkatu 7, 02160 Espoo Content-Transfer-Encoding: 8bit X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" It is specified in Bspec where port alpm configuration is supposed to be performed. Change accordingly. v2: - drop HAS reference - ensure PORT_ALPM registers are not writen on older platform Bspec: 68849 Signed-off-by: Jouni Högander Reviewed-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_alpm.c | 48 ++++++++++++-------- drivers/gpu/drm/i915/display/intel_alpm.h | 2 + drivers/gpu/drm/i915/display/intel_cx0_phy.c | 1 + drivers/gpu/drm/i915/display/intel_ddi.c | 6 +++ 4 files changed, 39 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c index bbcf510b0c25..dfdde8e4eabe 100644 --- a/drivers/gpu/drm/i915/display/intel_alpm.c +++ b/drivers/gpu/drm/i915/display/intel_alpm.c @@ -336,7 +336,6 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp, { struct intel_display *display = to_intel_display(intel_dp); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; - enum port port = dp_to_dig_port(intel_dp)->base.port; u32 alpm_ctl; if (DISPLAY_VER(display) < 20 || (!intel_psr_needs_alpm(intel_dp, crtc_state) && @@ -368,23 +367,6 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp, pr_alpm_ctl); } - intel_de_write(display, - PORT_ALPM_CTL(port), - PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE | - PORT_ALPM_CTL_MAX_PHY_SWING_SETUP(15) | - PORT_ALPM_CTL_MAX_PHY_SWING_HOLD(0) | - PORT_ALPM_CTL_SILENCE_PERIOD( - intel_dp->alpm_parameters.silence_period_sym_clocks)); - - intel_de_write(display, - PORT_ALPM_LFPS_CTL(port), - PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT(10) | - PORT_ALPM_LFPS_CTL_LFPS_HALF_CYCLE_DURATION( - intel_dp->alpm_parameters.lfps_half_cycle_num_of_syms) | - PORT_ALPM_LFPS_CTL_FIRST_LFPS_HALF_CYCLE_DURATION( - intel_dp->alpm_parameters.lfps_half_cycle_num_of_syms) | - PORT_ALPM_LFPS_CTL_LAST_LFPS_HALF_CYCLE_DURATION( - intel_dp->alpm_parameters.lfps_half_cycle_num_of_syms)); } else { alpm_ctl = ALPM_CTL_EXTENDED_FAST_WAKE_ENABLE | ALPM_CTL_EXTENDED_FAST_WAKE_TIME(intel_dp->alpm_parameters.fast_wake_lines); @@ -408,6 +390,36 @@ void intel_alpm_configure(struct intel_dp *intel_dp, intel_dp->alpm_parameters.transcoder = crtc_state->cpu_transcoder; } +void intel_alpm_port_configure(struct intel_dp *intel_dp, + const struct intel_crtc_state *crtc_state) +{ + struct intel_display *display = to_intel_display(intel_dp); + enum port port = dp_to_dig_port(intel_dp)->base.port; + u32 alpm_ctl_val = 0, lfps_ctl_val = 0; + + if (DISPLAY_VER(display) < 20) + return; + + if (intel_alpm_is_alpm_aux_less(intel_dp, crtc_state)) { + alpm_ctl_val = PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE | + PORT_ALPM_CTL_MAX_PHY_SWING_SETUP(15) | + PORT_ALPM_CTL_MAX_PHY_SWING_HOLD(0) | + PORT_ALPM_CTL_SILENCE_PERIOD( + intel_dp->alpm_parameters.silence_period_sym_clocks); + lfps_ctl_val = PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT(10) | + PORT_ALPM_LFPS_CTL_LFPS_HALF_CYCLE_DURATION( + intel_dp->alpm_parameters.lfps_half_cycle_num_of_syms) | + PORT_ALPM_LFPS_CTL_FIRST_LFPS_HALF_CYCLE_DURATION( + intel_dp->alpm_parameters.lfps_half_cycle_num_of_syms) | + PORT_ALPM_LFPS_CTL_LAST_LFPS_HALF_CYCLE_DURATION( + intel_dp->alpm_parameters.lfps_half_cycle_num_of_syms); + } + + intel_de_write(display, PORT_ALPM_CTL(port), alpm_ctl_val); + + intel_de_write(display, PORT_ALPM_LFPS_CTL(port), lfps_ctl_val); +} + void intel_alpm_pre_plane_update(struct intel_atomic_state *state, struct intel_crtc *crtc) { diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h b/drivers/gpu/drm/i915/display/intel_alpm.h index 86f4d5ab1981..a861c20b5d79 100644 --- a/drivers/gpu/drm/i915/display/intel_alpm.h +++ b/drivers/gpu/drm/i915/display/intel_alpm.h @@ -27,6 +27,8 @@ void intel_alpm_enable_sink(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state); void intel_alpm_pre_plane_update(struct intel_atomic_state *state, struct intel_crtc *crtc); +void intel_alpm_port_configure(struct intel_dp *intel_dp, + const struct intel_crtc_state *crtc_state); void intel_alpm_post_plane_update(struct intel_atomic_state *state, struct intel_crtc *crtc); void intel_alpm_lobf_debugfs_add(struct intel_connector *connector); diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c index a82b93cbc81d..91118d115fd3 100644 --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c @@ -10,6 +10,7 @@ #include "i915_reg.h" #include "i915_utils.h" +#include "intel_alpm.h" #include "intel_cx0_phy.h" #include "intel_cx0_phy_regs.h" #include "intel_ddi.h" diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 0e6d618b5356..65ab012c3eae 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -3743,6 +3743,12 @@ static void mtl_ddi_prepare_link_retrain(struct intel_dp *intel_dp, intel_ddi_buf_enable(encoder, intel_dp->DP); intel_dp->DP |= DDI_BUF_CTL_ENABLE; + + /* + * 6.k If AUX-Less ALPM is going to be enabled + * i. Configure PORT_ALPM_CTL and PORT_ALPM_LFPS_CTL here + */ + intel_alpm_port_configure(intel_dp, crtc_state); } static void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp, -- 2.43.0