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From: "Michael J. Ruhl" <michael.j.ruhl@intel.com>
To: platform-driver-x86@vger.kernel.org,
	intel-xe@lists.freedesktop.org, hdegoede@redhat.com,
	ilpo.jarvinen@linux.intel.com, lucas.demarchi@intel.com,
	rodrigo.vivi@intel.com, thomas.hellstrom@linux.intel.com,
	airlied@gmail.com, simona@ffwll.ch, david.e.box@linux.intel.com
Cc: "Michael J. Ruhl" <michael.j.ruhl@intel.com>
Subject: [PATCH v4 08/10] platform/x86/intel/pmt: add register access helpers
Date: Tue, 10 Jun 2025 17:12:23 -0400	[thread overview]
Message-ID: <20250610211225.1085901-9-michael.j.ruhl@intel.com> (raw)
In-Reply-To: <20250610211225.1085901-1-michael.j.ruhl@intel.com>

The control register is used in a read/modify/write pattern.
The status register is used in a read/check bit pattern.

Add helpers to eliminate common code.

Signed-off-by: Michael J. Ruhl <michael.j.ruhl@intel.com>
---
 drivers/platform/x86/intel/pmt/crashlog.c | 58 +++++++++++------------
 1 file changed, 29 insertions(+), 29 deletions(-)

diff --git a/drivers/platform/x86/intel/pmt/crashlog.c b/drivers/platform/x86/intel/pmt/crashlog.c
index 99f0e85f2de6..e11865686f2a 100644
--- a/drivers/platform/x86/intel/pmt/crashlog.c
+++ b/drivers/platform/x86/intel/pmt/crashlog.c
@@ -63,20 +63,40 @@ struct pmt_crashlog_priv {
 /*
  * I/O
  */
-static bool pmt_crashlog_complete(struct intel_pmt_entry *entry)
+#define SET	true
+#define CLEAR	false
+
+static void read_modify_write(struct intel_pmt_entry *entry, u32 bit, bool set)
 {
-	u32 control = readl(entry->disc_table + CONTROL_OFFSET);
+	u32 reg = readl(entry->disc_table + CONTROL_OFFSET);
+
+	reg &= ~CRASHLOG_FLAG_TRIGGER_MASK;
+
+	if (set)
+		reg |= bit;
+	else
+		reg &= bit;
+
+	writel(reg, entry->disc_table + CONTROL_OFFSET);
+}
+
+static bool read_check(struct intel_pmt_entry *entry, u32 bit)
+{
+	u32 reg = readl(entry->disc_table + CONTROL_OFFSET);
+
+	return !!(reg & bit);
+}
 
+static bool pmt_crashlog_complete(struct intel_pmt_entry *entry)
+{
 	/* return current value of the crashlog complete flag */
-	return !!(control & CRASHLOG_FLAG_TRIGGER_COMPLETE);
+	return read_check(entry, CRASHLOG_FLAG_TRIGGER_COMPLETE);
 }
 
 static bool pmt_crashlog_disabled(struct intel_pmt_entry *entry)
 {
-	u32 control = readl(entry->disc_table + CONTROL_OFFSET);
-
 	/* return current value of the crashlog disabled flag */
-	return !!(control & CRASHLOG_FLAG_DISABLE);
+	return read_check(entry, CRASHLOG_FLAG_DISABLE);
 }
 
 static bool pmt_crashlog_supported(struct intel_pmt_entry *entry)
@@ -97,37 +117,17 @@ static bool pmt_crashlog_supported(struct intel_pmt_entry *entry)
 static void pmt_crashlog_set_disable(struct intel_pmt_entry *entry,
 				     bool disable)
 {
-	u32 control = readl(entry->disc_table + CONTROL_OFFSET);
-
-	/* clear trigger bits so we are only modifying disable flag */
-	control &= ~CRASHLOG_FLAG_TRIGGER_MASK;
-
-	if (disable)
-		control |= CRASHLOG_FLAG_DISABLE;
-	else
-		control &= ~CRASHLOG_FLAG_DISABLE;
-
-	writel(control, entry->disc_table + CONTROL_OFFSET);
+	read_modify_write(entry, CRASHLOG_FLAG_DISABLE, disable);
 }
 
 static void pmt_crashlog_set_clear(struct intel_pmt_entry *entry)
 {
-	u32 control = readl(entry->disc_table + CONTROL_OFFSET);
-
-	control &= ~CRASHLOG_FLAG_TRIGGER_MASK;
-	control |= CRASHLOG_FLAG_TRIGGER_CLEAR;
-
-	writel(control, entry->disc_table + CONTROL_OFFSET);
+	read_modify_write(entry, CRASHLOG_FLAG_TRIGGER_CLEAR, SET);
 }
 
 static void pmt_crashlog_set_execute(struct intel_pmt_entry *entry)
 {
-	u32 control = readl(entry->disc_table + CONTROL_OFFSET);
-
-	control &= ~CRASHLOG_FLAG_TRIGGER_MASK;
-	control |= CRASHLOG_FLAG_TRIGGER_EXECUTE;
-
-	writel(control, entry->disc_table + CONTROL_OFFSET);
+	read_modify_write(entry, CRASHLOG_FLAG_TRIGGER_EXECUTE, SET);
 }
 
 /*
-- 
2.49.0


  parent reply	other threads:[~2025-06-10 21:13 UTC|newest]

Thread overview: 27+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-10 21:12 [PATCH v4 00/10] Crashlog Type1 Version2 support Michael J. Ruhl
2025-06-10 21:12 ` [PATCH v4 01/10] platform/x86/intel/pmt: fix a crashlog NULL pointer access Michael J. Ruhl
2025-06-11  8:12   ` Upadhyay, Tejas
2025-06-11 10:42   ` Ilpo Järvinen
2025-06-11 12:40     ` Ruhl, Michael J
2025-06-11 13:29       ` Ilpo Järvinen
2025-06-10 21:12 ` [PATCH v4 02/10] drm/xe: Correct BMG VSEC header sizing Michael J. Ruhl
2025-06-10 21:12 ` [PATCH v4 03/10] platform/x86/intel/pmt: white space cleanup Michael J. Ruhl
2025-06-10 21:12 ` [PATCH v4 04/10] platform/x86/intel/pmt: use guard(mutex) Michael J. Ruhl
2025-06-10 21:12 ` [PATCH v4 05/10] platform/x86/intel/pmt: re-order trigger logic Michael J. Ruhl
2025-06-11 10:46   ` Ilpo Järvinen
2025-06-10 21:12 ` [PATCH v4 06/10] platform/x86/intel/pmt: correct types Michael J. Ruhl
2025-06-11 10:46   ` Ilpo Järvinen
2025-06-10 21:12 ` [PATCH v4 07/10] platform/x86/intel/pmt: decouple sysfs and namespace Michael J. Ruhl
2025-06-10 21:12 ` Michael J. Ruhl [this message]
2025-06-11 10:52   ` [PATCH v4 08/10] platform/x86/intel/pmt: add register access helpers Ilpo Järvinen
2025-06-10 21:12 ` [PATCH v4 09/10] platform/x86/intel/pmt: use a version struct Michael J. Ruhl
2025-06-11 11:05   ` Ilpo Järvinen
2025-06-10 21:12 ` [PATCH v4 10/10] platform/x86/intel/pmt: support BMG crashlog Michael J. Ruhl
2025-06-10 21:18 ` ✓ CI.Patch_applied: success for Crashlog Type1 Version2 support (rev4) Patchwork
2025-06-10 21:19 ` ✓ CI.checkpatch: " Patchwork
2025-06-10 21:20 ` ✓ CI.KUnit: " Patchwork
2025-06-10 21:31 ` ✓ CI.Build: " Patchwork
2025-06-10 21:33 ` ✓ CI.Hooks: " Patchwork
2025-06-10 21:35 ` ✓ CI.checksparse: " Patchwork
2025-06-10 22:01 ` ✓ Xe.CI.BAT: " Patchwork
2025-06-11  4:00 ` ✗ Xe.CI.Full: failure " Patchwork

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