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From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org
Subject: [PATCH 5/9] drm/i915/dmc: Reload pipe DMC state on TGL when enabling pipe A
Date: Wed, 11 Jun 2025 18:52:37 +0300	[thread overview]
Message-ID: <20250611155241.24191-6-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20250611155241.24191-1-ville.syrjala@linux.intel.com>

From: Ville Syrjälä <ville.syrjala@linux.intel.com>

On TGL/derivatives the entire pipe DMC state (program + MMIO) is
lost when PG1 is disabled, and the main DMC does not restore
any of it. Reload the state when enabling a pipe.

The other option would be to not load the pipe DMC at all since
it's only needed for "fast LACE" (which we don't use) on these
platforms. But let's keep it around just in case we ever decide
that "fast LACE" is something we want.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
 drivers/gpu/drm/i915/display/intel_dmc.c | 9 +++++++++
 1 file changed, 9 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_dmc.c b/drivers/gpu/drm/i915/display/intel_dmc.c
index 331db28039db..fd99c4645260 100644
--- a/drivers/gpu/drm/i915/display/intel_dmc.c
+++ b/drivers/gpu/drm/i915/display/intel_dmc.c
@@ -599,6 +599,12 @@ static void dmc_load_program(struct intel_display *display,
 	}
 }
 
+static bool need_pipedmc_load_program(struct intel_display *display)
+{
+	/* On TGL/derivatives pipe DMC state is lost when PG1 is disabled */
+	return DISPLAY_VER(display) == 12;
+}
+
 void intel_dmc_enable_pipe(struct intel_display *display, enum pipe pipe)
 {
 	enum intel_dmc_id dmc_id = PIPE_TO_DMC_ID(pipe);
@@ -606,6 +612,9 @@ void intel_dmc_enable_pipe(struct intel_display *display, enum pipe pipe)
 	if (!is_valid_dmc_id(dmc_id) || !has_dmc_id_fw(display, dmc_id))
 		return;
 
+	if (need_pipedmc_load_program(display))
+		dmc_load_program(display, dmc_id);
+
 	if (DISPLAY_VER(display) >= 20) {
 		intel_de_write(display, PIPEDMC_INTERRUPT(pipe), pipedmc_interrupt_mask(display));
 		intel_de_write(display, PIPEDMC_INTERRUPT_MASK(pipe), ~pipedmc_interrupt_mask(display));
-- 
2.49.0


  parent reply	other threads:[~2025-06-11 15:53 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-06-11 15:52 [PATCH 0/9] drm/i915/dmc: Deal with loss of pipe DMC state Ville Syrjala
2025-06-11 15:52 ` [PATCH 1/9] drm/i915/dmc: Limit pipe DMC clock gating w/a to just ADL/DG2/MTL Ville Syrjala
2025-06-11 15:52 ` [PATCH 2/9] drm/i915/dmc: Parametrize MTL_PIPEDMC_GATING_DIS Ville Syrjala
2025-06-11 15:52 ` [PATCH 3/9] drm/i915/dmc: Shuffle code around Ville Syrjala
2025-06-11 15:52 ` [PATCH 4/9] drm/i915/dmc: Extract dmc_load_program() Ville Syrjala
2025-06-12 20:16   ` Shankar, Uma
2025-06-13 14:18     ` Ville Syrjälä
2025-06-17 18:58       ` Shankar, Uma
2025-06-11 15:52 ` Ville Syrjala [this message]
2025-06-12 20:32   ` [PATCH 5/9] drm/i915/dmc: Reload pipe DMC state on TGL when enabling pipe A Shankar, Uma
2025-06-13 14:09     ` Ville Syrjälä
2025-06-17 18:51       ` Shankar, Uma
2025-06-11 15:52 ` [PATCH 6/9] drm/i915/dmc: Reload pipe DMC MMIO registers for pipe C/D on PTL+ Ville Syrjala
2025-06-11 15:52 ` [PATCH 7/9] drm/i915/dmc: Assert DMC is loaded harder Ville Syrjala
2025-06-12 20:55   ` Shankar, Uma
2025-06-11 15:52 ` [PATCH 8/9] drm/i915/dmc: Pass crtc_state to intel_dmc_{enable, disable}_pipe() Ville Syrjala
2025-06-12 20:58   ` Shankar, Uma
2025-06-11 15:52 ` [PATCH 9/9] drm/i915/dmc: Do not enable the pipe DMC on TGL when PSR is possible Ville Syrjala
2025-06-12 21:02   ` Shankar, Uma
2025-06-11 17:01 ` ✗ CI.checkpatch: warning for drm/i915/dmc: Deal with loss of pipe DMC state Patchwork
2025-06-11 17:02 ` ✓ CI.KUnit: success " Patchwork
2025-06-11 17:13 ` ✓ CI.Build: " Patchwork
2025-06-11 17:16 ` ✓ CI.Hooks: " Patchwork
2025-06-11 17:17 ` ✗ CI.checksparse: warning " Patchwork
2025-06-11 17:40 ` ✓ Xe.CI.BAT: success " Patchwork
2025-06-11 21:46 ` ✗ Xe.CI.Full: failure " Patchwork

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