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d="scan'208";a="159536533" Received: from cfl-desktop.iind.intel.com ([10.190.239.20]) by fmviesa004.fm.intel.com with ESMTP; 02 Jul 2025 02:08:10 -0700 From: Uma Shankar To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: chaitanya.kumar.borah@intel.com, ville.syrjala@linux.intel.com, pekka.paalanen@collabora.com, contact@emersion.fr, harry.wentland@amd.com, mwen@igalia.com, jadahl@redhat.com, sebastian.wick@redhat.com, shashank.sharma@amd.com, swati2.sharma@intel.com, alex.hung@amd.com, Uma Shankar Subject: [v5 10/24] drm/i915/color: Create a transfer function color pipeline Date: Wed, 2 Jul 2025 14:49:22 +0530 Message-ID: <20250702091936.3004854-11-uma.shankar@intel.com> X-Mailer: git-send-email 2.42.0 In-Reply-To: <20250702091936.3004854-1-uma.shankar@intel.com> References: <20250702091936.3004854-1-uma.shankar@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" From: Chaitanya Kumar Borah Add a color pipeline with three colorops in the sequence 1D LUT - 3x4 CTM - 1D LUT This pipeline can be used to do any color space conversion or HDR tone mapping v2: Change namespace to drm_plane_colorop* v3: Use simpler/pre-existing colorops for first iteration Signed-off-by: Uma Shankar Signed-off-by: Chaitanya Kumar Borah --- drivers/gpu/drm/i915/display/intel_color.c | 49 ++++++++++++++++++++++ drivers/gpu/drm/i915/display/intel_color.h | 3 ++ 2 files changed, 52 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c index 5f38a5ff541c..90ac6530d1a5 100644 --- a/drivers/gpu/drm/i915/display/intel_color.c +++ b/drivers/gpu/drm/i915/display/intel_color.c @@ -32,6 +32,10 @@ #include "intel_display_types.h" #include "intel_dsb.h" #include "intel_vrr.h" +#include "skl_universal_plane.h" + +#define PLANE_DEGAMMA_SIZE 128 +#define PLANE_GAMMA_SIZE 32 struct intel_color_funcs { int (*color_check)(struct intel_atomic_state *state, @@ -4001,6 +4005,51 @@ struct intel_plane_colorop *intel_plane_colorop_create(enum intel_color_block id return colorop; } +int intel_plane_tf_pipeline_init(struct drm_plane *plane, struct drm_prop_enum_list *list) +{ + struct intel_plane_colorop *colorop; + struct drm_device *dev = plane->dev; + int ret; + struct drm_colorop *prev_op; + + colorop = intel_plane_colorop_create(CB_PLANE_PRE_CSC_LUT); + + ret = drm_plane_colorop_curve_1d_lut_init(dev, &colorop->base, plane, + PLANE_DEGAMMA_SIZE, + DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR, + DRM_COLOROP_FLAG_ALLOW_BYPASS); + + if (ret) + return ret; + + list->type = colorop->base.base.id; + list->name = kasprintf(GFP_KERNEL, "Color Pipeline %d", colorop->base.base.id); + + /* TODO: handle failures and clean up*/ + prev_op = &colorop->base; + + colorop = intel_plane_colorop_create(CB_PLANE_CSC); + ret = drm_plane_colorop_ctm_3x4_init(dev, &colorop->base, plane, + DRM_COLOROP_FLAG_ALLOW_BYPASS); + if (ret) + return ret; + + drm_colorop_set_next_property(prev_op, &colorop->base); + prev_op = &colorop->base; + + colorop = intel_plane_colorop_create(CB_PLANE_POST_CSC_LUT); + ret = drm_plane_colorop_curve_1d_lut_init(dev, &colorop->base, plane, + PLANE_GAMMA_SIZE, + DRM_COLOROP_LUT1D_INTERPOLATION_LINEAR, + DRM_COLOROP_FLAG_ALLOW_BYPASS); + if (ret) + return ret; + + drm_colorop_set_next_property(prev_op, &colorop->base); + + return 0; +} + void intel_color_crtc_init(struct intel_crtc *crtc) { struct intel_display *display = to_intel_display(crtc); diff --git a/drivers/gpu/drm/i915/display/intel_color.h b/drivers/gpu/drm/i915/display/intel_color.h index f3c7cd694b99..ce9db761c6e2 100644 --- a/drivers/gpu/drm/i915/display/intel_color.h +++ b/drivers/gpu/drm/i915/display/intel_color.h @@ -14,6 +14,8 @@ struct intel_crtc; struct intel_display; struct intel_dsb; struct drm_property_blob; +struct drm_plane; +struct drm_prop_enum_list; enum intel_color_block; void intel_color_init_hooks(struct intel_display *display); @@ -43,5 +45,6 @@ bool intel_color_lut_equal(const struct intel_crtc_state *crtc_state, void intel_color_assert_luts(const struct intel_crtc_state *crtc_state); struct intel_plane_colorop *intel_colorop_alloc(void); struct intel_plane_colorop *intel_plane_colorop_create(enum intel_color_block id); +int intel_plane_tf_pipeline_init(struct drm_plane *plane, struct drm_prop_enum_list *list); #endif /* __INTEL_COLOR_H__ */ -- 2.42.0