[PATCH v7 0/9] Introducing firmware late binding

[PATCH v7 0/9] Introducing firmware late binding

[Badal Nilawar]

Introducing firmware late binding feature to enable firmware loading
for the devices, such as the fan controller and voltage regulator,
during the driver probe.
Typically, firmware for these devices are part of IFWI flash image but
can be replaced at probe after OEM tuning.

v2:
 - Dropped voltage regulator specific code as binaries for it will not
   be available for upstreaming as of now.
 - Address review comments
v3:
 - Dropped fwctl patch for now
 - Added new patch to extract binary version
 - Address v2 review comments
v4:
 - Address v3 review comments
v5:
 xe_kmd:
 - Dropped mutex is worker flush in unbind blocking component
   removal while fw download is in progress
 - Handled the fw load in all 3 scenarios (probe, system resume, rpm resume)
   by holding rpm wake ref in outer bounds of worker.
 mei:
 - Most of the review comments
v6:
 - rebased
 - Disabled fw load upon error
v7:
 xe_kmd:
 - resolved kernel doc warnings
 mei:
 - Address v6 review comments (greg kh)

 - Dropped patch 10

Alexander Usyskin (2):
  mei: bus: add mei_cldev_mtu interface
  mei: late_bind: add late binding component driver

Badal Nilawar (7):
  drm/xe/xe_late_bind_fw: Introducing xe_late_bind_fw
  drm/xe/xe_late_bind_fw: Initialize late binding firmware
  drm/xe/xe_late_bind_fw: Load late binding firmware
  drm/xe/xe_late_bind_fw: Reload late binding fw in rpm resume
  drm/xe/xe_late_bind_fw: Reload late binding fw during system resume
  drm/xe/xe_late_bind_fw: Introduce debug fs node to disable late
    binding
  drm/xe/xe_late_bind_fw: Extract and print version info

 drivers/gpu/drm/xe/Makefile                 |   1 +
 drivers/gpu/drm/xe/xe_debugfs.c             |  41 ++
 drivers/gpu/drm/xe/xe_device.c              |   5 +
 drivers/gpu/drm/xe/xe_device_types.h        |   6 +
 drivers/gpu/drm/xe/xe_late_bind_fw.c        | 462 ++++++++++++++++++++
 drivers/gpu/drm/xe/xe_late_bind_fw.h        |  17 +
 drivers/gpu/drm/xe/xe_late_bind_fw_types.h  |  75 ++++
 drivers/gpu/drm/xe/xe_pci.c                 |   2 +
 drivers/gpu/drm/xe/xe_pci_types.h           |   1 +
 drivers/gpu/drm/xe/xe_pm.c                  |   8 +
 drivers/gpu/drm/xe/xe_uc_fw_abi.h           |  66 +++
 drivers/misc/mei/Kconfig                    |  11 +
 drivers/misc/mei/Makefile                   |   1 +
 drivers/misc/mei/bus.c                      |  13 +
 drivers/misc/mei/mei_late_bind.c            | 271 ++++++++++++
 include/drm/intel/i915_component.h          |   1 +
 include/drm/intel/late_bind_mei_interface.h |  62 +++
 include/linux/mei_cl_bus.h                  |   1 +
 18 files changed, 1044 insertions(+)
 create mode 100644 drivers/gpu/drm/xe/xe_late_bind_fw.c
 create mode 100644 drivers/gpu/drm/xe/xe_late_bind_fw.h
 create mode 100644 drivers/gpu/drm/xe/xe_late_bind_fw_types.h
 create mode 100644 drivers/misc/mei/mei_late_bind.c
 create mode 100644 include/drm/intel/late_bind_mei_interface.h

-- 
2.34.1

[PATCH v7 1/9] mei: bus: add mei_cldev_mtu interface

[Badal Nilawar]

From: Alexander Usyskin <alexander.usyskin@intel.com>

Allow to bus client to obtain client mtu.

Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Reviewed-by: Umesh Nerlige Ramappa <umesh.nerlige.ramappa@intel.com>
---
 drivers/misc/mei/bus.c     | 13 +++++++++++++
 include/linux/mei_cl_bus.h |  1 +
 2 files changed, 14 insertions(+)

diff --git a/drivers/misc/mei/bus.c b/drivers/misc/mei/bus.c
index 67176caf5416..f860b1b6eda0 100644
--- a/drivers/misc/mei/bus.c
+++ b/drivers/misc/mei/bus.c
@@ -614,6 +614,19 @@ u8 mei_cldev_ver(const struct mei_cl_device *cldev)
 }
 EXPORT_SYMBOL_GPL(mei_cldev_ver);
 
+/**
+ * mei_cldev_mtu - max message that client can send and receive
+ *
+ * @cldev: mei client device
+ *
+ * Return: mtu or 0 if client is not connected
+ */
+size_t mei_cldev_mtu(const struct mei_cl_device *cldev)
+{
+	return mei_cl_mtu(cldev->cl);
+}
+EXPORT_SYMBOL_GPL(mei_cldev_mtu);
+
 /**
  * mei_cldev_enabled - check whether the device is enabled
  *
diff --git a/include/linux/mei_cl_bus.h b/include/linux/mei_cl_bus.h
index 725fd7727422..a82755e1fc40 100644
--- a/include/linux/mei_cl_bus.h
+++ b/include/linux/mei_cl_bus.h
@@ -113,6 +113,7 @@ int mei_cldev_register_notif_cb(struct mei_cl_device *cldev,
 				mei_cldev_cb_t notif_cb);
 
 u8 mei_cldev_ver(const struct mei_cl_device *cldev);
+size_t mei_cldev_mtu(const struct mei_cl_device *cldev);
 
 void *mei_cldev_get_drvdata(const struct mei_cl_device *cldev);
 void mei_cldev_set_drvdata(struct mei_cl_device *cldev, void *data);
-- 
2.34.1

[PATCH v7 2/9] mei: late_bind: add late binding component driver

[Badal Nilawar]

From: Alexander Usyskin <alexander.usyskin@intel.com>

Add late binding component driver.
It allows pushing the late binding configuration from, for example,
the Xe graphics driver to the Intel discrete graphics card's CSE device.

Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 drivers/misc/mei/Kconfig                    |  11 +
 drivers/misc/mei/Makefile                   |   1 +
 drivers/misc/mei/mei_late_bind.c            | 271 ++++++++++++++++++++
 include/drm/intel/i915_component.h          |   1 +
 include/drm/intel/late_bind_mei_interface.h |  62 +++++
 5 files changed, 346 insertions(+)
 create mode 100644 drivers/misc/mei/mei_late_bind.c
 create mode 100644 include/drm/intel/late_bind_mei_interface.h

diff --git a/drivers/misc/mei/Kconfig b/drivers/misc/mei/Kconfig
index 7575fee96cc6..36569604038c 100644
--- a/drivers/misc/mei/Kconfig
+++ b/drivers/misc/mei/Kconfig
@@ -81,6 +81,17 @@ config INTEL_MEI_VSC
 	  This driver can also be built as a module. If so, the module
 	  will be called mei-vsc.
 
+config INTEL_MEI_LATE_BIND
+	tristate "Intel late binding support on ME Interface"
+	depends on INTEL_MEI_ME
+	depends on DRM_XE
+	help
+	  MEI Support for Late Binding for Intel graphics card.
+
+	  Enables the ME FW interfaces for Late Binding feature,
+	  allowing loading of firmware for the devices like Fan
+	  Controller by Intel Xe driver.
+
 source "drivers/misc/mei/hdcp/Kconfig"
 source "drivers/misc/mei/pxp/Kconfig"
 source "drivers/misc/mei/gsc_proxy/Kconfig"
diff --git a/drivers/misc/mei/Makefile b/drivers/misc/mei/Makefile
index 6f9fdbf1a495..b639a897b472 100644
--- a/drivers/misc/mei/Makefile
+++ b/drivers/misc/mei/Makefile
@@ -31,6 +31,7 @@ CFLAGS_mei-trace.o = -I$(src)
 obj-$(CONFIG_INTEL_MEI_HDCP) += hdcp/
 obj-$(CONFIG_INTEL_MEI_PXP) += pxp/
 obj-$(CONFIG_INTEL_MEI_GSC_PROXY) += gsc_proxy/
+obj-$(CONFIG_INTEL_MEI_LATE_BIND) += mei_late_bind.o
 
 obj-$(CONFIG_INTEL_MEI_VSC_HW) += mei-vsc-hw.o
 mei-vsc-hw-y := vsc-tp.o
diff --git a/drivers/misc/mei/mei_late_bind.c b/drivers/misc/mei/mei_late_bind.c
new file mode 100644
index 000000000000..48f70c05dd53
--- /dev/null
+++ b/drivers/misc/mei/mei_late_bind.c
@@ -0,0 +1,271 @@
+// SPDX-License-Identifier: GPL-2.0
+/*
+ * Copyright (C) 2025 Intel Corporation
+ */
+#include <drm/intel/i915_component.h>
+#include <drm/intel/late_bind_mei_interface.h>
+#include <linux/component.h>
+#include <linux/pci.h>
+#include <linux/mei_cl_bus.h>
+#include <linux/module.h>
+#include <linux/overflow.h>
+#include <linux/slab.h>
+#include <linux/uuid.h>
+
+#include "mkhi.h"
+
+#define GFX_SRV_MKHI_LATE_BINDING_CMD 0x12
+#define GFX_SRV_MKHI_LATE_BINDING_RSP (GFX_SRV_MKHI_LATE_BINDING_CMD | 0x80)
+
+#define LATE_BIND_SEND_TIMEOUT_MSEC 3000
+#define LATE_BIND_RECV_TIMEOUT_MSEC 3000
+
+/**
+ * struct csc_heci_late_bind_req - late binding request
+ * @header: @ref mkhi_msg_hdr
+ * @type: type of the late binding payload
+ * @flags: flags to be passed to the firmware
+ * @reserved: reserved for future use by firmware, must be set to 0
+ * @payload_size: size of the payload data in bytes
+ * @payload: data to be sent to the firmware
+ */
+struct csc_heci_late_bind_req {
+	struct mkhi_msg_hdr header;
+	__le32 type;
+	__le32 flags;
+	__le32 reserved[2];
+	__le32 payload_size;
+	u8  payload[] __counted_by(payload_size);
+} __packed;
+
+/**
+ * struct csc_heci_late_bind_rsp - late binding response
+ * @header: @ref mkhi_msg_hdr
+ * @type: type of the late binding payload
+ * @reserved: reserved for future use by firmware, must be set to 0
+ * @status: status of the late binding command execution by firmware
+ */
+struct csc_heci_late_bind_rsp {
+	struct mkhi_msg_hdr header;
+	__le32 type;
+	__le32 reserved[2];
+	__le32 status;
+} __packed;
+
+static int mei_late_bind_check_response(const struct device *dev, const struct mkhi_msg_hdr *hdr)
+{
+	if (hdr->group_id != MKHI_GROUP_ID_GFX) {
+		dev_err(dev, "Mismatch group id: 0x%x instead of 0x%x\n",
+			hdr->group_id, MKHI_GROUP_ID_GFX);
+		return -EINVAL;
+	}
+
+	if (hdr->command != GFX_SRV_MKHI_LATE_BINDING_RSP) {
+		dev_err(dev, "Mismatch command: 0x%x instead of 0x%x\n",
+			hdr->command, GFX_SRV_MKHI_LATE_BINDING_RSP);
+		return -EINVAL;
+	}
+
+	if (hdr->result) {
+		dev_err(dev, "Error in result: 0x%x\n", hdr->result);
+		return -EINVAL;
+	}
+
+	return 0;
+}
+
+static int mei_late_bind_push_config(struct device *dev, enum late_bind_type type, u32 flags,
+				     const void *payload, size_t payload_size)
+{
+	struct mei_cl_device *cldev;
+	struct csc_heci_late_bind_req *req = NULL;
+	struct csc_heci_late_bind_rsp rsp;
+	size_t req_size;
+	ssize_t bytes;
+	int ret;
+
+	cldev = to_mei_cl_device(dev);
+
+	ret = mei_cldev_enable(cldev);
+	if (ret) {
+		dev_dbg(dev, "mei_cldev_enable failed. %d\n", ret);
+		return ret;
+	}
+
+	req_size = struct_size(req, payload, payload_size);
+	if (req_size > mei_cldev_mtu(cldev)) {
+		dev_err(dev, "Payload is too big %zu\n", payload_size);
+		ret = -EMSGSIZE;
+		goto end;
+	}
+
+	req = kmalloc(req_size, GFP_KERNEL);
+	if (!req) {
+		ret = -ENOMEM;
+		goto end;
+	}
+
+	req->header.group_id = MKHI_GROUP_ID_GFX;
+	req->header.command = GFX_SRV_MKHI_LATE_BINDING_CMD;
+	req->type = cpu_to_le32(type);
+	req->flags = cpu_to_le32(flags);
+	req->reserved[0] = 0;
+	req->reserved[1] = 0;
+	req->payload_size = cpu_to_le32(payload_size);
+	memcpy(req->payload, payload, payload_size);
+
+	bytes = mei_cldev_send_timeout(cldev,
+				       (void *)req, req_size, LATE_BIND_SEND_TIMEOUT_MSEC);
+	if (bytes < 0) {
+		dev_err(dev, "mei_cldev_send failed. %zd\n", bytes);
+		ret = bytes;
+		goto end;
+	}
+
+	bytes = mei_cldev_recv_timeout(cldev,
+				       (void *)&rsp, sizeof(rsp), LATE_BIND_RECV_TIMEOUT_MSEC);
+	if (bytes < 0) {
+		dev_err(dev, "mei_cldev_recv failed. %zd\n", bytes);
+		ret = bytes;
+		goto end;
+	}
+	if (bytes < sizeof(rsp.header)) {
+		dev_err(dev, "bad response header from the firmware: size %zd < %zu\n",
+			bytes, sizeof(rsp.header));
+		ret = -EPROTO;
+		goto end;
+	}
+	if (mei_late_bind_check_response(dev, &rsp.header)) {
+		dev_err(dev, "bad result response from the firmware: 0x%x\n",
+			*(uint32_t *)&rsp.header);
+		ret = -EPROTO;
+		goto end;
+	}
+	if (bytes < sizeof(rsp)) {
+		dev_err(dev, "bad response from the firmware: size %zd < %zu\n",
+			bytes, sizeof(rsp));
+		ret = -EPROTO;
+		goto end;
+	}
+
+	dev_dbg(dev, "status = %u\n", le32_to_cpu(rsp.status));
+	ret = (int)le32_to_cpu(rsp.status);
+end:
+	mei_cldev_disable(cldev);
+	kfree(req);
+	return ret;
+}
+
+static const struct late_bind_component_ops mei_late_bind_ops = {
+	.push_config = mei_late_bind_push_config,
+};
+
+static int mei_component_master_bind(struct device *dev)
+{
+	return component_bind_all(dev, (void *)&mei_late_bind_ops);
+}
+
+static void mei_component_master_unbind(struct device *dev)
+{
+	component_unbind_all(dev, (void *)&mei_late_bind_ops);
+}
+
+static const struct component_master_ops mei_component_master_ops = {
+	.bind = mei_component_master_bind,
+	.unbind = mei_component_master_unbind,
+};
+
+/**
+ * mei_late_bind_component_match - compare function for matching mei late bind.
+ *
+ *    This function checks if requester is Intel PCI_CLASS_DISPLAY_VGA or
+ *    PCI_CLASS_DISPLAY_OTHER device, and checks if the requester is the
+ *    grand parent of mei_if i.e. late_bind mei device
+ *
+ * @dev: master device
+ * @subcomponent: subcomponent to match (INTEL_COMPONENT_LATE_BIND)
+ * @data: compare data (late_bind mei device on mei bus)
+ *
+ * Return:
+ * * 1 - if components match
+ * * 0 - otherwise
+ */
+static int mei_late_bind_component_match(struct device *dev, int subcomponent,
+					 void *data)
+{
+	struct device *base = data;
+	struct pci_dev *pdev;
+
+	if (!dev)
+		return 0;
+
+	if (!dev_is_pci(dev))
+		return 0;
+
+	pdev = to_pci_dev(dev);
+
+	if (pdev->vendor != PCI_VENDOR_ID_INTEL)
+		return 0;
+
+	if (pdev->class != (PCI_CLASS_DISPLAY_VGA << 8) &&
+	    pdev->class != (PCI_CLASS_DISPLAY_OTHER << 8))
+		return 0;
+
+	if (subcomponent != INTEL_COMPONENT_LATE_BIND)
+		return 0;
+
+	base = base->parent;
+	if (!base) /* mei device */
+		return 0;
+
+	base = base->parent; /* pci device */
+
+	return !!base && dev == base;
+}
+
+static int mei_late_bind_probe(struct mei_cl_device *cldev,
+			       const struct mei_cl_device_id *id)
+{
+	struct component_match *master_match = NULL;
+	int ret;
+
+	component_match_add_typed(&cldev->dev, &master_match,
+				  mei_late_bind_component_match, &cldev->dev);
+	if (IS_ERR_OR_NULL(master_match))
+		return -ENOMEM;
+
+	ret = component_master_add_with_match(&cldev->dev,
+					      &mei_component_master_ops,
+					      master_match);
+	if (ret < 0)
+		dev_err(&cldev->dev, "Master comp add failed %d\n", ret);
+
+	return ret;
+}
+
+static void mei_late_bind_remove(struct mei_cl_device *cldev)
+{
+	component_master_del(&cldev->dev, &mei_component_master_ops);
+}
+
+#define MEI_GUID_MKHI UUID_LE(0xe2c2afa2, 0x3817, 0x4d19, \
+			      0x9d, 0x95, 0x6, 0xb1, 0x6b, 0x58, 0x8a, 0x5d)
+
+static struct mei_cl_device_id mei_late_bind_tbl[] = {
+	{ .uuid = MEI_GUID_MKHI, .version = MEI_CL_VERSION_ANY },
+	{ }
+};
+MODULE_DEVICE_TABLE(mei, mei_late_bind_tbl);
+
+static struct mei_cl_driver mei_late_bind_driver = {
+	.id_table = mei_late_bind_tbl,
+	.name = KBUILD_MODNAME,
+	.probe = mei_late_bind_probe,
+	.remove	= mei_late_bind_remove,
+};
+
+module_mei_cl_driver(mei_late_bind_driver);
+
+MODULE_AUTHOR("Intel Corporation");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("MEI Late Binding");
diff --git a/include/drm/intel/i915_component.h b/include/drm/intel/i915_component.h
index 4ea3b17aa143..456849a97d75 100644
--- a/include/drm/intel/i915_component.h
+++ b/include/drm/intel/i915_component.h
@@ -31,6 +31,7 @@ enum i915_component_type {
 	I915_COMPONENT_HDCP,
 	I915_COMPONENT_PXP,
 	I915_COMPONENT_GSC_PROXY,
+	INTEL_COMPONENT_LATE_BIND,
 };
 
 /* MAX_PORT is the number of port
diff --git a/include/drm/intel/late_bind_mei_interface.h b/include/drm/intel/late_bind_mei_interface.h
new file mode 100644
index 000000000000..ad5f21330087
--- /dev/null
+++ b/include/drm/intel/late_bind_mei_interface.h
@@ -0,0 +1,62 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright (c) 2025 Intel Corporation
+ */
+
+#ifndef _LATE_BIND_MEI_INTERFACE_H_
+#define _LATE_BIND_MEI_INTERFACE_H_
+
+#include <linux/types.h>
+
+struct device;
+struct module;
+
+/**
+ * Late Binding flags
+ * Persistent across warm reset
+ */
+#define CSC_LATE_BINDING_FLAGS_IS_PERSISTENT	BIT(0)
+
+/**
+ * xe_late_bind_fw_type - enum to determine late binding fw type
+ */
+enum late_bind_type {
+	CSC_LATE_BINDING_TYPE_FAN_CONTROL = 1,
+};
+
+/**
+ * Late Binding payload status
+ */
+enum csc_late_binding_status {
+	CSC_LATE_BINDING_STATUS_SUCCESS           = 0,
+	CSC_LATE_BINDING_STATUS_4ID_MISMATCH      = 1,
+	CSC_LATE_BINDING_STATUS_ARB_FAILURE       = 2,
+	CSC_LATE_BINDING_STATUS_GENERAL_ERROR     = 3,
+	CSC_LATE_BINDING_STATUS_INVALID_PARAMS    = 4,
+	CSC_LATE_BINDING_STATUS_INVALID_SIGNATURE = 5,
+	CSC_LATE_BINDING_STATUS_INVALID_PAYLOAD   = 6,
+	CSC_LATE_BINDING_STATUS_TIMEOUT           = 7,
+};
+
+/**
+ * struct late_bind_component_ops - ops for Late Binding services.
+ * @owner: Module providing the ops
+ * @push_config: Sends a config to FW.
+ */
+struct late_bind_component_ops {
+	/**
+	 * @push_config: Sends a config to FW.
+	 * @dev: device struct corresponding to the mei device
+	 * @type: payload type
+	 * @flags: payload flags
+	 * @payload: payload buffer
+	 * @payload_size: payload buffer size
+	 *
+	 * Return: 0 success, negative errno value on transport failure,
+	 *         positive status returned by FW
+	 */
+	int (*push_config)(struct device *dev, u32 type, u32 flags,
+			   const void *payload, size_t payload_size);
+};
+
+#endif /* _LATE_BIND_MEI_INTERFACE_H_ */
-- 
2.34.1

[PATCH v7 3/9] drm/xe/xe_late_bind_fw: Introducing xe_late_bind_fw

[Badal Nilawar]

Introducing xe_late_bind_fw to enable firmware loading for the devices,
such as the fan controller, during the driver probe. Typically,
firmware for such devices are part of IFWI flash image but can be
replaced at probe after OEM tuning.
This patch binds mei late binding component to enable firmware loading.

v2:
 - Add devm_add_action_or_reset to remove the component (Daniele)
 - Add INTEL_MEI_GSC check in xe_late_bind_init() (Daniele)
v3:
 - Fail driver probe if late bind initialization fails,
   add has_late_bind flag (Daniele)
v4:
 - %S/I915_COMPONENT_LATE_BIND/INTEL_COMPONENT_LATE_BIND/
v6:
 - rebased

Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
 drivers/gpu/drm/xe/Makefile                |  1 +
 drivers/gpu/drm/xe/xe_device.c             |  5 ++
 drivers/gpu/drm/xe/xe_device_types.h       |  6 ++
 drivers/gpu/drm/xe/xe_late_bind_fw.c       | 84 ++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_late_bind_fw.h       | 15 ++++
 drivers/gpu/drm/xe/xe_late_bind_fw_types.h | 33 +++++++++
 drivers/gpu/drm/xe/xe_pci.c                |  2 +
 drivers/gpu/drm/xe/xe_pci_types.h          |  1 +
 8 files changed, 147 insertions(+)
 create mode 100644 drivers/gpu/drm/xe/xe_late_bind_fw.c
 create mode 100644 drivers/gpu/drm/xe/xe_late_bind_fw.h
 create mode 100644 drivers/gpu/drm/xe/xe_late_bind_fw_types.h

diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 7c039caefd00..521547d78fd2 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -76,6 +76,7 @@ xe-y += xe_bb.o \
 	xe_hw_fence.o \
 	xe_irq.o \
 	xe_lrc.o \
+	xe_late_bind_fw.o \
 	xe_migrate.o \
 	xe_mmio.o \
 	xe_mocs.o \
diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 0b73cb72bad1..cb595bae5f55 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -44,6 +44,7 @@
 #include "xe_hw_engine_group.h"
 #include "xe_hwmon.h"
 #include "xe_irq.h"
+#include "xe_late_bind_fw.h"
 #include "xe_mmio.h"
 #include "xe_module.h"
 #include "xe_nvm.h"
@@ -866,6 +867,10 @@ int xe_device_probe(struct xe_device *xe)
 	if (err)
 		return err;
 
+	err = xe_late_bind_init(&xe->late_bind);
+	if (err && err != -ENODEV)
+		return err;
+
 	err = xe_oa_init(xe);
 	if (err)
 		return err;
diff --git a/drivers/gpu/drm/xe/xe_device_types.h b/drivers/gpu/drm/xe/xe_device_types.h
index 78c4acafd268..a8891833f980 100644
--- a/drivers/gpu/drm/xe/xe_device_types.h
+++ b/drivers/gpu/drm/xe/xe_device_types.h
@@ -16,6 +16,7 @@
 #include "xe_devcoredump_types.h"
 #include "xe_heci_gsc.h"
 #include "xe_lmtt_types.h"
+#include "xe_late_bind_fw_types.h"
 #include "xe_memirq_types.h"
 #include "xe_oa_types.h"
 #include "xe_platform_types.h"
@@ -325,6 +326,8 @@ struct xe_device {
 		u8 has_heci_cscfi:1;
 		/** @info.has_heci_gscfi: device has heci gscfi */
 		u8 has_heci_gscfi:1;
+		/** @info.has_late_bind: Device has firmware late binding support */
+		u8 has_late_bind:1;
 		/** @info.has_llc: Device has a shared CPU+GPU last level cache */
 		u8 has_llc:1;
 		/** @info.has_mbx_power_limits: Device has support to manage power limits using
@@ -557,6 +560,9 @@ struct xe_device {
 	/** @nvm: discrete graphics non-volatile memory */
 	struct intel_dg_nvm_dev *nvm;
 
+	/** @late_bind: xe mei late bind interface */
+	struct xe_late_bind late_bind;
+
 	/** @oa: oa observation subsystem */
 	struct xe_oa oa;
 
diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw.c b/drivers/gpu/drm/xe/xe_late_bind_fw.c
new file mode 100644
index 000000000000..17808eb21905
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw.c
@@ -0,0 +1,84 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2025 Intel Corporation
+ */
+
+#include <linux/component.h>
+#include <linux/delay.h>
+
+#include <drm/drm_managed.h>
+#include <drm/intel/i915_component.h>
+#include <drm/intel/late_bind_mei_interface.h>
+#include <drm/drm_print.h>
+
+#include "xe_device.h"
+#include "xe_late_bind_fw.h"
+
+static struct xe_device *
+late_bind_to_xe(struct xe_late_bind *late_bind)
+{
+	return container_of(late_bind, struct xe_device, late_bind);
+}
+
+static int xe_late_bind_component_bind(struct device *xe_kdev,
+				       struct device *mei_kdev, void *data)
+{
+	struct xe_device *xe = kdev_to_xe_device(xe_kdev);
+	struct xe_late_bind *late_bind = &xe->late_bind;
+
+	late_bind->component.ops = data;
+	late_bind->component.mei_dev = mei_kdev;
+
+	return 0;
+}
+
+static void xe_late_bind_component_unbind(struct device *xe_kdev,
+					  struct device *mei_kdev, void *data)
+{
+	struct xe_device *xe = kdev_to_xe_device(xe_kdev);
+	struct xe_late_bind *late_bind = &xe->late_bind;
+
+	late_bind->component.ops = NULL;
+}
+
+static const struct component_ops xe_late_bind_component_ops = {
+	.bind   = xe_late_bind_component_bind,
+	.unbind = xe_late_bind_component_unbind,
+};
+
+static void xe_late_bind_remove(void *arg)
+{
+	struct xe_late_bind *late_bind = arg;
+	struct xe_device *xe = late_bind_to_xe(late_bind);
+
+	component_del(xe->drm.dev, &xe_late_bind_component_ops);
+}
+
+/**
+ * xe_late_bind_init() - add xe mei late binding component
+ * @late_bind: pointer to late bind structure.
+ *
+ * Return: 0 if the initialization was successful, a negative errno otherwise.
+ */
+int xe_late_bind_init(struct xe_late_bind *late_bind)
+{
+	struct xe_device *xe = late_bind_to_xe(late_bind);
+	int err;
+
+	if (!xe->info.has_late_bind)
+		return 0;
+
+	if (!IS_ENABLED(CONFIG_INTEL_MEI_LATE_BIND) || !IS_ENABLED(CONFIG_INTEL_MEI_GSC)) {
+		drm_info(&xe->drm, "Can't init xe mei late bind missing mei component\n");
+		return -ENODEV;
+	}
+
+	err = component_add_typed(xe->drm.dev, &xe_late_bind_component_ops,
+				  INTEL_COMPONENT_LATE_BIND);
+	if (err < 0) {
+		drm_info(&xe->drm, "Failed to add mei late bind component (%pe)\n", ERR_PTR(err));
+		return err;
+	}
+
+	return devm_add_action_or_reset(xe->drm.dev, xe_late_bind_remove, late_bind);
+}
diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw.h b/drivers/gpu/drm/xe/xe_late_bind_fw.h
new file mode 100644
index 000000000000..4c73571c3e62
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2025 Intel Corporation
+ */
+
+#ifndef _XE_LATE_BIND_FW_H_
+#define _XE_LATE_BIND_FW_H_
+
+#include <linux/types.h>
+
+struct xe_late_bind;
+
+int xe_late_bind_init(struct xe_late_bind *late_bind);
+
+#endif
diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw_types.h b/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
new file mode 100644
index 000000000000..f79e5aefed94
--- /dev/null
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
@@ -0,0 +1,33 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2025 Intel Corporation
+ */
+
+#ifndef _XE_LATE_BIND_TYPES_H_
+#define _XE_LATE_BIND_TYPES_H_
+
+#include <linux/iosys-map.h>
+#include <linux/mutex.h>
+#include <linux/types.h>
+
+/**
+ * struct xe_late_bind_component - Late Binding services component
+ * @mei_dev: device that provide Late Binding service.
+ * @ops: Ops implemented by Late Binding driver, used by Xe driver.
+ *
+ * Communication between Xe and MEI drivers for Late Binding services
+ */
+struct xe_late_bind_component {
+	struct device *mei_dev;
+	const struct late_bind_component_ops *ops;
+};
+
+/**
+ * struct xe_late_bind
+ */
+struct xe_late_bind {
+	/** @component: struct for communication with mei component */
+	struct xe_late_bind_component component;
+};
+
+#endif
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 755e335c8e18..c5e33a79dcd7 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -328,6 +328,7 @@ static const struct xe_device_desc bmg_desc = {
 	.has_gsc_nvm = 1,
 	.has_heci_cscfi = 1,
 	.max_gt_per_tile = 2,
+	.has_late_bind = true,
 	.needs_scratch = true,
 };
 
@@ -574,6 +575,7 @@ static int xe_info_init_early(struct xe_device *xe,
 	xe->info.has_gsc_nvm = desc->has_gsc_nvm;
 	xe->info.has_heci_gscfi = desc->has_heci_gscfi;
 	xe->info.has_heci_cscfi = desc->has_heci_cscfi;
+	xe->info.has_late_bind = desc->has_late_bind;
 	xe->info.has_llc = desc->has_llc;
 	xe->info.has_pxp = desc->has_pxp;
 	xe->info.has_sriov = desc->has_sriov;
diff --git a/drivers/gpu/drm/xe/xe_pci_types.h b/drivers/gpu/drm/xe/xe_pci_types.h
index 4de6f69ed975..51a607d323fb 100644
--- a/drivers/gpu/drm/xe/xe_pci_types.h
+++ b/drivers/gpu/drm/xe/xe_pci_types.h
@@ -39,6 +39,7 @@ struct xe_device_desc {
 	u8 has_gsc_nvm:1;
 	u8 has_heci_gscfi:1;
 	u8 has_heci_cscfi:1;
+	u8 has_late_bind:1;
 	u8 has_llc:1;
 	u8 has_mbx_power_limits:1;
 	u8 has_pxp:1;
-- 
2.34.1

[PATCH v7 4/9] drm/xe/xe_late_bind_fw: Initialize late binding firmware

[Badal Nilawar]

Search for late binding firmware binaries and populate the meta data of
firmware structures.

v2 (Daniele):
 - drm_err if firmware size is more than max pay load size
 - s/request_firmware/firmware_request_nowarn/ as firmware will
   not be available for all possible cards
v3 (Daniele):
 - init firmware from within xe_late_bind_init, propagate error
 - switch late_bind_fw to array to handle multiple firmware types
v4 (Daniele):
 - Alloc payload dynamically, fix nits
v6 (Daniele)
 - %s/MAX_PAYLOAD_SIZE/XE_LB_MAX_PAYLOAD_SIZE/

Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
 drivers/gpu/drm/xe/xe_late_bind_fw.c       | 100 ++++++++++++++++++++-
 drivers/gpu/drm/xe/xe_late_bind_fw_types.h |  30 +++++++
 2 files changed, 129 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw.c b/drivers/gpu/drm/xe/xe_late_bind_fw.c
index 17808eb21905..54b815145a69 100644
--- a/drivers/gpu/drm/xe/xe_late_bind_fw.c
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw.c
@@ -5,6 +5,7 @@
 
 #include <linux/component.h>
 #include <linux/delay.h>
+#include <linux/firmware.h>
 
 #include <drm/drm_managed.h>
 #include <drm/intel/i915_component.h>
@@ -13,6 +14,16 @@
 
 #include "xe_device.h"
 #include "xe_late_bind_fw.h"
+#include "xe_pcode.h"
+#include "xe_pcode_api.h"
+
+static const u32 fw_id_to_type[] = {
+		[XE_LB_FW_FAN_CONTROL] = CSC_LATE_BINDING_TYPE_FAN_CONTROL,
+	};
+
+static const char * const fw_id_to_name[] = {
+		[XE_LB_FW_FAN_CONTROL] = "fan_control",
+	};
 
 static struct xe_device *
 late_bind_to_xe(struct xe_late_bind *late_bind)
@@ -20,6 +31,89 @@ late_bind_to_xe(struct xe_late_bind *late_bind)
 	return container_of(late_bind, struct xe_device, late_bind);
 }
 
+static int xe_late_bind_fw_num_fans(struct xe_late_bind *late_bind)
+{
+	struct xe_device *xe = late_bind_to_xe(late_bind);
+	struct xe_tile *root_tile = xe_device_get_root_tile(xe);
+	u32 uval;
+
+	if (!xe_pcode_read(root_tile,
+			   PCODE_MBOX(FAN_SPEED_CONTROL, FSC_READ_NUM_FANS, 0), &uval, NULL))
+		return uval;
+	else
+		return 0;
+}
+
+static int __xe_late_bind_fw_init(struct xe_late_bind *late_bind, u32 fw_id)
+{
+	struct xe_device *xe = late_bind_to_xe(late_bind);
+	struct pci_dev *pdev = to_pci_dev(xe->drm.dev);
+	struct xe_late_bind_fw *lb_fw;
+	const struct firmware *fw;
+	u32 num_fans;
+	int ret;
+
+	if (fw_id >= XE_LB_FW_MAX_ID)
+		return -EINVAL;
+
+	lb_fw = &late_bind->late_bind_fw[fw_id];
+
+	lb_fw->id = fw_id;
+	lb_fw->type = fw_id_to_type[lb_fw->id];
+	lb_fw->flags &= ~CSC_LATE_BINDING_FLAGS_IS_PERSISTENT;
+
+	if (lb_fw->type == CSC_LATE_BINDING_TYPE_FAN_CONTROL) {
+		num_fans = xe_late_bind_fw_num_fans(late_bind);
+		drm_dbg(&xe->drm, "Number of Fans: %d\n", num_fans);
+		if (!num_fans)
+			return 0;
+	}
+
+	snprintf(lb_fw->blob_path, sizeof(lb_fw->blob_path), "xe/%s_8086_%04x_%04x_%04x.bin",
+		 fw_id_to_name[lb_fw->id], pdev->device,
+		 pdev->subsystem_vendor, pdev->subsystem_device);
+
+	drm_dbg(&xe->drm, "Request late binding firmware %s\n", lb_fw->blob_path);
+	ret = firmware_request_nowarn(&fw, lb_fw->blob_path, xe->drm.dev);
+	if (ret) {
+		drm_dbg(&xe->drm, "%s late binding fw not available for current device",
+			fw_id_to_name[lb_fw->id]);
+		return 0;
+	}
+
+	if (fw->size > XE_LB_MAX_PAYLOAD_SIZE) {
+		drm_err(&xe->drm, "Firmware %s size %zu is larger than max pay load size %u\n",
+			lb_fw->blob_path, fw->size, XE_LB_MAX_PAYLOAD_SIZE);
+		release_firmware(fw);
+		return -ENODATA;
+	}
+
+	lb_fw->payload_size = fw->size;
+	lb_fw->payload = drmm_kzalloc(&xe->drm, lb_fw->payload_size, GFP_KERNEL);
+	if (!lb_fw->payload) {
+		release_firmware(fw);
+		return -ENOMEM;
+	}
+
+	memcpy((void *)lb_fw->payload, fw->data, lb_fw->payload_size);
+	release_firmware(fw);
+
+	return 0;
+}
+
+static int xe_late_bind_fw_init(struct xe_late_bind *late_bind)
+{
+	int ret;
+	int fw_id;
+
+	for (fw_id = 0; fw_id < XE_LB_FW_MAX_ID; fw_id++) {
+		ret = __xe_late_bind_fw_init(late_bind, fw_id);
+		if (ret)
+			return ret;
+	}
+	return 0;
+}
+
 static int xe_late_bind_component_bind(struct device *xe_kdev,
 				       struct device *mei_kdev, void *data)
 {
@@ -80,5 +174,9 @@ int xe_late_bind_init(struct xe_late_bind *late_bind)
 		return err;
 	}
 
-	return devm_add_action_or_reset(xe->drm.dev, xe_late_bind_remove, late_bind);
+	err = devm_add_action_or_reset(xe->drm.dev, xe_late_bind_remove, late_bind);
+	if (err)
+		return err;
+
+	return xe_late_bind_fw_init(late_bind);
 }
diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw_types.h b/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
index f79e5aefed94..c4a8042f2600 100644
--- a/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
@@ -10,6 +10,34 @@
 #include <linux/mutex.h>
 #include <linux/types.h>
 
+#define XE_LB_MAX_PAYLOAD_SIZE SZ_4K
+
+/**
+ * xe_late_bind_fw_id - enum to determine late binding fw index
+ */
+enum xe_late_bind_fw_id {
+	XE_LB_FW_FAN_CONTROL = 0,
+	XE_LB_FW_MAX_ID
+};
+
+/**
+ * struct xe_late_bind_fw
+ */
+struct xe_late_bind_fw {
+	/** @id: firmware index */
+	u32 id;
+	/** @blob_path: firmware binary path */
+	char blob_path[PATH_MAX];
+	/** @type: firmware type */
+	u32  type;
+	/** @flags: firmware flags */
+	u32  flags;
+	/** @payload: to store the late binding blob */
+	const u8  *payload;
+	/** @payload_size: late binding blob payload_size */
+	size_t payload_size;
+};
+
 /**
  * struct xe_late_bind_component - Late Binding services component
  * @mei_dev: device that provide Late Binding service.
@@ -28,6 +56,8 @@ struct xe_late_bind_component {
 struct xe_late_bind {
 	/** @component: struct for communication with mei component */
 	struct xe_late_bind_component component;
+	/** @late_bind_fw: late binding firmware array */
+	struct xe_late_bind_fw late_bind_fw[XE_LB_FW_MAX_ID];
 };
 
 #endif
-- 
2.34.1

[PATCH v7 5/9] drm/xe/xe_late_bind_fw: Load late binding firmware

[Badal Nilawar]

Load late binding firmware

v2:
 - s/EAGAIN/EBUSY/
 - Flush worker in suspend and driver unload (Daniele)
v3:
 - Use retry interval of 6s, in steps of 200ms, to allow
   other OS components release MEI CL handle (Sasha)
v4:
 - return -ENODEV if component not added (Daniele)
 - parse and print status returned by csc
v5:
 - Use payload to check firmware valid (Daniele)
 - Obtain the RPM reference before scheduling the worker to
   ensure the device remains awake until the worker completes
   firmware loading (Rodrigo)
v6:
 - In case of error donot re-attempt fw download (Daniele)

Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
 drivers/gpu/drm/xe/xe_late_bind_fw.c       | 155 ++++++++++++++++++++-
 drivers/gpu/drm/xe/xe_late_bind_fw.h       |   1 +
 drivers/gpu/drm/xe/xe_late_bind_fw_types.h |   7 +
 3 files changed, 162 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw.c b/drivers/gpu/drm/xe/xe_late_bind_fw.c
index 54b815145a69..9804508ee90d 100644
--- a/drivers/gpu/drm/xe/xe_late_bind_fw.c
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw.c
@@ -16,6 +16,20 @@
 #include "xe_late_bind_fw.h"
 #include "xe_pcode.h"
 #include "xe_pcode_api.h"
+#include "xe_pm.h"
+
+/*
+ * The component should load quite quickly in most cases, but it could take
+ * a bit. Using a very big timeout just to cover the worst case scenario
+ */
+#define LB_INIT_TIMEOUT_MS 20000
+
+/*
+ * Retry interval set to 6 seconds, in steps of 200 ms, to allow time for
+ * other OS components to release the MEI CL handle
+ */
+#define LB_FW_LOAD_RETRY_MAXCOUNT 30
+#define LB_FW_LOAD_RETRY_PAUSE_MS 200
 
 static const u32 fw_id_to_type[] = {
 		[XE_LB_FW_FAN_CONTROL] = CSC_LATE_BINDING_TYPE_FAN_CONTROL,
@@ -31,6 +45,30 @@ late_bind_to_xe(struct xe_late_bind *late_bind)
 	return container_of(late_bind, struct xe_device, late_bind);
 }
 
+static const char *xe_late_bind_parse_status(uint32_t status)
+{
+	switch (status) {
+	case CSC_LATE_BINDING_STATUS_SUCCESS:
+		return "success";
+	case CSC_LATE_BINDING_STATUS_4ID_MISMATCH:
+		return "4Id Mismatch";
+	case CSC_LATE_BINDING_STATUS_ARB_FAILURE:
+		return "ARB Failure";
+	case CSC_LATE_BINDING_STATUS_GENERAL_ERROR:
+		return "General Error";
+	case CSC_LATE_BINDING_STATUS_INVALID_PARAMS:
+		return "Invalid Params";
+	case CSC_LATE_BINDING_STATUS_INVALID_SIGNATURE:
+		return "Invalid Signature";
+	case CSC_LATE_BINDING_STATUS_INVALID_PAYLOAD:
+		return "Invalid Payload";
+	case CSC_LATE_BINDING_STATUS_TIMEOUT:
+		return "Timeout";
+	default:
+		return "Unknown error";
+	}
+}
+
 static int xe_late_bind_fw_num_fans(struct xe_late_bind *late_bind)
 {
 	struct xe_device *xe = late_bind_to_xe(late_bind);
@@ -44,6 +82,99 @@ static int xe_late_bind_fw_num_fans(struct xe_late_bind *late_bind)
 		return 0;
 }
 
+static void xe_late_bind_wait_for_worker_completion(struct xe_late_bind *late_bind)
+{
+	struct xe_device *xe = late_bind_to_xe(late_bind);
+	struct xe_late_bind_fw *lbfw;
+	int fw_id;
+
+	for (fw_id = 0; fw_id < XE_LB_FW_MAX_ID; fw_id++) {
+		lbfw = &late_bind->late_bind_fw[fw_id];
+		if (lbfw->payload && late_bind->wq) {
+			drm_dbg(&xe->drm, "Flush work: load %s firmware\n",
+				fw_id_to_name[lbfw->id]);
+			flush_work(&lbfw->work);
+		}
+	}
+}
+
+static void xe_late_bind_work(struct work_struct *work)
+{
+	struct xe_late_bind_fw *lbfw = container_of(work, struct xe_late_bind_fw, work);
+	struct xe_late_bind *late_bind = container_of(lbfw, struct xe_late_bind,
+						      late_bind_fw[lbfw->id]);
+	struct xe_device *xe = late_bind_to_xe(late_bind);
+	int retry = LB_FW_LOAD_RETRY_MAXCOUNT;
+	int ret;
+	int slept;
+
+	xe_device_assert_mem_access(xe);
+
+	/* we can queue this before the component is bound */
+	for (slept = 0; slept < LB_INIT_TIMEOUT_MS; slept += 100) {
+		if (late_bind->component.ops)
+			break;
+		msleep(100);
+	}
+
+	if (!late_bind->component.ops) {
+		drm_err(&xe->drm, "Late bind component not bound\n");
+		/* Do not re-attempt fw load */
+		drmm_kfree(&xe->drm, (void *)lbfw->payload);
+		lbfw->payload = NULL;
+		goto out;
+	}
+
+	drm_dbg(&xe->drm, "Load %s firmware\n", fw_id_to_name[lbfw->id]);
+
+	do {
+		ret = late_bind->component.ops->push_config(late_bind->component.mei_dev,
+							    lbfw->type, lbfw->flags,
+							    lbfw->payload, lbfw->payload_size);
+		if (!ret)
+			break;
+		msleep(LB_FW_LOAD_RETRY_PAUSE_MS);
+	} while (--retry && ret == -EBUSY);
+
+	if (!ret) {
+		drm_dbg(&xe->drm, "Load %s firmware successful\n",
+			fw_id_to_name[lbfw->id]);
+		goto out;
+	}
+
+	if (ret > 0)
+		drm_err(&xe->drm, "Load %s firmware failed with err %d, %s\n",
+			fw_id_to_name[lbfw->id], ret, xe_late_bind_parse_status(ret));
+	else
+		drm_err(&xe->drm, "Load %s firmware failed with err %d",
+			fw_id_to_name[lbfw->id], ret);
+	/* Do not re-attempt fw load */
+	drmm_kfree(&xe->drm, (void *)lbfw->payload);
+	lbfw->payload = NULL;
+
+out:
+	xe_pm_runtime_put(xe);
+}
+
+int xe_late_bind_fw_load(struct xe_late_bind *late_bind)
+{
+	struct xe_device *xe = late_bind_to_xe(late_bind);
+	struct xe_late_bind_fw *lbfw;
+	int fw_id;
+
+	if (!late_bind->component_added)
+		return -ENODEV;
+
+	for (fw_id = 0; fw_id < XE_LB_FW_MAX_ID; fw_id++) {
+		lbfw = &late_bind->late_bind_fw[fw_id];
+		if (lbfw->payload) {
+			xe_pm_runtime_get_noresume(xe);
+			queue_work(late_bind->wq, &lbfw->work);
+		}
+	}
+	return 0;
+}
+
 static int __xe_late_bind_fw_init(struct xe_late_bind *late_bind, u32 fw_id)
 {
 	struct xe_device *xe = late_bind_to_xe(late_bind);
@@ -97,6 +228,7 @@ static int __xe_late_bind_fw_init(struct xe_late_bind *late_bind, u32 fw_id)
 
 	memcpy((void *)lb_fw->payload, fw->data, lb_fw->payload_size);
 	release_firmware(fw);
+	INIT_WORK(&lb_fw->work, xe_late_bind_work);
 
 	return 0;
 }
@@ -106,11 +238,16 @@ static int xe_late_bind_fw_init(struct xe_late_bind *late_bind)
 	int ret;
 	int fw_id;
 
+	late_bind->wq = alloc_ordered_workqueue("late-bind-ordered-wq", 0);
+	if (!late_bind->wq)
+		return -ENOMEM;
+
 	for (fw_id = 0; fw_id < XE_LB_FW_MAX_ID; fw_id++) {
 		ret = __xe_late_bind_fw_init(late_bind, fw_id);
 		if (ret)
 			return ret;
 	}
+
 	return 0;
 }
 
@@ -132,6 +269,8 @@ static void xe_late_bind_component_unbind(struct device *xe_kdev,
 	struct xe_device *xe = kdev_to_xe_device(xe_kdev);
 	struct xe_late_bind *late_bind = &xe->late_bind;
 
+	xe_late_bind_wait_for_worker_completion(late_bind);
+
 	late_bind->component.ops = NULL;
 }
 
@@ -145,7 +284,15 @@ static void xe_late_bind_remove(void *arg)
 	struct xe_late_bind *late_bind = arg;
 	struct xe_device *xe = late_bind_to_xe(late_bind);
 
+	xe_late_bind_wait_for_worker_completion(late_bind);
+
+	late_bind->component_added = false;
+
 	component_del(xe->drm.dev, &xe_late_bind_component_ops);
+	if (late_bind->wq) {
+		destroy_workqueue(late_bind->wq);
+		late_bind->wq = NULL;
+	}
 }
 
 /**
@@ -174,9 +321,15 @@ int xe_late_bind_init(struct xe_late_bind *late_bind)
 		return err;
 	}
 
+	late_bind->component_added = true;
+
 	err = devm_add_action_or_reset(xe->drm.dev, xe_late_bind_remove, late_bind);
 	if (err)
 		return err;
 
-	return xe_late_bind_fw_init(late_bind);
+	err = xe_late_bind_fw_init(late_bind);
+	if (err)
+		return err;
+
+	return xe_late_bind_fw_load(late_bind);
 }
diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw.h b/drivers/gpu/drm/xe/xe_late_bind_fw.h
index 4c73571c3e62..28d56ed2bfdc 100644
--- a/drivers/gpu/drm/xe/xe_late_bind_fw.h
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw.h
@@ -11,5 +11,6 @@
 struct xe_late_bind;
 
 int xe_late_bind_init(struct xe_late_bind *late_bind);
+int xe_late_bind_fw_load(struct xe_late_bind *late_bind);
 
 #endif
diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw_types.h b/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
index c4a8042f2600..3cc5fc0593b3 100644
--- a/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
@@ -9,6 +9,7 @@
 #include <linux/iosys-map.h>
 #include <linux/mutex.h>
 #include <linux/types.h>
+#include <linux/workqueue.h>
 
 #define XE_LB_MAX_PAYLOAD_SIZE SZ_4K
 
@@ -36,6 +37,8 @@ struct xe_late_bind_fw {
 	const u8  *payload;
 	/** @payload_size: late binding blob payload_size */
 	size_t payload_size;
+	/** @work: worker to upload latebind blob */
+	struct work_struct work;
 };
 
 /**
@@ -58,6 +61,10 @@ struct xe_late_bind {
 	struct xe_late_bind_component component;
 	/** @late_bind_fw: late binding firmware array */
 	struct xe_late_bind_fw late_bind_fw[XE_LB_FW_MAX_ID];
+	/** @wq: workqueue to submit request to download late bind blob */
+	struct workqueue_struct *wq;
+	/** @component_added: whether the component has been added */
+	bool component_added;
 };
 
 #endif
-- 
2.34.1

[PATCH v7 6/9] drm/xe/xe_late_bind_fw: Reload late binding fw in rpm resume

[Badal Nilawar]

Reload late binding fw during runtime resume.

Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/xe/xe_late_bind_fw.c | 2 +-
 drivers/gpu/drm/xe/xe_late_bind_fw.h | 1 +
 drivers/gpu/drm/xe/xe_pm.c           | 4 ++++
 3 files changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw.c b/drivers/gpu/drm/xe/xe_late_bind_fw.c
index 9804508ee90d..54ba0b57185b 100644
--- a/drivers/gpu/drm/xe/xe_late_bind_fw.c
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw.c
@@ -82,7 +82,7 @@ static int xe_late_bind_fw_num_fans(struct xe_late_bind *late_bind)
 		return 0;
 }
 
-static void xe_late_bind_wait_for_worker_completion(struct xe_late_bind *late_bind)
+void xe_late_bind_wait_for_worker_completion(struct xe_late_bind *late_bind)
 {
 	struct xe_device *xe = late_bind_to_xe(late_bind);
 	struct xe_late_bind_fw *lbfw;
diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw.h b/drivers/gpu/drm/xe/xe_late_bind_fw.h
index 28d56ed2bfdc..07e437390539 100644
--- a/drivers/gpu/drm/xe/xe_late_bind_fw.h
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw.h
@@ -12,5 +12,6 @@ struct xe_late_bind;
 
 int xe_late_bind_init(struct xe_late_bind *late_bind);
 int xe_late_bind_fw_load(struct xe_late_bind *late_bind);
+void xe_late_bind_wait_for_worker_completion(struct xe_late_bind *late_bind);
 
 #endif
diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c
index ff749edc005b..734fe259600e 100644
--- a/drivers/gpu/drm/xe/xe_pm.c
+++ b/drivers/gpu/drm/xe/xe_pm.c
@@ -20,6 +20,7 @@
 #include "xe_gt.h"
 #include "xe_guc.h"
 #include "xe_irq.h"
+#include "xe_late_bind_fw.h"
 #include "xe_pcode.h"
 #include "xe_pxp.h"
 #include "xe_trace.h"
@@ -550,6 +551,9 @@ int xe_pm_runtime_resume(struct xe_device *xe)
 
 	xe_pxp_pm_resume(xe->pxp);
 
+	if (xe->d3cold.allowed)
+		xe_late_bind_fw_load(&xe->late_bind);
+
 out:
 	xe_rpm_lockmap_release(xe);
 	xe_pm_write_callback_task(xe, NULL);
-- 
2.34.1

[PATCH v7 7/9] drm/xe/xe_late_bind_fw: Reload late binding fw during system resume

[Badal Nilawar]

Reload late binding fw during resume from system suspend

v2:
  - Unconditionally reload late binding fw (Rodrigo)
  - Flush worker during system suspend

Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
---
 drivers/gpu/drm/xe/xe_pm.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_pm.c b/drivers/gpu/drm/xe/xe_pm.c
index 734fe259600e..13afaf97d831 100644
--- a/drivers/gpu/drm/xe/xe_pm.c
+++ b/drivers/gpu/drm/xe/xe_pm.c
@@ -127,6 +127,8 @@ int xe_pm_suspend(struct xe_device *xe)
 	if (err)
 		goto err;
 
+	xe_late_bind_wait_for_worker_completion(&xe->late_bind);
+
 	for_each_gt(gt, xe, id)
 		xe_gt_suspend_prepare(gt);
 
@@ -205,6 +207,8 @@ int xe_pm_resume(struct xe_device *xe)
 
 	xe_pxp_pm_resume(xe->pxp);
 
+	xe_late_bind_fw_load(&xe->late_bind);
+
 	drm_dbg(&xe->drm, "Device resumed\n");
 	return 0;
 err:
-- 
2.34.1

[PATCH v7 8/9] drm/xe/xe_late_bind_fw: Introduce debug fs node to disable late binding

[Badal Nilawar]

Introduce a debug filesystem node to disable late binding fw reload
during the system or runtime resume. This is intended for situations
where the late binding fw needs to be loaded from user mode,
perticularly for validation purpose.
Note that xe kmd doesn't participate in late binding flow from user
space. Binary loaded from the userspace will be lost upon entering to
D3 cold hence user space app need to handle this situation.

v2:
  - s/(uval == 1) ? true : false/!!uval/ (Daniele)
v3:
  - Refine the commit message (Daniele)

Acked-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
 drivers/gpu/drm/xe/xe_debugfs.c            | 41 ++++++++++++++++++++++
 drivers/gpu/drm/xe/xe_late_bind_fw.c       |  3 ++
 drivers/gpu/drm/xe/xe_late_bind_fw_types.h |  2 ++
 3 files changed, 46 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_debugfs.c b/drivers/gpu/drm/xe/xe_debugfs.c
index d83cd6ed3fa8..d1f6f556efa2 100644
--- a/drivers/gpu/drm/xe/xe_debugfs.c
+++ b/drivers/gpu/drm/xe/xe_debugfs.c
@@ -226,6 +226,44 @@ static const struct file_operations atomic_svm_timeslice_ms_fops = {
 	.write = atomic_svm_timeslice_ms_set,
 };
 
+static ssize_t disable_late_binding_show(struct file *f, char __user *ubuf,
+					 size_t size, loff_t *pos)
+{
+	struct xe_device *xe = file_inode(f)->i_private;
+	struct xe_late_bind *late_bind = &xe->late_bind;
+	char buf[32];
+	int len;
+
+	len = scnprintf(buf, sizeof(buf), "%d\n", late_bind->disable);
+
+	return simple_read_from_buffer(ubuf, size, pos, buf, len);
+}
+
+static ssize_t disable_late_binding_set(struct file *f, const char __user *ubuf,
+					size_t size, loff_t *pos)
+{
+	struct xe_device *xe = file_inode(f)->i_private;
+	struct xe_late_bind *late_bind = &xe->late_bind;
+	u32 uval;
+	ssize_t ret;
+
+	ret = kstrtouint_from_user(ubuf, size, sizeof(uval), &uval);
+	if (ret)
+		return ret;
+
+	if (uval > 1)
+		return -EINVAL;
+
+	late_bind->disable = !!uval;
+	return size;
+}
+
+static const struct file_operations disable_late_binding_fops = {
+	.owner = THIS_MODULE,
+	.read = disable_late_binding_show,
+	.write = disable_late_binding_set,
+};
+
 void xe_debugfs_register(struct xe_device *xe)
 {
 	struct ttm_device *bdev = &xe->ttm;
@@ -249,6 +287,9 @@ void xe_debugfs_register(struct xe_device *xe)
 	debugfs_create_file("atomic_svm_timeslice_ms", 0600, root, xe,
 			    &atomic_svm_timeslice_ms_fops);
 
+	debugfs_create_file("disable_late_binding", 0600, root, xe,
+			    &disable_late_binding_fops);
+
 	for (mem_type = XE_PL_VRAM0; mem_type <= XE_PL_VRAM1; ++mem_type) {
 		man = ttm_manager_type(bdev, mem_type);
 
diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw.c b/drivers/gpu/drm/xe/xe_late_bind_fw.c
index 54ba0b57185b..3228864716b5 100644
--- a/drivers/gpu/drm/xe/xe_late_bind_fw.c
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw.c
@@ -165,6 +165,9 @@ int xe_late_bind_fw_load(struct xe_late_bind *late_bind)
 	if (!late_bind->component_added)
 		return -ENODEV;
 
+	if (late_bind->disable)
+		return 0;
+
 	for (fw_id = 0; fw_id < XE_LB_FW_MAX_ID; fw_id++) {
 		lbfw = &late_bind->late_bind_fw[fw_id];
 		if (lbfw->payload) {
diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw_types.h b/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
index 3cc5fc0593b3..9399d425d80b 100644
--- a/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
@@ -65,6 +65,8 @@ struct xe_late_bind {
 	struct workqueue_struct *wq;
 	/** @component_added: whether the component has been added */
 	bool component_added;
+	/** @disable: to block late binding reload during pm resume flow*/
+	bool disable;
 };
 
 #endif
-- 
2.34.1

[PATCH v7 9/9] drm/xe/xe_late_bind_fw: Extract and print version info

[Badal Nilawar]

Extract and print version info of the late binding binary.

v2: Some refinements (Daniele)

Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
---
 drivers/gpu/drm/xe/xe_late_bind_fw.c       | 124 +++++++++++++++++++++
 drivers/gpu/drm/xe/xe_late_bind_fw_types.h |   3 +
 drivers/gpu/drm/xe/xe_uc_fw_abi.h          |  66 +++++++++++
 3 files changed, 193 insertions(+)

diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw.c b/drivers/gpu/drm/xe/xe_late_bind_fw.c
index 3228864716b5..19e8de114d0c 100644
--- a/drivers/gpu/drm/xe/xe_late_bind_fw.c
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw.c
@@ -45,6 +45,121 @@ late_bind_to_xe(struct xe_late_bind *late_bind)
 	return container_of(late_bind, struct xe_device, late_bind);
 }
 
+static struct xe_device *
+late_bind_fw_to_xe(struct xe_late_bind_fw *lb_fw)
+{
+	return container_of(lb_fw, struct xe_device, late_bind.late_bind_fw[lb_fw->id]);
+}
+
+/* Refer to the "Late Bind based Firmware Layout" documentation entry for details */
+static int parse_cpd_header(struct xe_late_bind_fw *lb_fw,
+			    const void *data, size_t size, const char *manifest_entry)
+{
+	struct xe_device *xe = late_bind_fw_to_xe(lb_fw);
+	const struct gsc_cpd_header_v2 *header = data;
+	const struct gsc_manifest_header *manifest;
+	const struct gsc_cpd_entry *entry;
+	size_t min_size = sizeof(*header);
+	u32 offset;
+	int i;
+
+	/* manifest_entry is mandatory */
+	xe_assert(xe, manifest_entry);
+
+	if (size < min_size || header->header_marker != GSC_CPD_HEADER_MARKER)
+		return -ENOENT;
+
+	if (header->header_length < sizeof(struct gsc_cpd_header_v2)) {
+		drm_err(&xe->drm, "%s late binding fw: Invalid CPD header length %u!\n",
+			fw_id_to_name[lb_fw->id], header->header_length);
+		return -EINVAL;
+	}
+
+	min_size = header->header_length + sizeof(struct gsc_cpd_entry) * header->num_of_entries;
+	if (size < min_size) {
+		drm_err(&xe->drm, "%s late binding fw: too small! %zu < %zu\n",
+			fw_id_to_name[lb_fw->id], size, min_size);
+		return -ENODATA;
+	}
+
+	/* Look for the manifest first */
+	entry = (void *)header + header->header_length;
+	for (i = 0; i < header->num_of_entries; i++, entry++)
+		if (strcmp(entry->name, manifest_entry) == 0)
+			offset = entry->offset & GSC_CPD_ENTRY_OFFSET_MASK;
+
+	if (!offset) {
+		drm_err(&xe->drm, "%s late binding fw: Failed to find manifest_entry\n",
+			fw_id_to_name[lb_fw->id]);
+		return -ENODATA;
+	}
+
+	min_size = offset + sizeof(struct gsc_manifest_header);
+	if (size < min_size) {
+		drm_err(&xe->drm, "%s late binding fw: too small! %zu < %zu\n",
+			fw_id_to_name[lb_fw->id], size, min_size);
+		return -ENODATA;
+	}
+
+	manifest = data + offset;
+
+	lb_fw->version = manifest->fw_version;
+
+	return 0;
+}
+
+/* Refer to the "Late Bind based Firmware Layout" documentation entry for details */
+static int parse_lb_layout(struct xe_late_bind_fw *lb_fw,
+			   const void *data, size_t size, const char *fpt_entry)
+{
+	struct xe_device *xe = late_bind_fw_to_xe(lb_fw);
+	const struct csc_fpt_header *header = data;
+	const struct csc_fpt_entry *entry;
+	size_t min_size = sizeof(*header);
+	u32 offset;
+	int i;
+
+	/* fpt_entry is mandatory */
+	xe_assert(xe, fpt_entry);
+
+	if (size < min_size || header->header_marker != CSC_FPT_HEADER_MARKER)
+		return -ENOENT;
+
+	if (header->header_length < sizeof(struct csc_fpt_header)) {
+		drm_err(&xe->drm, "%s late binding fw: Invalid FPT header length %u!\n",
+			fw_id_to_name[lb_fw->id], header->header_length);
+		return -EINVAL;
+	}
+
+	min_size = header->header_length + sizeof(struct csc_fpt_entry) * header->num_of_entries;
+	if (size < min_size) {
+		drm_err(&xe->drm, "%s late binding fw: too small! %zu < %zu\n",
+			fw_id_to_name[lb_fw->id], size, min_size);
+		return -ENODATA;
+	}
+
+	/* Look for the cpd header first */
+	entry = (void *)header + header->header_length;
+	for (i = 0; i < header->num_of_entries; i++, entry++)
+		if (strcmp(entry->name, fpt_entry) == 0)
+			offset = entry->offset;
+
+	if (!offset) {
+		drm_err(&xe->drm, "%s late binding fw: Failed to find fpt_entry\n",
+			fw_id_to_name[lb_fw->id]);
+		return -ENODATA;
+	}
+
+	min_size = offset + sizeof(struct gsc_cpd_header_v2);
+	if (size < min_size) {
+		drm_err(&xe->drm, "%s late binding fw: too small! %zu < %zu\n",
+			fw_id_to_name[lb_fw->id], size, min_size);
+		return -ENODATA;
+	}
+
+	return parse_cpd_header(lb_fw, data + offset, size - offset, "LTES.man");
+}
+
 static const char *xe_late_bind_parse_status(uint32_t status)
 {
 	switch (status) {
@@ -222,6 +337,10 @@ static int __xe_late_bind_fw_init(struct xe_late_bind *late_bind, u32 fw_id)
 		return -ENODATA;
 	}
 
+	ret = parse_lb_layout(lb_fw, fw->data, fw->size, "LTES");
+	if (ret)
+		return ret;
+
 	lb_fw->payload_size = fw->size;
 	lb_fw->payload = drmm_kzalloc(&xe->drm, lb_fw->payload_size, GFP_KERNEL);
 	if (!lb_fw->payload) {
@@ -229,6 +348,11 @@ static int __xe_late_bind_fw_init(struct xe_late_bind *late_bind, u32 fw_id)
 		return -ENOMEM;
 	}
 
+	drm_info(&xe->drm, "Using %s firmware from %s version %u.%u.%u.%u\n",
+		 fw_id_to_name[lb_fw->id], lb_fw->blob_path,
+		 lb_fw->version.major, lb_fw->version.minor,
+		 lb_fw->version.hotfix, lb_fw->version.build);
+
 	memcpy((void *)lb_fw->payload, fw->data, lb_fw->payload_size);
 	release_firmware(fw);
 	INIT_WORK(&lb_fw->work, xe_late_bind_work);
diff --git a/drivers/gpu/drm/xe/xe_late_bind_fw_types.h b/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
index 9399d425d80b..4404112fd8a7 100644
--- a/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
+++ b/drivers/gpu/drm/xe/xe_late_bind_fw_types.h
@@ -10,6 +10,7 @@
 #include <linux/mutex.h>
 #include <linux/types.h>
 #include <linux/workqueue.h>
+#include "xe_uc_fw_abi.h"
 
 #define XE_LB_MAX_PAYLOAD_SIZE SZ_4K
 
@@ -39,6 +40,8 @@ struct xe_late_bind_fw {
 	size_t payload_size;
 	/** @work: worker to upload latebind blob */
 	struct work_struct work;
+	/** @version: late binding blob manifest version */
+	struct gsc_version version;
 };
 
 /**
diff --git a/drivers/gpu/drm/xe/xe_uc_fw_abi.h b/drivers/gpu/drm/xe/xe_uc_fw_abi.h
index 87ade41209d0..78782d105fa9 100644
--- a/drivers/gpu/drm/xe/xe_uc_fw_abi.h
+++ b/drivers/gpu/drm/xe/xe_uc_fw_abi.h
@@ -318,4 +318,70 @@ struct gsc_manifest_header {
 	u32 exponent_size; /* in dwords */
 } __packed;
 
+/**
+ * DOC: Late binding Firmware Layout
+ *
+ * The Late binding binary starts with FPT header, which contains locations
+ * of various partitions of the binary. Here we're interested in finding out
+ * manifest version. To the manifest version, we need to locate CPD header
+ * one of the entry in CPD header points to manifest header. Manifest header
+ * contains the version.
+ *
+ *      +================================================+
+ *      |  FPT Header                                    |
+ *      +================================================+
+ *      |  FPT entries[]                                 |
+ *      |      entry1                                    |
+ *      |      ...                                       |
+ *      |      entryX                                    |
+ *      |          "LTES"                                |
+ *      |          ...                                   |
+ *      |          offset  >-----------------------------|------o
+ *      +================================================+      |
+ *                                                              |
+ *      +================================================+      |
+ *      |  CPD Header                                    |<-----o
+ *      +================================================+
+ *      |  CPD entries[]                                 |
+ *      |      entry1                                    |
+ *      |      ...                                       |
+ *      |      entryX                                    |
+ *      |          "LTES.man"                            |
+ *      |           ...                                  |
+ *      |           offset  >----------------------------|------o
+ *      +================================================+      |
+ *                                                              |
+ *      +================================================+      |
+ *      |  Manifest Header                               |<-----o
+ *      |      ...                                       |
+ *      |      FW version                                |
+ *      |      ...                                       |
+ *      +================================================+
+ */
+
+/* FPT Headers */
+struct csc_fpt_header {
+	u32 header_marker;
+#define CSC_FPT_HEADER_MARKER 0x54504624
+	u32 num_of_entries;
+	u8 header_version;
+	u8 entry_version;
+	u8 header_length; /* in bytes */
+	u8 flags;
+	u16 ticks_to_add;
+	u16 tokens_to_add;
+	u32 uma_size;
+	u32 crc32;
+	struct gsc_version fitc_version;
+} __packed;
+
+struct csc_fpt_entry {
+	u8 name[4]; /* partition name */
+	u32 reserved1;
+	u32 offset; /* offset from beginning of CSE region */
+	u32 length; /* partition length in bytes */
+	u32 reserved2[3];
+	u32 partition_flags;
+} __packed;
+
 #endif
-- 
2.34.1

✗ CI.checkpatch: warning for Introducing firmware late binding

[Patchwork]

== Series Details ==

Series: Introducing firmware late binding
URL   : https://patchwork.freedesktop.org/series/151290/
State : warning

== Summary ==

+ KERNEL=/kernel
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools mt
Cloning into 'mt'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ git -C mt rev-list -n1 origin/master
43254c2aa575037fc031c7ac21b0d031c700b2bf
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ git log -n1
commit a421e9007b865d01061777b69ffee11d4c8c8e99
Author: Badal Nilawar <badal.nilawar@intel.com>
Date:   Tue Jul 8 00:42:37 2025 +0530

    drm/xe/xe_late_bind_fw: Extract and print version info
    
    Extract and print version info of the late binding binary.
    
    v2: Some refinements (Daniele)
    
    Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
    Reviewed-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
+ /mt/dim checkpatch b9993cff911b1dd0abde4929435cc1eeb79e1c8f drm-intel
9bd36bfbe1b4 mei: bus: add mei_cldev_mtu interface
fe01864d3f09 mei: late_bind: add late binding component driver
-:49: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#49: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 364 lines checked
c911f53dbadd drm/xe/xe_late_bind_fw: Introducing xe_late_bind_fw
-:93: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#93: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 201 lines checked
d8addbc00d34 drm/xe/xe_late_bind_fw: Initialize late binding firmware
aa4bcd84f24a drm/xe/xe_late_bind_fw: Load late binding firmware
da592fe7516b drm/xe/xe_late_bind_fw: Reload late binding fw in rpm resume
0cfe675d38aa drm/xe/xe_late_bind_fw: Reload late binding fw during system resume
dd6ab7a623c1 drm/xe/xe_late_bind_fw: Introduce debug fs node to disable late binding
a421e9007b86 drm/xe/xe_late_bind_fw: Extract and print version info

✓ CI.KUnit: success for Introducing firmware late binding

[Patchwork]

== Series Details ==

Series: Introducing firmware late binding
URL   : https://patchwork.freedesktop.org/series/151290/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[19:41:00] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[19:41:04] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[19:41:31] Starting KUnit Kernel (1/1)...
[19:41:31] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[19:41:31] ================== guc_buf (11 subtests) ===================
[19:41:31] [PASSED] test_smallest
[19:41:31] [PASSED] test_largest
[19:41:31] [PASSED] test_granular
[19:41:31] [PASSED] test_unique
[19:41:31] [PASSED] test_overlap
[19:41:31] [PASSED] test_reusable
[19:41:31] [PASSED] test_too_big
[19:41:31] [PASSED] test_flush
[19:41:31] [PASSED] test_lookup
[19:41:31] [PASSED] test_data
[19:41:31] [PASSED] test_class
[19:41:31] ===================== [PASSED] guc_buf =====================
[19:41:31] =================== guc_dbm (7 subtests) ===================
[19:41:31] [PASSED] test_empty
[19:41:31] [PASSED] test_default
[19:41:31] ======================== test_size  ========================
[19:41:31] [PASSED] 4
[19:41:31] [PASSED] 8
[19:41:31] [PASSED] 32
[19:41:31] [PASSED] 256
[19:41:31] ==================== [PASSED] test_size ====================
[19:41:31] ======================= test_reuse  ========================
[19:41:31] [PASSED] 4
[19:41:31] [PASSED] 8
[19:41:31] [PASSED] 32
[19:41:31] [PASSED] 256
[19:41:31] =================== [PASSED] test_reuse ====================
[19:41:31] =================== test_range_overlap  ====================
[19:41:31] [PASSED] 4
[19:41:31] [PASSED] 8
[19:41:31] [PASSED] 32
[19:41:31] [PASSED] 256
[19:41:31] =============== [PASSED] test_range_overlap ================
[19:41:31] =================== test_range_compact  ====================
[19:41:31] [PASSED] 4
[19:41:31] [PASSED] 8
[19:41:31] [PASSED] 32
[19:41:31] [PASSED] 256
[19:41:31] =============== [PASSED] test_range_compact ================
[19:41:31] ==================== test_range_spare  =====================
[19:41:31] [PASSED] 4
[19:41:31] [PASSED] 8
[19:41:31] [PASSED] 32
[19:41:31] [PASSED] 256
[19:41:31] ================ [PASSED] test_range_spare =================
[19:41:31] ===================== [PASSED] guc_dbm =====================
[19:41:31] =================== guc_idm (6 subtests) ===================
[19:41:31] [PASSED] bad_init
[19:41:31] [PASSED] no_init
[19:41:31] [PASSED] init_fini
[19:41:31] [PASSED] check_used
[19:41:31] [PASSED] check_quota
[19:41:31] [PASSED] check_all
[19:41:31] ===================== [PASSED] guc_idm =====================
[19:41:31] ================== no_relay (3 subtests) ===================
[19:41:31] [PASSED] xe_drops_guc2pf_if_not_ready
[19:41:31] [PASSED] xe_drops_guc2vf_if_not_ready
[19:41:31] [PASSED] xe_rejects_send_if_not_ready
[19:41:31] ==================== [PASSED] no_relay =====================
[19:41:31] ================== pf_relay (14 subtests) ==================
[19:41:31] [PASSED] pf_rejects_guc2pf_too_short
[19:41:31] [PASSED] pf_rejects_guc2pf_too_long
[19:41:31] [PASSED] pf_rejects_guc2pf_no_payload
[19:41:31] [PASSED] pf_fails_no_payload
[19:41:31] [PASSED] pf_fails_bad_origin
[19:41:31] [PASSED] pf_fails_bad_type
[19:41:31] [PASSED] pf_txn_reports_error
[19:41:31] [PASSED] pf_txn_sends_pf2guc
[19:41:31] [PASSED] pf_sends_pf2guc
[19:41:31] [SKIPPED] pf_loopback_nop
[19:41:31] [SKIPPED] pf_loopback_echo
[19:41:31] [SKIPPED] pf_loopback_fail
[19:41:31] [SKIPPED] pf_loopback_busy
[19:41:31] [SKIPPED] pf_loopback_retry
[19:41:31] ==================== [PASSED] pf_relay =====================
[19:41:31] ================== vf_relay (3 subtests) ===================
[19:41:31] [PASSED] vf_rejects_guc2vf_too_short
[19:41:31] [PASSED] vf_rejects_guc2vf_too_long
[19:41:31] [PASSED] vf_rejects_guc2vf_no_payload
[19:41:31] ==================== [PASSED] vf_relay =====================
[19:41:31] ================= pf_service (11 subtests) =================
[19:41:31] [PASSED] pf_negotiate_any
[19:41:31] [PASSED] pf_negotiate_base_match
[19:41:31] [PASSED] pf_negotiate_base_newer
[19:41:31] [PASSED] pf_negotiate_base_next
[19:41:31] [SKIPPED] pf_negotiate_base_older
[19:41:31] [PASSED] pf_negotiate_base_prev
[19:41:31] [PASSED] pf_negotiate_latest_match
[19:41:31] [PASSED] pf_negotiate_latest_newer
[19:41:31] [PASSED] pf_negotiate_latest_next
[19:41:31] [SKIPPED] pf_negotiate_latest_older
[19:41:31] [SKIPPED] pf_negotiate_latest_prev
[19:41:31] =================== [PASSED] pf_service ====================
[19:41:31] ===================== lmtt (1 subtest) =====================
[19:41:31] ======================== test_ops  =========================
[19:41:31] [PASSED] 2-level
[19:41:31] [PASSED] multi-level
[19:41:31] ==================== [PASSED] test_ops =====================
[19:41:31] ====================== [PASSED] lmtt =======================
[19:41:31] =================== xe_mocs (2 subtests) ===================
[19:41:31] ================ xe_live_mocs_kernel_kunit  ================
[19:41:31] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[19:41:31] ================ xe_live_mocs_reset_kunit  =================
[19:41:31] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[19:41:31] ==================== [SKIPPED] xe_mocs =====================
[19:41:31] ================= xe_migrate (2 subtests) ==================
[19:41:31] ================= xe_migrate_sanity_kunit  =================
[19:41:31] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[19:41:31] ================== xe_validate_ccs_kunit  ==================
[19:41:31] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[19:41:31] =================== [SKIPPED] xe_migrate ===================
[19:41:31] ================== xe_dma_buf (1 subtest) ==================
[19:41:31] ==================== xe_dma_buf_kunit  =====================
[19:41:31] ================ [SKIPPED] xe_dma_buf_kunit ================
[19:41:31] =================== [SKIPPED] xe_dma_buf ===================
[19:41:31] ================= xe_bo_shrink (1 subtest) =================
[19:41:31] =================== xe_bo_shrink_kunit  ====================
[19:41:31] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[19:41:31] ================== [SKIPPED] xe_bo_shrink ==================
[19:41:31] ==================== xe_bo (2 subtests) ====================
[19:41:31] ================== xe_ccs_migrate_kunit  ===================
[19:41:31] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[19:41:31] ==================== xe_bo_evict_kunit  ====================
[19:41:31] =============== [SKIPPED] xe_bo_evict_kunit ================
[19:41:31] ===================== [SKIPPED] xe_bo ======================
[19:41:31] ==================== args (11 subtests) ====================
[19:41:31] [PASSED] count_args_test
[19:41:31] [PASSED] call_args_example
[19:41:31] [PASSED] call_args_test
[19:41:31] [PASSED] drop_first_arg_example
[19:41:31] [PASSED] drop_first_arg_test
[19:41:31] [PASSED] first_arg_example
[19:41:31] [PASSED] first_arg_test
[19:41:31] [PASSED] last_arg_example
[19:41:31] [PASSED] last_arg_test
[19:41:31] [PASSED] pick_arg_example
[19:41:31] [PASSED] sep_comma_example
[19:41:31] ====================== [PASSED] args =======================
[19:41:31] =================== xe_pci (3 subtests) ====================
[19:41:31] ==================== check_graphics_ip  ====================
[19:41:31] [PASSED] 12.70 Xe_LPG
[19:41:31] [PASSED] 12.71 Xe_LPG
[19:41:31] [PASSED] 12.74 Xe_LPG+
[19:41:31] [PASSED] 20.01 Xe2_HPG
[19:41:31] [PASSED] 20.02 Xe2_HPG
[19:41:31] [PASSED] 20.04 Xe2_LPG
[19:41:31] [PASSED] 30.00 Xe3_LPG
[19:41:31] [PASSED] 30.01 Xe3_LPG
[19:41:31] [PASSED] 30.03 Xe3_LPG
[19:41:31] ================ [PASSED] check_graphics_ip ================
[19:41:31] ===================== check_media_ip  ======================
[19:41:31] [PASSED] 13.00 Xe_LPM+
[19:41:31] [PASSED] 13.01 Xe2_HPM
[19:41:31] [PASSED] 20.00 Xe2_LPM
[19:41:31] [PASSED] 30.00 Xe3_LPM
[19:41:31] [PASSED] 30.02 Xe3_LPM
[19:41:31] ================= [PASSED] check_media_ip ==================
[19:41:31] ================= check_platform_gt_count  =================
[19:41:31] [PASSED] 0x9A60 (TIGERLAKE)
[19:41:31] [PASSED] 0x9A68 (TIGERLAKE)
[19:41:31] [PASSED] 0x9A70 (TIGERLAKE)
[19:41:31] [PASSED] 0x9A40 (TIGERLAKE)
[19:41:31] [PASSED] 0x9A49 (TIGERLAKE)
[19:41:31] [PASSED] 0x9A59 (TIGERLAKE)
[19:41:31] [PASSED] 0x9A78 (TIGERLAKE)
[19:41:31] [PASSED] 0x9AC0 (TIGERLAKE)
[19:41:31] [PASSED] 0x9AC9 (TIGERLAKE)
[19:41:31] [PASSED] 0x9AD9 (TIGERLAKE)
[19:41:31] [PASSED] 0x9AF8 (TIGERLAKE)
[19:41:31] [PASSED] 0x4C80 (ROCKETLAKE)
[19:41:31] [PASSED] 0x4C8A (ROCKETLAKE)
[19:41:31] [PASSED] 0x4C8B (ROCKETLAKE)
[19:41:31] [PASSED] 0x4C8C (ROCKETLAKE)
[19:41:31] [PASSED] 0x4C90 (ROCKETLAKE)
[19:41:31] [PASSED] 0x4C9A (ROCKETLAKE)
[19:41:31] [PASSED] 0x4680 (ALDERLAKE_S)
[19:41:31] [PASSED] 0x4682 (ALDERLAKE_S)
[19:41:31] [PASSED] 0x4688 (ALDERLAKE_S)
[19:41:31] [PASSED] 0x468A (ALDERLAKE_S)
[19:41:31] [PASSED] 0x468B (ALDERLAKE_S)
[19:41:31] [PASSED] 0x4690 (ALDERLAKE_S)
[19:41:31] [PASSED] 0x4692 (ALDERLAKE_S)
[19:41:31] [PASSED] 0x4693 (ALDERLAKE_S)
[19:41:31] [PASSED] 0x46A0 (ALDERLAKE_P)
[19:41:31] [PASSED] 0x46A1 (ALDERLAKE_P)
[19:41:31] [PASSED] 0x46A2 (ALDERLAKE_P)
[19:41:31] [PASSED] 0x46A3 (ALDERLAKE_P)
[19:41:31] [PASSED] 0x46A6 (ALDERLAKE_P)
[19:41:31] [PASSED] 0x46A8 (ALDERLAKE_P)
[19:41:31] [PASSED] 0x46AA (ALDERLAKE_P)
[19:41:31] [PASSED] 0x462A (ALDERLAKE_P)
[19:41:31] [PASSED] 0x4626 (ALDERLAKE_P)
[19:41:31] [PASSED] 0x4628 (ALDERLAKE_P)
[19:41:31] [PASSED] 0x46B0 (ALDERLAKE_P)
[19:41:31] [PASSED] 0x46B1 (ALDERLAKE_P)
[19:41:31] [PASSED] 0x46B2 (ALDERLAKE_P)
[19:41:31] [PASSED] 0x46B3 (ALDERLAKE_P)
[19:41:31] [PASSED] 0x46C0 (ALDERLAKE_P)
[19:41:31] [PASSED] 0x46C1 (ALDERLAKE_P)
[19:41:31] [PASSED] 0x46C2 (ALDERLAKE_P)
[19:41:31] [PASSED] 0x46C3 (ALDERLAKE_P)
[19:41:31] [PASSED] 0x46D0 (ALDERLAKE_N)
[19:41:31] [PASSED] 0x46D1 (ALDERLAKE_N)
[19:41:31] [PASSED] 0x46D2 (ALDERLAKE_N)
[19:41:31] [PASSED] 0x46D3 (ALDERLAKE_N)
[19:41:31] [PASSED] 0x46D4 (ALDERLAKE_N)
[19:41:31] [PASSED] 0xA721 (ALDERLAKE_P)
[19:41:31] [PASSED] 0xA7A1 (ALDERLAKE_P)
[19:41:31] [PASSED] 0xA7A9 (ALDERLAKE_P)
[19:41:31] [PASSED] 0xA7AC (ALDERLAKE_P)
[19:41:31] [PASSED] 0xA7AD (ALDERLAKE_P)
[19:41:31] [PASSED] 0xA720 (ALDERLAKE_P)
[19:41:31] [PASSED] 0xA7A0 (ALDERLAKE_P)
[19:41:31] [PASSED] 0xA7A8 (ALDERLAKE_P)
[19:41:31] [PASSED] 0xA7AA (ALDERLAKE_P)
[19:41:31] [PASSED] 0xA7AB (ALDERLAKE_P)
[19:41:31] [PASSED] 0xA780 (ALDERLAKE_S)
[19:41:31] [PASSED] 0xA781 (ALDERLAKE_S)
[19:41:31] [PASSED] 0xA782 (ALDERLAKE_S)
[19:41:31] [PASSED] 0xA783 (ALDERLAKE_S)
[19:41:31] [PASSED] 0xA788 (ALDERLAKE_S)
[19:41:31] [PASSED] 0xA789 (ALDERLAKE_S)
[19:41:31] [PASSED] 0xA78A (ALDERLAKE_S)
[19:41:31] [PASSED] 0xA78B (ALDERLAKE_S)
[19:41:31] [PASSED] 0x4905 (DG1)
[19:41:31] [PASSED] 0x4906 (DG1)
[19:41:31] [PASSED] 0x4907 (DG1)
[19:41:31] [PASSED] 0x4908 (DG1)
[19:41:31] [PASSED] 0x4909 (DG1)
[19:41:31] [PASSED] 0x56C0 (DG2)
[19:41:31] [PASSED] 0x56C2 (DG2)
[19:41:31] [PASSED] 0x56C1 (DG2)
[19:41:31] [PASSED] 0x7D51 (METEORLAKE)
[19:41:31] [PASSED] 0x7DD1 (METEORLAKE)
[19:41:31] [PASSED] 0x7D41 (METEORLAKE)
[19:41:31] [PASSED] 0x7D67 (METEORLAKE)
[19:41:31] [PASSED] 0xB640 (METEORLAKE)
[19:41:31] [PASSED] 0x56A0 (DG2)
[19:41:31] [PASSED] 0x56A1 (DG2)
[19:41:31] [PASSED] 0x56A2 (DG2)
[19:41:31] [PASSED] 0x56BE (DG2)
[19:41:31] [PASSED] 0x56BF (DG2)
[19:41:31] [PASSED] 0x5690 (DG2)
[19:41:31] [PASSED] 0x5691 (DG2)
[19:41:31] [PASSED] 0x5692 (DG2)
[19:41:31] [PASSED] 0x56A5 (DG2)
[19:41:31] [PASSED] 0x56A6 (DG2)
[19:41:31] [PASSED] 0x56B0 (DG2)
[19:41:31] [PASSED] 0x56B1 (DG2)
[19:41:31] [PASSED] 0x56BA (DG2)
[19:41:31] [PASSED] 0x56BB (DG2)
[19:41:31] [PASSED] 0x56BC (DG2)
[19:41:31] [PASSED] 0x56BD (DG2)
[19:41:31] [PASSED] 0x5693 (DG2)
[19:41:31] [PASSED] 0x5694 (DG2)
[19:41:31] [PASSED] 0x5695 (DG2)
[19:41:31] [PASSED] 0x56A3 (DG2)
[19:41:31] [PASSED] 0x56A4 (DG2)
[19:41:31] [PASSED] 0x56B2 (DG2)
[19:41:31] [PASSED] 0x56B3 (DG2)
[19:41:31] [PASSED] 0x5696 (DG2)
[19:41:31] [PASSED] 0x5697 (DG2)
[19:41:31] [PASSED] 0xB69 (PVC)
[19:41:31] [PASSED] 0xB6E (PVC)
[19:41:31] [PASSED] 0xBD4 (PVC)
[19:41:31] [PASSED] 0xBD5 (PVC)
[19:41:31] [PASSED] 0xBD6 (PVC)
[19:41:31] [PASSED] 0xBD7 (PVC)
[19:41:31] [PASSED] 0xBD8 (PVC)
[19:41:31] [PASSED] 0xBD9 (PVC)
[19:41:31] [PASSED] 0xBDA (PVC)
[19:41:31] [PASSED] 0xBDB (PVC)
[19:41:31] [PASSED] 0xBE0 (PVC)
[19:41:31] [PASSED] 0xBE1 (PVC)
[19:41:31] [PASSED] 0xBE5 (PVC)
[19:41:31] [PASSED] 0x7D40 (METEORLAKE)
[19:41:31] [PASSED] 0x7D45 (METEORLAKE)
[19:41:31] [PASSED] 0x7D55 (METEORLAKE)
[19:41:31] [PASSED] 0x7D60 (METEORLAKE)
[19:41:31] [PASSED] 0x7DD5 (METEORLAKE)
[19:41:31] [PASSED] 0x6420 (LUNARLAKE)
[19:41:31] [PASSED] 0x64A0 (LUNARLAKE)
[19:41:31] [PASSED] 0x64B0 (LUNARLAKE)
[19:41:31] [PASSED] 0xE202 (BATTLEMAGE)
[19:41:31] [PASSED] 0xE209 (BATTLEMAGE)
[19:41:31] [PASSED] 0xE20B (BATTLEMAGE)
[19:41:31] [PASSED] 0xE20C (BATTLEMAGE)
[19:41:31] [PASSED] 0xE20D (BATTLEMAGE)
[19:41:31] [PASSED] 0xE210 (BATTLEMAGE)
[19:41:31] [PASSED] 0xE211 (BATTLEMAGE)
[19:41:31] [PASSED] 0xE212 (BATTLEMAGE)
[19:41:31] [PASSED] 0xE216 (BATTLEMAGE)
[19:41:31] [PASSED] 0xE220 (BATTLEMAGE)
[19:41:31] [PASSED] 0xE221 (BATTLEMAGE)
[19:41:31] [PASSED] 0xE222 (BATTLEMAGE)
[19:41:31] [PASSED] 0xE223 (BATTLEMAGE)
[19:41:31] [PASSED] 0xB080 (PANTHERLAKE)
[19:41:31] [PASSED] 0xB081 (PANTHERLAKE)
[19:41:31] [PASSED] 0xB082 (PANTHERLAKE)
[19:41:31] [PASSED] 0xB083 (PANTHERLAKE)
[19:41:31] [PASSED] 0xB084 (PANTHERLAKE)
[19:41:31] [PASSED] 0xB085 (PANTHERLAKE)
[19:41:31] [PASSED] 0xB086 (PANTHERLAKE)
[19:41:31] [PASSED] 0xB087 (PANTHERLAKE)
[19:41:31] [PASSED] 0xB08F (PANTHERLAKE)
[19:41:31] [PASSED] 0xB090 (PANTHERLAKE)
[19:41:31] [PASSED] 0xB0A0 (PANTHERLAKE)
[19:41:31] [PASSED] 0xB0B0 (PANTHERLAKE)
[19:41:31] [PASSED] 0xFD80 (PANTHERLAKE)
[19:41:31] [PASSED] 0xFD81 (PANTHERLAKE)
[19:41:31] ============= [PASSED] check_platform_gt_count =============
[19:41:31] ===================== [PASSED] xe_pci ======================
[19:41:31] =================== xe_rtp (2 subtests) ====================
[19:41:31] =============== xe_rtp_process_to_sr_tests  ================
[19:41:31] [PASSED] coalesce-same-reg
[19:41:31] [PASSED] no-match-no-add
[19:41:31] [PASSED] match-or
[19:41:31] [PASSED] match-or-xfail
[19:41:31] [PASSED] no-match-no-add-multiple-rules
[19:41:31] [PASSED] two-regs-two-entries
[19:41:31] [PASSED] clr-one-set-other
[19:41:31] [PASSED] set-field
[19:41:31] [PASSED] conflict-duplicate
[19:41:31] [PASSED] conflict-not-disjoint
[19:41:31] [PASSED] conflict-reg-type
[19:41:31] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[19:41:31] ================== xe_rtp_process_tests  ===================
[19:41:31] [PASSED] active1
[19:41:31] [PASSED] active2
[19:41:31] [PASSED] active-inactive
[19:41:31] [PASSED] inactive-active
[19:41:31] [PASSED] inactive-1st_or_active-inactive
[19:41:31] [PASSED] inactive-2nd_or_active-inactive
[19:41:31] [PASSED] inactive-last_or_active-inactive
[19:41:31] [PASSED] inactive-no_or_active-inactive
[19:41:31] ============== [PASSED] xe_rtp_process_tests ===============
[19:41:31] ===================== [PASSED] xe_rtp ======================
[19:41:31] ==================== xe_wa (1 subtest) =====================
[19:41:31] ======================== xe_wa_gt  =========================
[19:41:31] [PASSED] TIGERLAKE (B0)
[19:41:31] [PASSED] DG1 (A0)
[19:41:31] [PASSED] DG1 (B0)
[19:41:31] [PASSED] ALDERLAKE_S (A0)
[19:41:31] [PASSED] ALDERLAKE_S (B0)
[19:41:31] [PASSED] ALDERLAKE_S (C0)
[19:41:31] [PASSED] ALDERLAKE_S (D0)
[19:41:31] [PASSED] ALDERLAKE_P (A0)
[19:41:31] [PASSED] ALDERLAKE_P (B0)
[19:41:31] [PASSED] ALDERLAKE_P (C0)
[19:41:31] [PASSED] ALDERLAKE_S_RPLS (D0)
[19:41:31] [PASSED] ALDERLAKE_P_RPLU (E0)
[19:41:31] [PASSED] DG2_G10 (C0)
[19:41:31] [PASSED] DG2_G11 (B1)
[19:41:31] [PASSED] DG2_G12 (A1)
[19:41:31] [PASSED] METEORLAKE (g:A0, m:A0)
[19:41:31] [PASSED] METEORLAKE (g:A0, m:A0)
[19:41:31] [PASSED] METEORLAKE (g:A0, m:A0)
[19:41:31] [PASSED] LUNARLAKE (g:A0, m:A0)
[19:41:31] [PASSED] LUNARLAKE (g:B0, m:A0)
stty: 'standard input': Inappropriate ioctl for device
[19:41:31] [PASSED] BATTLEMAGE (g:A0, m:A1)
[19:41:31] ==================== [PASSED] xe_wa_gt =====================
[19:41:31] ====================== [PASSED] xe_wa ======================
[19:41:31] ============================================================
[19:41:31] Testing complete. Ran 297 tests: passed: 281, skipped: 16
[19:41:31] Elapsed time: 31.238s total, 4.188s configuring, 26.733s building, 0.304s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[19:41:31] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[19:41:33] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[19:41:55] Starting KUnit Kernel (1/1)...
[19:41:55] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[19:41:55] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[19:41:55] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[19:41:55] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[19:41:55] =========== drm_validate_clone_mode (2 subtests) ===========
[19:41:55] ============== drm_test_check_in_clone_mode  ===============
[19:41:55] [PASSED] in_clone_mode
[19:41:55] [PASSED] not_in_clone_mode
[19:41:55] ========== [PASSED] drm_test_check_in_clone_mode ===========
[19:41:55] =============== drm_test_check_valid_clones  ===============
[19:41:55] [PASSED] not_in_clone_mode
[19:41:55] [PASSED] valid_clone
[19:41:55] [PASSED] invalid_clone
[19:41:55] =========== [PASSED] drm_test_check_valid_clones ===========
[19:41:55] ============= [PASSED] drm_validate_clone_mode =============
[19:41:55] ============= drm_validate_modeset (1 subtest) =============
[19:41:55] [PASSED] drm_test_check_connector_changed_modeset
[19:41:55] ============== [PASSED] drm_validate_modeset ===============
[19:41:55] ====== drm_test_bridge_get_current_state (2 subtests) ======
[19:41:55] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[19:41:55] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[19:41:55] ======== [PASSED] drm_test_bridge_get_current_state ========
[19:41:55] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[19:41:55] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[19:41:55] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[19:41:55] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[19:41:55] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[19:41:55] ============== drm_bridge_alloc (2 subtests) ===============
[19:41:55] [PASSED] drm_test_drm_bridge_alloc_basic
[19:41:55] [PASSED] drm_test_drm_bridge_alloc_get_put
[19:41:55] ================ [PASSED] drm_bridge_alloc =================
[19:41:55] ================== drm_buddy (7 subtests) ==================
[19:41:55] [PASSED] drm_test_buddy_alloc_limit
[19:41:55] [PASSED] drm_test_buddy_alloc_optimistic
[19:41:55] [PASSED] drm_test_buddy_alloc_pessimistic
[19:41:55] [PASSED] drm_test_buddy_alloc_pathological
[19:41:55] [PASSED] drm_test_buddy_alloc_contiguous
[19:41:55] [PASSED] drm_test_buddy_alloc_clear
[19:41:55] [PASSED] drm_test_buddy_alloc_range_bias
[19:41:55] ==================== [PASSED] drm_buddy ====================
[19:41:55] ============= drm_cmdline_parser (40 subtests) =============
[19:41:55] [PASSED] drm_test_cmdline_force_d_only
[19:41:55] [PASSED] drm_test_cmdline_force_D_only_dvi
[19:41:55] [PASSED] drm_test_cmdline_force_D_only_hdmi
[19:41:55] [PASSED] drm_test_cmdline_force_D_only_not_digital
[19:41:55] [PASSED] drm_test_cmdline_force_e_only
[19:41:55] [PASSED] drm_test_cmdline_res
[19:41:55] [PASSED] drm_test_cmdline_res_vesa
[19:41:55] [PASSED] drm_test_cmdline_res_vesa_rblank
[19:41:55] [PASSED] drm_test_cmdline_res_rblank
[19:41:55] [PASSED] drm_test_cmdline_res_bpp
[19:41:55] [PASSED] drm_test_cmdline_res_refresh
[19:41:55] [PASSED] drm_test_cmdline_res_bpp_refresh
[19:41:55] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[19:41:55] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[19:41:55] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[19:41:55] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[19:41:55] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[19:41:55] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[19:41:55] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[19:41:55] [PASSED] drm_test_cmdline_res_margins_force_on
[19:41:55] [PASSED] drm_test_cmdline_res_vesa_margins
[19:41:55] [PASSED] drm_test_cmdline_name
[19:41:55] [PASSED] drm_test_cmdline_name_bpp
[19:41:55] [PASSED] drm_test_cmdline_name_option
[19:41:55] [PASSED] drm_test_cmdline_name_bpp_option
[19:41:55] [PASSED] drm_test_cmdline_rotate_0
[19:41:55] [PASSED] drm_test_cmdline_rotate_90
[19:41:55] [PASSED] drm_test_cmdline_rotate_180
[19:41:55] [PASSED] drm_test_cmdline_rotate_270
[19:41:55] [PASSED] drm_test_cmdline_hmirror
[19:41:55] [PASSED] drm_test_cmdline_vmirror
[19:41:55] [PASSED] drm_test_cmdline_margin_options
[19:41:55] [PASSED] drm_test_cmdline_multiple_options
[19:41:55] [PASSED] drm_test_cmdline_bpp_extra_and_option
[19:41:55] [PASSED] drm_test_cmdline_extra_and_option
[19:41:55] [PASSED] drm_test_cmdline_freestanding_options
[19:41:55] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[19:41:55] [PASSED] drm_test_cmdline_panel_orientation
[19:41:55] ================ drm_test_cmdline_invalid  =================
[19:41:55] [PASSED] margin_only
[19:41:55] [PASSED] interlace_only
[19:41:55] [PASSED] res_missing_x
[19:41:55] [PASSED] res_missing_y
[19:41:55] [PASSED] res_bad_y
[19:41:55] [PASSED] res_missing_y_bpp
[19:41:55] [PASSED] res_bad_bpp
[19:41:55] [PASSED] res_bad_refresh
[19:41:55] [PASSED] res_bpp_refresh_force_on_off
[19:41:55] [PASSED] res_invalid_mode
[19:41:55] [PASSED] res_bpp_wrong_place_mode
[19:41:55] [PASSED] name_bpp_refresh
[19:41:55] [PASSED] name_refresh
[19:41:55] [PASSED] name_refresh_wrong_mode
[19:41:55] [PASSED] name_refresh_invalid_mode
[19:41:55] [PASSED] rotate_multiple
[19:41:55] [PASSED] rotate_invalid_val
[19:41:55] [PASSED] rotate_truncated
[19:41:55] [PASSED] invalid_option
[19:41:55] [PASSED] invalid_tv_option
[19:41:55] [PASSED] truncated_tv_option
[19:41:55] ============ [PASSED] drm_test_cmdline_invalid =============
[19:41:55] =============== drm_test_cmdline_tv_options  ===============
[19:41:55] [PASSED] NTSC
[19:41:55] [PASSED] NTSC_443
[19:41:55] [PASSED] NTSC_J
[19:41:55] [PASSED] PAL
[19:41:55] [PASSED] PAL_M
[19:41:55] [PASSED] PAL_N
[19:41:55] [PASSED] SECAM
[19:41:55] [PASSED] MONO_525
[19:41:55] [PASSED] MONO_625
[19:41:55] =========== [PASSED] drm_test_cmdline_tv_options ===========
[19:41:55] =============== [PASSED] drm_cmdline_parser ================
[19:41:55] ========== drmm_connector_hdmi_init (20 subtests) ==========
[19:41:55] [PASSED] drm_test_connector_hdmi_init_valid
[19:41:55] [PASSED] drm_test_connector_hdmi_init_bpc_8
[19:41:55] [PASSED] drm_test_connector_hdmi_init_bpc_10
[19:41:55] [PASSED] drm_test_connector_hdmi_init_bpc_12
[19:41:55] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[19:41:55] [PASSED] drm_test_connector_hdmi_init_bpc_null
[19:41:55] [PASSED] drm_test_connector_hdmi_init_formats_empty
[19:41:55] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[19:41:55] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[19:41:55] [PASSED] supported_formats=0x9 yuv420_allowed=1
[19:41:55] [PASSED] supported_formats=0x9 yuv420_allowed=0
[19:41:55] [PASSED] supported_formats=0x3 yuv420_allowed=1
[19:41:55] [PASSED] supported_formats=0x3 yuv420_allowed=0
[19:41:55] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[19:41:55] [PASSED] drm_test_connector_hdmi_init_null_ddc
[19:41:55] [PASSED] drm_test_connector_hdmi_init_null_product
[19:41:55] [PASSED] drm_test_connector_hdmi_init_null_vendor
[19:41:55] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[19:41:55] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[19:41:55] [PASSED] drm_test_connector_hdmi_init_product_valid
[19:41:55] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[19:41:55] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[19:41:55] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[19:41:55] ========= drm_test_connector_hdmi_init_type_valid  =========
[19:41:55] [PASSED] HDMI-A
[19:41:55] [PASSED] HDMI-B
[19:41:55] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[19:41:55] ======== drm_test_connector_hdmi_init_type_invalid  ========
[19:41:55] [PASSED] Unknown
[19:41:55] [PASSED] VGA
[19:41:55] [PASSED] DVI-I
[19:41:55] [PASSED] DVI-D
[19:41:55] [PASSED] DVI-A
[19:41:55] [PASSED] Composite
[19:41:55] [PASSED] SVIDEO
[19:41:55] [PASSED] LVDS
[19:41:55] [PASSED] Component
[19:41:55] [PASSED] DIN
[19:41:55] [PASSED] DP
[19:41:55] [PASSED] TV
[19:41:55] [PASSED] eDP
[19:41:55] [PASSED] Virtual
[19:41:55] [PASSED] DSI
[19:41:55] [PASSED] DPI
[19:41:55] [PASSED] Writeback
[19:41:55] [PASSED] SPI
[19:41:55] [PASSED] USB
[19:41:55] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[19:41:55] ============ [PASSED] drmm_connector_hdmi_init =============
[19:41:55] ============= drmm_connector_init (3 subtests) =============
[19:41:55] [PASSED] drm_test_drmm_connector_init
[19:41:55] [PASSED] drm_test_drmm_connector_init_null_ddc
[19:41:55] ========= drm_test_drmm_connector_init_type_valid  =========
[19:41:55] [PASSED] Unknown
[19:41:55] [PASSED] VGA
[19:41:55] [PASSED] DVI-I
[19:41:55] [PASSED] DVI-D
[19:41:55] [PASSED] DVI-A
[19:41:55] [PASSED] Composite
[19:41:55] [PASSED] SVIDEO
[19:41:55] [PASSED] LVDS
[19:41:55] [PASSED] Component
[19:41:55] [PASSED] DIN
[19:41:55] [PASSED] DP
[19:41:55] [PASSED] HDMI-A
[19:41:55] [PASSED] HDMI-B
[19:41:55] [PASSED] TV
[19:41:55] [PASSED] eDP
[19:41:55] [PASSED] Virtual
[19:41:55] [PASSED] DSI
[19:41:55] [PASSED] DPI
[19:41:55] [PASSED] Writeback
[19:41:55] [PASSED] SPI
[19:41:55] [PASSED] USB
[19:41:55] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[19:41:55] =============== [PASSED] drmm_connector_init ===============
[19:41:55] ========= drm_connector_dynamic_init (6 subtests) ==========
[19:41:55] [PASSED] drm_test_drm_connector_dynamic_init
[19:41:55] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[19:41:55] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[19:41:55] [PASSED] drm_test_drm_connector_dynamic_init_properties
[19:41:55] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[19:41:55] [PASSED] Unknown
[19:41:55] [PASSED] VGA
[19:41:55] [PASSED] DVI-I
[19:41:55] [PASSED] DVI-D
[19:41:55] [PASSED] DVI-A
[19:41:55] [PASSED] Composite
[19:41:55] [PASSED] SVIDEO
[19:41:55] [PASSED] LVDS
[19:41:55] [PASSED] Component
[19:41:55] [PASSED] DIN
[19:41:55] [PASSED] DP
[19:41:55] [PASSED] HDMI-A
[19:41:55] [PASSED] HDMI-B
[19:41:55] [PASSED] TV
[19:41:55] [PASSED] eDP
[19:41:55] [PASSED] Virtual
[19:41:55] [PASSED] DSI
[19:41:55] [PASSED] DPI
[19:41:55] [PASSED] Writeback
[19:41:55] [PASSED] SPI
[19:41:55] [PASSED] USB
[19:41:55] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[19:41:55] ======== drm_test_drm_connector_dynamic_init_name  =========
[19:41:55] [PASSED] Unknown
[19:41:55] [PASSED] VGA
[19:41:55] [PASSED] DVI-I
[19:41:55] [PASSED] DVI-D
[19:41:55] [PASSED] DVI-A
[19:41:55] [PASSED] Composite
[19:41:55] [PASSED] SVIDEO
[19:41:55] [PASSED] LVDS
[19:41:55] [PASSED] Component
[19:41:55] [PASSED] DIN
[19:41:55] [PASSED] DP
[19:41:55] [PASSED] HDMI-A
[19:41:55] [PASSED] HDMI-B
[19:41:55] [PASSED] TV
[19:41:55] [PASSED] eDP
[19:41:55] [PASSED] Virtual
[19:41:55] [PASSED] DSI
[19:41:55] [PASSED] DPI
[19:41:55] [PASSED] Writeback
[19:41:55] [PASSED] SPI
[19:41:55] [PASSED] USB
[19:41:55] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[19:41:55] =========== [PASSED] drm_connector_dynamic_init ============
[19:41:55] ==== drm_connector_dynamic_register_early (4 subtests) =====
[19:41:55] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[19:41:55] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[19:41:55] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[19:41:55] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[19:41:55] ====== [PASSED] drm_connector_dynamic_register_early =======
[19:41:55] ======= drm_connector_dynamic_register (7 subtests) ========
[19:41:55] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[19:41:55] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[19:41:55] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[19:41:55] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[19:41:55] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[19:41:55] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[19:41:55] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[19:41:55] ========= [PASSED] drm_connector_dynamic_register ==========
[19:41:55] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[19:41:55] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[19:41:55] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[19:41:55] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[19:41:55] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[19:41:55] ========== drm_test_get_tv_mode_from_name_valid  ===========
[19:41:55] [PASSED] NTSC
[19:41:55] [PASSED] NTSC-443
[19:41:55] [PASSED] NTSC-J
[19:41:55] [PASSED] PAL
[19:41:55] [PASSED] PAL-M
[19:41:55] [PASSED] PAL-N
[19:41:55] [PASSED] SECAM
[19:41:55] [PASSED] Mono
[19:41:55] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[19:41:55] [PASSED] drm_test_get_tv_mode_from_name_truncated
[19:41:55] ============ [PASSED] drm_get_tv_mode_from_name ============
[19:41:55] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[19:41:55] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[19:41:55] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[19:41:55] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[19:41:55] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[19:41:55] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[19:41:55] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[19:41:55] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[19:41:55] [PASSED] VIC 96
[19:41:55] [PASSED] VIC 97
[19:41:55] [PASSED] VIC 101
[19:41:55] [PASSED] VIC 102
[19:41:55] [PASSED] VIC 106
[19:41:55] [PASSED] VIC 107
[19:41:55] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[19:41:55] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[19:41:55] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[19:41:55] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[19:41:55] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[19:41:55] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[19:41:55] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[19:41:55] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[19:41:55] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[19:41:55] [PASSED] Automatic
[19:41:55] [PASSED] Full
[19:41:55] [PASSED] Limited 16:235
[19:41:55] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[19:41:55] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[19:41:55] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[19:41:55] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[19:41:55] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[19:41:55] [PASSED] RGB
[19:41:55] [PASSED] YUV 4:2:0
[19:41:55] [PASSED] YUV 4:2:2
[19:41:55] [PASSED] YUV 4:4:4
[19:41:55] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[19:41:55] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[19:41:55] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[19:41:55] ============= drm_damage_helper (21 subtests) ==============
[19:41:55] [PASSED] drm_test_damage_iter_no_damage
[19:41:55] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[19:41:55] [PASSED] drm_test_damage_iter_no_damage_src_moved
[19:41:55] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[19:41:55] [PASSED] drm_test_damage_iter_no_damage_not_visible
[19:41:55] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[19:41:55] [PASSED] drm_test_damage_iter_no_damage_no_fb
[19:41:55] [PASSED] drm_test_damage_iter_simple_damage
[19:41:55] [PASSED] drm_test_damage_iter_single_damage
[19:41:55] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[19:41:55] [PASSED] drm_test_damage_iter_single_damage_outside_src
[19:41:55] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[19:41:55] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[19:41:55] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[19:41:55] [PASSED] drm_test_damage_iter_single_damage_src_moved
[19:41:55] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[19:41:55] [PASSED] drm_test_damage_iter_damage
[19:41:55] [PASSED] drm_test_damage_iter_damage_one_intersect
[19:41:55] [PASSED] drm_test_damage_iter_damage_one_outside
[19:41:55] [PASSED] drm_test_damage_iter_damage_src_moved
[19:41:55] [PASSED] drm_test_damage_iter_damage_not_visible
[19:41:55] ================ [PASSED] drm_damage_helper ================
[19:41:55] ============== drm_dp_mst_helper (3 subtests) ==============
[19:41:55] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[19:41:55] [PASSED] Clock 154000 BPP 30 DSC disabled
[19:41:55] [PASSED] Clock 234000 BPP 30 DSC disabled
[19:41:55] [PASSED] Clock 297000 BPP 24 DSC disabled
[19:41:55] [PASSED] Clock 332880 BPP 24 DSC enabled
[19:41:55] [PASSED] Clock 324540 BPP 24 DSC enabled
[19:41:55] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[19:41:55] ============== drm_test_dp_mst_calc_pbn_div  ===============
[19:41:55] [PASSED] Link rate 2000000 lane count 4
[19:41:55] [PASSED] Link rate 2000000 lane count 2
[19:41:55] [PASSED] Link rate 2000000 lane count 1
[19:41:55] [PASSED] Link rate 1350000 lane count 4
[19:41:55] [PASSED] Link rate 1350000 lane count 2
[19:41:55] [PASSED] Link rate 1350000 lane count 1
[19:41:55] [PASSED] Link rate 1000000 lane count 4
[19:41:55] [PASSED] Link rate 1000000 lane count 2
[19:41:55] [PASSED] Link rate 1000000 lane count 1
[19:41:55] [PASSED] Link rate 810000 lane count 4
[19:41:55] [PASSED] Link rate 810000 lane count 2
[19:41:55] [PASSED] Link rate 810000 lane count 1
[19:41:55] [PASSED] Link rate 540000 lane count 4
[19:41:55] [PASSED] Link rate 540000 lane count 2
[19:41:55] [PASSED] Link rate 540000 lane count 1
[19:41:55] [PASSED] Link rate 270000 lane count 4
[19:41:55] [PASSED] Link rate 270000 lane count 2
[19:41:55] [PASSED] Link rate 270000 lane count 1
[19:41:55] [PASSED] Link rate 162000 lane count 4
[19:41:55] [PASSED] Link rate 162000 lane count 2
[19:41:55] [PASSED] Link rate 162000 lane count 1
[19:41:55] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[19:41:55] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[19:41:55] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[19:41:55] [PASSED] DP_POWER_UP_PHY with port number
[19:41:55] [PASSED] DP_POWER_DOWN_PHY with port number
[19:41:55] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[19:41:55] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[19:41:55] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[19:41:55] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[19:41:55] [PASSED] DP_QUERY_PAYLOAD with port number
[19:41:55] [PASSED] DP_QUERY_PAYLOAD with VCPI
[19:41:55] [PASSED] DP_REMOTE_DPCD_READ with port number
[19:41:55] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[19:41:55] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[19:41:55] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[19:41:55] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[19:41:55] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[19:41:55] [PASSED] DP_REMOTE_I2C_READ with port number
[19:41:55] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[19:41:55] [PASSED] DP_REMOTE_I2C_READ with transactions array
[19:41:55] [PASSED] DP_REMOTE_I2C_WRITE with port number
[19:41:55] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[19:41:55] [PASSED] DP_REMOTE_I2C_WRITE with data array
[19:41:55] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[19:41:55] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[19:41:55] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[19:41:55] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[19:41:55] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[19:41:55] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[19:41:55] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[19:41:55] ================ [PASSED] drm_dp_mst_helper ================
[19:41:55] ================== drm_exec (7 subtests) ===================
[19:41:55] [PASSED] sanitycheck
[19:41:55] [PASSED] test_lock
[19:41:55] [PASSED] test_lock_unlock
[19:41:55] [PASSED] test_duplicates
[19:41:55] [PASSED] test_prepare
[19:41:55] [PASSED] test_prepare_array
[19:41:55] [PASSED] test_multiple_loops
[19:41:55] ==================== [PASSED] drm_exec =====================
[19:41:55] =========== drm_format_helper_test (17 subtests) ===========
[19:41:55] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[19:41:55] [PASSED] single_pixel_source_buffer
[19:41:55] [PASSED] single_pixel_clip_rectangle
[19:41:55] [PASSED] well_known_colors
[19:41:55] [PASSED] destination_pitch
[19:41:55] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[19:41:55] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[19:41:55] [PASSED] single_pixel_source_buffer
[19:41:55] [PASSED] single_pixel_clip_rectangle
[19:41:55] [PASSED] well_known_colors
[19:41:55] [PASSED] destination_pitch
[19:41:55] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[19:41:55] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[19:41:55] [PASSED] single_pixel_source_buffer
[19:41:55] [PASSED] single_pixel_clip_rectangle
[19:41:55] [PASSED] well_known_colors
[19:41:55] [PASSED] destination_pitch
[19:41:55] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[19:41:55] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[19:41:55] [PASSED] single_pixel_source_buffer
[19:41:55] [PASSED] single_pixel_clip_rectangle
[19:41:55] [PASSED] well_known_colors
[19:41:55] [PASSED] destination_pitch
[19:41:55] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[19:41:55] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[19:41:55] [PASSED] single_pixel_source_buffer
[19:41:55] [PASSED] single_pixel_clip_rectangle
[19:41:55] [PASSED] well_known_colors
[19:41:55] [PASSED] destination_pitch
[19:41:55] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[19:41:55] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[19:41:55] [PASSED] single_pixel_source_buffer
[19:41:55] [PASSED] single_pixel_clip_rectangle
[19:41:55] [PASSED] well_known_colors
[19:41:55] [PASSED] destination_pitch
[19:41:55] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[19:41:55] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[19:41:55] [PASSED] single_pixel_source_buffer
[19:41:55] [PASSED] single_pixel_clip_rectangle
[19:41:55] [PASSED] well_known_colors
[19:41:55] [PASSED] destination_pitch
[19:41:55] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[19:41:55] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[19:41:55] [PASSED] single_pixel_source_buffer
[19:41:55] [PASSED] single_pixel_clip_rectangle
[19:41:55] [PASSED] well_known_colors
[19:41:55] [PASSED] destination_pitch
[19:41:55] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[19:41:55] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[19:41:55] [PASSED] single_pixel_source_buffer
[19:41:55] [PASSED] single_pixel_clip_rectangle
[19:41:55] [PASSED] well_known_colors
[19:41:55] [PASSED] destination_pitch
[19:41:55] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[19:41:55] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[19:41:55] [PASSED] single_pixel_source_buffer
[19:41:55] [PASSED] single_pixel_clip_rectangle
[19:41:55] [PASSED] well_known_colors
[19:41:55] [PASSED] destination_pitch
[19:41:55] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[19:41:55] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[19:41:55] [PASSED] single_pixel_source_buffer
[19:41:55] [PASSED] single_pixel_clip_rectangle
[19:41:55] [PASSED] well_known_colors
[19:41:55] [PASSED] destination_pitch
[19:41:55] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[19:41:55] ============== drm_test_fb_xrgb8888_to_mono  ===============
[19:41:55] [PASSED] single_pixel_source_buffer
[19:41:55] [PASSED] single_pixel_clip_rectangle
[19:41:55] [PASSED] well_known_colors
[19:41:55] [PASSED] destination_pitch
[19:41:55] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[19:41:55] ==================== drm_test_fb_swab  =====================
[19:41:55] [PASSED] single_pixel_source_buffer
[19:41:55] [PASSED] single_pixel_clip_rectangle
[19:41:55] [PASSED] well_known_colors
[19:41:55] [PASSED] destination_pitch
[19:41:55] ================ [PASSED] drm_test_fb_swab =================
[19:41:55] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[19:41:55] [PASSED] single_pixel_source_buffer
[19:41:55] [PASSED] single_pixel_clip_rectangle
[19:41:55] [PASSED] well_known_colors
[19:41:55] [PASSED] destination_pitch
[19:41:55] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[19:41:55] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[19:41:55] [PASSED] single_pixel_source_buffer
[19:41:55] [PASSED] single_pixel_clip_rectangle
[19:41:55] [PASSED] well_known_colors
[19:41:55] [PASSED] destination_pitch
[19:41:55] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[19:41:55] ================= drm_test_fb_clip_offset  =================
[19:41:55] [PASSED] pass through
[19:41:55] [PASSED] horizontal offset
[19:41:55] [PASSED] vertical offset
[19:41:55] [PASSED] horizontal and vertical offset
[19:41:55] [PASSED] horizontal offset (custom pitch)
[19:41:55] [PASSED] vertical offset (custom pitch)
[19:41:55] [PASSED] horizontal and vertical offset (custom pitch)
[19:41:55] ============= [PASSED] drm_test_fb_clip_offset =============
[19:41:55] =================== drm_test_fb_memcpy  ====================
[19:41:55] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[19:41:55] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[19:41:55] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[19:41:55] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[19:41:55] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[19:41:55] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[19:41:55] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[19:41:55] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[19:41:55] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[19:41:55] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[19:41:55] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[19:41:55] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[19:41:55] =============== [PASSED] drm_test_fb_memcpy ================
[19:41:55] ============= [PASSED] drm_format_helper_test ==============
[19:41:55] ================= drm_format (18 subtests) =================
[19:41:55] [PASSED] drm_test_format_block_width_invalid
[19:41:55] [PASSED] drm_test_format_block_width_one_plane
[19:41:55] [PASSED] drm_test_format_block_width_two_plane
[19:41:55] [PASSED] drm_test_format_block_width_three_plane
[19:41:55] [PASSED] drm_test_format_block_width_tiled
[19:41:55] [PASSED] drm_test_format_block_height_invalid
[19:41:55] [PASSED] drm_test_format_block_height_one_plane
[19:41:55] [PASSED] drm_test_format_block_height_two_plane
[19:41:55] [PASSED] drm_test_format_block_height_three_plane
[19:41:55] [PASSED] drm_test_format_block_height_tiled
[19:41:55] [PASSED] drm_test_format_min_pitch_invalid
[19:41:55] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[19:41:55] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[19:41:55] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[19:41:55] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[19:41:55] [PASSED] drm_test_format_min_pitch_two_plane
[19:41:55] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[19:41:55] [PASSED] drm_test_format_min_pitch_tiled
[19:41:55] =================== [PASSED] drm_format ====================
[19:41:55] ============== drm_framebuffer (10 subtests) ===============
[19:41:55] ========== drm_test_framebuffer_check_src_coords  ==========
[19:41:55] [PASSED] Success: source fits into fb
[19:41:55] [PASSED] Fail: overflowing fb with x-axis coordinate
[19:41:55] [PASSED] Fail: overflowing fb with y-axis coordinate
[19:41:55] [PASSED] Fail: overflowing fb with source width
[19:41:55] [PASSED] Fail: overflowing fb with source height
[19:41:55] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[19:41:55] [PASSED] drm_test_framebuffer_cleanup
[19:41:55] =============== drm_test_framebuffer_create  ===============
[19:41:55] [PASSED] ABGR8888 normal sizes
[19:41:55] [PASSED] ABGR8888 max sizes
[19:41:55] [PASSED] ABGR8888 pitch greater than min required
[19:41:55] [PASSED] ABGR8888 pitch less than min required
[19:41:55] [PASSED] ABGR8888 Invalid width
[19:41:55] [PASSED] ABGR8888 Invalid buffer handle
[19:41:55] [PASSED] No pixel format
[19:41:55] [PASSED] ABGR8888 Width 0
[19:41:55] [PASSED] ABGR8888 Height 0
[19:41:55] [PASSED] ABGR8888 Out of bound height * pitch combination
[19:41:55] [PASSED] ABGR8888 Large buffer offset
[19:41:55] [PASSED] ABGR8888 Buffer offset for inexistent plane
[19:41:55] [PASSED] ABGR8888 Invalid flag
[19:41:55] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[19:41:55] [PASSED] ABGR8888 Valid buffer modifier
[19:41:55] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[19:41:55] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[19:41:55] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[19:41:55] [PASSED] NV12 Normal sizes
[19:41:55] [PASSED] NV12 Max sizes
[19:41:55] [PASSED] NV12 Invalid pitch
[19:41:55] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[19:41:55] [PASSED] NV12 different  modifier per-plane
[19:41:55] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[19:41:55] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[19:41:55] [PASSED] NV12 Modifier for inexistent plane
[19:41:55] [PASSED] NV12 Handle for inexistent plane
[19:41:55] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[19:41:55] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[19:41:55] [PASSED] YVU420 Normal sizes
[19:41:55] [PASSED] YVU420 Max sizes
[19:41:55] [PASSED] YVU420 Invalid pitch
[19:41:55] [PASSED] YVU420 Different pitches
[19:41:55] [PASSED] YVU420 Different buffer offsets/pitches
[19:41:55] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[19:41:55] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[19:41:55] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[19:41:55] [PASSED] YVU420 Valid modifier
[19:41:55] [PASSED] YVU420 Different modifiers per plane
[19:41:55] [PASSED] YVU420 Modifier for inexistent plane
[19:41:55] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[19:41:55] [PASSED] X0L2 Normal sizes
[19:41:55] [PASSED] X0L2 Max sizes
[19:41:55] [PASSED] X0L2 Invalid pitch
[19:41:55] [PASSED] X0L2 Pitch greater than minimum required
[19:41:55] [PASSED] X0L2 Handle for inexistent plane
[19:41:55] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[19:41:55] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[19:41:55] [PASSED] X0L2 Valid modifier
[19:41:55] [PASSED] X0L2 Modifier for inexistent plane
[19:41:55] =========== [PASSED] drm_test_framebuffer_create ===========
[19:41:55] [PASSED] drm_test_framebuffer_free
[19:41:55] [PASSED] drm_test_framebuffer_init
[19:41:55] [PASSED] drm_test_framebuffer_init_bad_format
[19:41:55] [PASSED] drm_test_framebuffer_init_dev_mismatch
[19:41:55] [PASSED] drm_test_framebuffer_lookup
[19:41:55] [PASSED] drm_test_framebuffer_lookup_inexistent
[19:41:55] [PASSED] drm_test_framebuffer_modifiers_not_supported
[19:41:55] ================= [PASSED] drm_framebuffer =================
[19:41:55] ================ drm_gem_shmem (8 subtests) ================
[19:41:55] [PASSED] drm_gem_shmem_test_obj_create
[19:41:55] [PASSED] drm_gem_shmem_test_obj_create_private
[19:41:55] [PASSED] drm_gem_shmem_test_pin_pages
[19:41:55] [PASSED] drm_gem_shmem_test_vmap
[19:41:55] [PASSED] drm_gem_shmem_test_get_pages_sgt
[19:41:55] [PASSED] drm_gem_shmem_test_get_sg_table
[19:41:55] [PASSED] drm_gem_shmem_test_madvise
[19:41:55] [PASSED] drm_gem_shmem_test_purge
[19:41:55] ================== [PASSED] drm_gem_shmem ==================
[19:41:55] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[19:41:55] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[19:41:55] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[19:41:55] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[19:41:55] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[19:41:55] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[19:41:55] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[19:41:55] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[19:41:55] [PASSED] Automatic
[19:41:55] [PASSED] Full
[19:41:55] [PASSED] Limited 16:235
[19:41:55] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[19:41:55] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[19:41:55] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[19:41:55] [PASSED] drm_test_check_disable_connector
[19:41:55] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[19:41:55] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[19:41:55] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[19:41:55] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[19:41:55] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[19:41:55] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[19:41:55] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[19:41:55] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[19:41:55] [PASSED] drm_test_check_output_bpc_dvi
[19:41:55] [PASSED] drm_test_check_output_bpc_format_vic_1
[19:41:55] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[19:41:55] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[19:41:55] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[19:41:55] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[19:41:55] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[19:41:55] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[19:41:55] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[19:41:55] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[19:41:55] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[19:41:55] [PASSED] drm_test_check_broadcast_rgb_value
[19:41:55] [PASSED] drm_test_check_bpc_8_value
[19:41:55] [PASSED] drm_test_check_bpc_10_value
[19:41:55] [PASSED] drm_test_check_bpc_12_value
[19:41:55] [PASSED] drm_test_check_format_value
[19:41:55] [PASSED] drm_test_check_tmds_char_value
[19:41:55] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[19:41:55] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[19:41:55] [PASSED] drm_test_check_mode_valid
[19:41:55] [PASSED] drm_test_check_mode_valid_reject
[19:41:55] [PASSED] drm_test_check_mode_valid_reject_rate
[19:41:55] [PASSED] drm_test_check_mode_valid_reject_max_clock
[19:41:55] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[19:41:55] ================= drm_managed (2 subtests) =================
[19:41:55] [PASSED] drm_test_managed_release_action
[19:41:55] [PASSED] drm_test_managed_run_action
[19:41:55] =================== [PASSED] drm_managed ===================
[19:41:55] =================== drm_mm (6 subtests) ====================
[19:41:55] [PASSED] drm_test_mm_init
[19:41:55] [PASSED] drm_test_mm_debug
[19:41:55] [PASSED] drm_test_mm_align32
[19:41:55] [PASSED] drm_test_mm_align64
[19:41:55] [PASSED] drm_test_mm_lowest
[19:41:55] [PASSED] drm_test_mm_highest
[19:41:55] ===================== [PASSED] drm_mm ======================
[19:41:55] ============= drm_modes_analog_tv (5 subtests) =============
[19:41:55] [PASSED] drm_test_modes_analog_tv_mono_576i
[19:41:55] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[19:41:55] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[19:41:55] [PASSED] drm_test_modes_analog_tv_pal_576i
[19:41:55] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[19:41:55] =============== [PASSED] drm_modes_analog_tv ===============
[19:41:55] ============== drm_plane_helper (2 subtests) ===============
[19:41:55] =============== drm_test_check_plane_state  ================
[19:41:55] [PASSED] clipping_simple
[19:41:55] [PASSED] clipping_rotate_reflect
[19:41:55] [PASSED] positioning_simple
[19:41:55] [PASSED] upscaling
[19:41:55] [PASSED] downscaling
[19:41:55] [PASSED] rounding1
[19:41:55] [PASSED] rounding2
[19:41:55] [PASSED] rounding3
[19:41:55] [PASSED] rounding4
[19:41:55] =========== [PASSED] drm_test_check_plane_state ============
[19:41:55] =========== drm_test_check_invalid_plane_state  ============
[19:41:55] [PASSED] positioning_invalid
[19:41:55] [PASSED] upscaling_invalid
[19:41:55] [PASSED] downscaling_invalid
[19:41:55] ======= [PASSED] drm_test_check_invalid_plane_state ========
[19:41:55] ================ [PASSED] drm_plane_helper =================
[19:41:55] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[19:41:55] ====== drm_test_connector_helper_tv_get_modes_check  =======
[19:41:55] [PASSED] None
[19:41:55] [PASSED] PAL
[19:41:55] [PASSED] NTSC
[19:41:55] [PASSED] Both, NTSC Default
[19:41:55] [PASSED] Both, PAL Default
[19:41:55] [PASSED] Both, NTSC Default, with PAL on command-line
[19:41:55] [PASSED] Both, PAL Default, with NTSC on command-line
[19:41:55] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[19:41:55] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[19:41:55] ================== drm_rect (9 subtests) ===================
[19:41:55] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[19:41:55] [PASSED] drm_test_rect_clip_scaled_not_clipped
[19:41:55] [PASSED] drm_test_rect_clip_scaled_clipped
[19:41:55] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[19:41:55] ================= drm_test_rect_intersect  =================
[19:41:55] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[19:41:55] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[19:41:55] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[19:41:55] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[19:41:55] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[19:41:55] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[19:41:55] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[19:41:55] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[19:41:55] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[19:41:55] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[19:41:55] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[19:41:55] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[19:41:55] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[19:41:55] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[19:41:55] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[19:41:55] ============= [PASSED] drm_test_rect_intersect =============
[19:41:55] ================ drm_test_rect_calc_hscale  ================
[19:41:55] [PASSED] normal use
[19:41:55] [PASSED] out of max range
[19:41:55] [PASSED] out of min range
[19:41:55] [PASSED] zero dst
[19:41:55] [PASSED] negative src
[19:41:55] [PASSED] negative dst
[19:41:55] ============ [PASSED] drm_test_rect_calc_hscale ============
[19:41:55] ================ drm_test_rect_calc_vscale  ================
[19:41:55] [PASSED] normal use
[19:41:55] [PASSED] out of max range
[19:41:55] [PASSED] out of min range
[19:41:55] [PASSED] zero dst
[19:41:55] [PASSED] negative src
[19:41:55] [PASSED] negative dst
[19:41:55] ============ [PASSED] drm_test_rect_calc_vscale ============
[19:41:55] ================== drm_test_rect_rotate  ===================
[19:41:55] [PASSED] reflect-x
[19:41:55] [PASSED] reflect-y
[19:41:55] [PASSED] rotate-0
[19:41:55] [PASSED] rotate-90
[19:41:55] [PASSED] rotate-180
[19:41:55] [PASSED] rotate-270
stty: 'standard input': Inappropriate ioctl for device
[19:41:55] ============== [PASSED] drm_test_rect_rotate ===============
[19:41:55] ================ drm_test_rect_rotate_inv  =================
[19:41:55] [PASSED] reflect-x
[19:41:55] [PASSED] reflect-y
[19:41:55] [PASSED] rotate-0
[19:41:55] [PASSED] rotate-90
[19:41:55] [PASSED] rotate-180
[19:41:55] [PASSED] rotate-270
[19:41:55] ============ [PASSED] drm_test_rect_rotate_inv =============
[19:41:55] ==================== [PASSED] drm_rect =====================
[19:41:55] ============ drm_sysfb_modeset_test (1 subtest) ============
[19:41:55] ============ drm_test_sysfb_build_fourcc_list  =============
[19:41:55] [PASSED] no native formats
[19:41:55] [PASSED] XRGB8888 as native format
[19:41:55] [PASSED] remove duplicates
[19:41:55] [PASSED] convert alpha formats
[19:41:55] [PASSED] random formats
[19:41:55] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[19:41:55] ============= [PASSED] drm_sysfb_modeset_test ==============
[19:41:55] ============================================================
[19:41:55] Testing complete. Ran 616 tests: passed: 616
[19:41:55] Elapsed time: 23.642s total, 1.682s configuring, 21.790s building, 0.147s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[19:41:55] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[19:41:57] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[19:42:04] Starting KUnit Kernel (1/1)...
[19:42:04] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[19:42:04] ================= ttm_device (5 subtests) ==================
[19:42:04] [PASSED] ttm_device_init_basic
[19:42:04] [PASSED] ttm_device_init_multiple
[19:42:04] [PASSED] ttm_device_fini_basic
[19:42:04] [PASSED] ttm_device_init_no_vma_man
[19:42:04] ================== ttm_device_init_pools  ==================
[19:42:04] [PASSED] No DMA allocations, no DMA32 required
[19:42:04] [PASSED] DMA allocations, DMA32 required
[19:42:04] [PASSED] No DMA allocations, DMA32 required
[19:42:04] [PASSED] DMA allocations, no DMA32 required
[19:42:04] ============== [PASSED] ttm_device_init_pools ==============
[19:42:04] =================== [PASSED] ttm_device ====================
[19:42:04] ================== ttm_pool (8 subtests) ===================
[19:42:04] ================== ttm_pool_alloc_basic  ===================
[19:42:04] [PASSED] One page
[19:42:04] [PASSED] More than one page
[19:42:04] [PASSED] Above the allocation limit
[19:42:04] [PASSED] One page, with coherent DMA mappings enabled
[19:42:04] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[19:42:04] ============== [PASSED] ttm_pool_alloc_basic ===============
[19:42:04] ============== ttm_pool_alloc_basic_dma_addr  ==============
[19:42:04] [PASSED] One page
[19:42:04] [PASSED] More than one page
[19:42:04] [PASSED] Above the allocation limit
[19:42:04] [PASSED] One page, with coherent DMA mappings enabled
[19:42:04] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[19:42:04] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[19:42:04] [PASSED] ttm_pool_alloc_order_caching_match
[19:42:04] [PASSED] ttm_pool_alloc_caching_mismatch
[19:42:04] [PASSED] ttm_pool_alloc_order_mismatch
[19:42:04] [PASSED] ttm_pool_free_dma_alloc
[19:42:04] [PASSED] ttm_pool_free_no_dma_alloc
[19:42:04] [PASSED] ttm_pool_fini_basic
[19:42:04] ==================== [PASSED] ttm_pool =====================
[19:42:04] ================ ttm_resource (8 subtests) =================
[19:42:04] ================= ttm_resource_init_basic  =================
[19:42:04] [PASSED] Init resource in TTM_PL_SYSTEM
[19:42:04] [PASSED] Init resource in TTM_PL_VRAM
[19:42:04] [PASSED] Init resource in a private placement
[19:42:04] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[19:42:04] ============= [PASSED] ttm_resource_init_basic =============
[19:42:04] [PASSED] ttm_resource_init_pinned
[19:42:04] [PASSED] ttm_resource_fini_basic
[19:42:04] [PASSED] ttm_resource_manager_init_basic
[19:42:04] [PASSED] ttm_resource_manager_usage_basic
[19:42:04] [PASSED] ttm_resource_manager_set_used_basic
[19:42:04] [PASSED] ttm_sys_man_alloc_basic
[19:42:04] [PASSED] ttm_sys_man_free_basic
[19:42:04] ================== [PASSED] ttm_resource ===================
[19:42:04] =================== ttm_tt (15 subtests) ===================
[19:42:04] ==================== ttm_tt_init_basic  ====================
[19:42:04] [PASSED] Page-aligned size
[19:42:04] [PASSED] Extra pages requested
[19:42:04] ================ [PASSED] ttm_tt_init_basic ================
[19:42:04] [PASSED] ttm_tt_init_misaligned
[19:42:04] [PASSED] ttm_tt_fini_basic
[19:42:04] [PASSED] ttm_tt_fini_sg
[19:42:04] [PASSED] ttm_tt_fini_shmem
[19:42:04] [PASSED] ttm_tt_create_basic
[19:42:04] [PASSED] ttm_tt_create_invalid_bo_type
[19:42:04] [PASSED] ttm_tt_create_ttm_exists
[19:42:04] [PASSED] ttm_tt_create_failed
[19:42:04] [PASSED] ttm_tt_destroy_basic
[19:42:04] [PASSED] ttm_tt_populate_null_ttm
[19:42:04] [PASSED] ttm_tt_populate_populated_ttm
[19:42:04] [PASSED] ttm_tt_unpopulate_basic
[19:42:04] [PASSED] ttm_tt_unpopulate_empty_ttm
[19:42:04] [PASSED] ttm_tt_swapin_basic
[19:42:04] ===================== [PASSED] ttm_tt ======================
[19:42:04] =================== ttm_bo (14 subtests) ===================
[19:42:04] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[19:42:04] [PASSED] Cannot be interrupted and sleeps
[19:42:04] [PASSED] Cannot be interrupted, locks straight away
[19:42:04] [PASSED] Can be interrupted, sleeps
[19:42:04] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[19:42:04] [PASSED] ttm_bo_reserve_locked_no_sleep
[19:42:04] [PASSED] ttm_bo_reserve_no_wait_ticket
[19:42:04] [PASSED] ttm_bo_reserve_double_resv
[19:42:04] [PASSED] ttm_bo_reserve_interrupted
[19:42:04] [PASSED] ttm_bo_reserve_deadlock
[19:42:04] [PASSED] ttm_bo_unreserve_basic
[19:42:04] [PASSED] ttm_bo_unreserve_pinned
[19:42:04] [PASSED] ttm_bo_unreserve_bulk
[19:42:04] [PASSED] ttm_bo_put_basic
[19:42:04] [PASSED] ttm_bo_put_shared_resv
[19:42:04] [PASSED] ttm_bo_pin_basic
[19:42:04] [PASSED] ttm_bo_pin_unpin_resource
[19:42:04] [PASSED] ttm_bo_multiple_pin_one_unpin
[19:42:04] ===================== [PASSED] ttm_bo ======================
[19:42:04] ============== ttm_bo_validate (22 subtests) ===============
[19:42:04] ============== ttm_bo_init_reserved_sys_man  ===============
[19:42:04] [PASSED] Buffer object for userspace
[19:42:04] [PASSED] Kernel buffer object
[19:42:04] [PASSED] Shared buffer object
[19:42:04] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[19:42:04] ============== ttm_bo_init_reserved_mock_man  ==============
[19:42:04] [PASSED] Buffer object for userspace
[19:42:04] [PASSED] Kernel buffer object
[19:42:04] [PASSED] Shared buffer object
[19:42:04] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[19:42:04] [PASSED] ttm_bo_init_reserved_resv
[19:42:04] ================== ttm_bo_validate_basic  ==================
[19:42:04] [PASSED] Buffer object for userspace
[19:42:04] [PASSED] Kernel buffer object
[19:42:04] [PASSED] Shared buffer object
[19:42:04] ============== [PASSED] ttm_bo_validate_basic ==============
[19:42:04] [PASSED] ttm_bo_validate_invalid_placement
[19:42:04] ============= ttm_bo_validate_same_placement  ==============
[19:42:04] [PASSED] System manager
[19:42:04] [PASSED] VRAM manager
[19:42:04] ========= [PASSED] ttm_bo_validate_same_placement ==========
[19:42:04] [PASSED] ttm_bo_validate_failed_alloc
[19:42:04] [PASSED] ttm_bo_validate_pinned
[19:42:04] [PASSED] ttm_bo_validate_busy_placement
[19:42:04] ================ ttm_bo_validate_multihop  =================
[19:42:04] [PASSED] Buffer object for userspace
[19:42:04] [PASSED] Kernel buffer object
[19:42:04] [PASSED] Shared buffer object
[19:42:04] ============ [PASSED] ttm_bo_validate_multihop =============
[19:42:04] ========== ttm_bo_validate_no_placement_signaled  ==========
[19:42:04] [PASSED] Buffer object in system domain, no page vector
[19:42:04] [PASSED] Buffer object in system domain with an existing page vector
[19:42:04] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[19:42:04] ======== ttm_bo_validate_no_placement_not_signaled  ========
[19:42:04] [PASSED] Buffer object for userspace
[19:42:04] [PASSED] Kernel buffer object
[19:42:04] [PASSED] Shared buffer object
[19:42:04] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[19:42:04] [PASSED] ttm_bo_validate_move_fence_signaled
[19:42:05] ========= ttm_bo_validate_move_fence_not_signaled  =========
[19:42:05] [PASSED] Waits for GPU
[19:42:05] [PASSED] Tries to lock straight away
[19:42:05] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[19:42:05] [PASSED] ttm_bo_validate_swapout
[19:42:05] [PASSED] ttm_bo_validate_happy_evict
[19:42:05] [PASSED] ttm_bo_validate_all_pinned_evict
[19:42:05] [PASSED] ttm_bo_validate_allowed_only_evict
[19:42:05] [PASSED] ttm_bo_validate_deleted_evict
[19:42:05] [PASSED] ttm_bo_validate_busy_domain_evict
[19:42:05] [PASSED] ttm_bo_validate_evict_gutting
[19:42:05] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[19:42:05] ================= [PASSED] ttm_bo_validate =================
[19:42:05] ============================================================
[19:42:05] Testing complete. Ran 102 tests: passed: 102
[19:42:05] Elapsed time: 9.987s total, 1.660s configuring, 7.710s building, 0.525s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✗ CI.checksparse: warning for Introducing firmware late binding

[Patchwork]

== Series Details ==

Series: Introducing firmware late binding
URL   : https://patchwork.freedesktop.org/series/151290/
State : warning

== Summary ==

+ trap cleanup EXIT
+ KERNEL=/kernel
+ MT=/root/linux/maintainer-tools
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools /root/linux/maintainer-tools
Cloning into '/root/linux/maintainer-tools'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ make -C /root/linux/maintainer-tools
make: Entering directory '/root/linux/maintainer-tools'
cc -O2 -g -Wextra -o remap-log remap-log.c
make: Leaving directory '/root/linux/maintainer-tools'
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ /root/linux/maintainer-tools/dim sparse --fast b9993cff911b1dd0abde4929435cc1eeb79e1c8f
Sparse version: 0.6.4 (Ubuntu: 0.6.4-4ubuntu3)
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/i915/display/intel_display_types.h:2019:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2032:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_hdcp.c: note: in included file:

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for Introducing firmware late binding

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 849 bytes --]

== Series Details ==

Series: Introducing firmware late binding
URL   : https://patchwork.freedesktop.org/series/151290/
State : success

== Summary ==

CI Bug Log - changes from xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f_BAT -> xe-pw-151290v1_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (9 -> 8)
------------------------------

  Missing    (1): bat-adlp-vm 


Changes
-------

  No changes found


Build changes
-------------

  * Linux: xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f -> xe-pw-151290v1

  IGT_8445: 8445
  xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f: b9993cff911b1dd0abde4929435cc1eeb79e1c8f
  xe-pw-151290v1: 151290v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/index.html

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✗ Xe.CI.Full: failure for Introducing firmware late binding

[Patchwork]

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== Series Details ==

Series: Introducing firmware late binding
URL   : https://patchwork.freedesktop.org/series/151290/
State : failure

== Summary ==

CI Bug Log - changes from xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f_FULL -> xe-pw-151290v1_FULL
====================================================

Summary
-------

  **FAILURE**

  Serious unknown changes coming with xe-pw-151290v1_FULL absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in xe-pw-151290v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  

Participating hosts (4 -> 4)
------------------------------

  No changes in participating hosts

Possible new issues
-------------------

  Here are the unknown changes that may have been introduced in xe-pw-151290v1_FULL:

### IGT changes ###

#### Possible regressions ####

  * igt@xe_exec_system_allocator@twice-large-malloc-multi-fault:
    - shard-lnl:          [PASS][1] -> [FAIL][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-lnl-3/igt@xe_exec_system_allocator@twice-large-malloc-multi-fault.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-lnl-4/igt@xe_exec_system_allocator@twice-large-malloc-multi-fault.html

  
Known issues
------------

  Here are the changes found in xe-pw-151290v1_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@core_setmaster@master-drop-set-root:
    - shard-dg2-set2:     [PASS][3] -> [FAIL][4] ([Intel XE#4208]) +1 other test fail
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-433/igt@core_setmaster@master-drop-set-root.html
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@core_setmaster@master-drop-set-root.html

  * igt@fbdev@nullptr:
    - shard-dg2-set2:     [PASS][5] -> [SKIP][6] ([Intel XE#2134])
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-432/igt@fbdev@nullptr.html
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@fbdev@nullptr.html

  * igt@intel_sysfs_debugfs@xe-base:
    - shard-dg2-set2:     [PASS][7] -> [SKIP][8] ([Intel XE#4208] / [Intel XE#4618]) +1 other test skip
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-433/igt@intel_sysfs_debugfs@xe-base.html
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@intel_sysfs_debugfs@xe-base.html

  * igt@kms_atomic_transition@plane-toggle-modeset-transition:
    - shard-adlp:         NOTRUN -> [FAIL][9] ([Intel XE#3908]) +1 other test fail
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-adlp-1/igt@kms_atomic_transition@plane-toggle-modeset-transition.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-adlp:         NOTRUN -> [DMESG-WARN][10] ([Intel XE#2953] / [Intel XE#4173])
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-adlp-1/igt@kms_big_fb@x-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180:
    - shard-lnl:          NOTRUN -> [SKIP][11] ([Intel XE#1124]) +1 other test skip
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-lnl-1/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180.html

  * igt@kms_big_fb@yf-tiled-addfb-size-overflow:
    - shard-adlp:         NOTRUN -> [SKIP][12] ([Intel XE#610])
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-adlp-1/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html
    - shard-lnl:          NOTRUN -> [SKIP][13] ([Intel XE#1428])
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-lnl-1/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
    - shard-adlp:         NOTRUN -> [SKIP][14] ([Intel XE#1124]) +2 other tests skip
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-adlp-1/igt@kms_big_fb@yf-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html

  * igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs:
    - shard-lnl:          NOTRUN -> [SKIP][15] ([Intel XE#2887])
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-lnl-1/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs.html

  * igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-1:
    - shard-adlp:         NOTRUN -> [SKIP][16] ([Intel XE#787]) +5 other tests skip
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-adlp-1/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-a-hdmi-a-1.html

  * igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-d-hdmi-a-1:
    - shard-adlp:         NOTRUN -> [SKIP][17] ([Intel XE#455] / [Intel XE#787]) +3 other tests skip
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-adlp-1/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-mc-ccs@pipe-d-hdmi-a-1.html

  * igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs@pipe-a-dp-2:
    - shard-dg2-set2:     NOTRUN -> [SKIP][18] ([Intel XE#787]) +160 other tests skip
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-432/igt@kms_ccs@bad-aux-stride-4-tiled-mtl-rc-ccs@pipe-a-dp-2.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs@pipe-a-edp-1:
    - shard-lnl:          NOTRUN -> [SKIP][19] ([Intel XE#2669]) +3 other tests skip
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-lnl-1/igt@kms_ccs@bad-rotation-90-4-tiled-bmg-ccs@pipe-a-edp-1.html

  * igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs:
    - shard-dg2-set2:     [PASS][20] -> [SKIP][21] ([Intel XE#2351] / [Intel XE#4208]) +9 other tests skip
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-466/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs.html
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs.html

  * igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs-cc@pipe-d-dp-4:
    - shard-dg2-set2:     NOTRUN -> [SKIP][22] ([Intel XE#455] / [Intel XE#787]) +24 other tests skip
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-435/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs-cc@pipe-d-dp-4.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs@pipe-b-dp-2:
    - shard-bmg:          NOTRUN -> [SKIP][23] ([Intel XE#2652] / [Intel XE#787]) +3 other tests skip
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-bmg-8/igt@kms_ccs@crc-primary-rotation-180-4-tiled-lnl-ccs@pipe-b-dp-2.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs:
    - shard-dg2-set2:     NOTRUN -> [SKIP][24] ([Intel XE#3442])
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-432/igt@kms_ccs@crc-primary-suspend-4-tiled-bmg-ccs.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs:
    - shard-dg2-set2:     [PASS][25] -> [INCOMPLETE][26] ([Intel XE#3862]) +1 other test incomplete
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-464/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-434/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs.html

  * igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs:
    - shard-adlp:         NOTRUN -> [SKIP][27] ([Intel XE#2907]) +1 other test skip
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-adlp-1/igt@kms_ccs@crc-sprite-planes-basic-4-tiled-lnl-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs:
    - shard-dg2-set2:     [PASS][28] -> [INCOMPLETE][29] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345] / [Intel XE#4522])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-432/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-b-dp-4:
    - shard-dg2-set2:     NOTRUN -> [INCOMPLETE][30] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345] / [Intel XE#4522])
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-b-dp-4.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-c-dp-4:
    - shard-dg2-set2:     NOTRUN -> [INCOMPLETE][31] ([Intel XE#2705] / [Intel XE#4212])
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-c-dp-4.html

  * igt@kms_chamelium_color@ctm-0-75:
    - shard-dg2-set2:     NOTRUN -> [SKIP][32] ([Intel XE#306])
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-432/igt@kms_chamelium_color@ctm-0-75.html

  * igt@kms_content_protection@dp-mst-type-1:
    - shard-dg2-set2:     NOTRUN -> [SKIP][33] ([Intel XE#307])
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-434/igt@kms_content_protection@dp-mst-type-1.html

  * igt@kms_content_protection@srm@pipe-a-dp-4:
    - shard-dg2-set2:     NOTRUN -> [FAIL][34] ([Intel XE#1178]) +1 other test fail
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-435/igt@kms_content_protection@srm@pipe-a-dp-4.html

  * igt@kms_cursor_crc@cursor-sliding-256x85:
    - shard-lnl:          NOTRUN -> [SKIP][35] ([Intel XE#1424]) +1 other test skip
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-lnl-1/igt@kms_cursor_crc@cursor-sliding-256x85.html

  * igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size:
    - shard-bmg:          [PASS][36] -> [SKIP][37] ([Intel XE#2291]) +3 other tests skip
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-bmg-4/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-bmg-6/igt@kms_cursor_legacy@cursora-vs-flipb-atomic-transitions-varying-size.html

  * igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle:
    - shard-dg2-set2:     NOTRUN -> [SKIP][38] ([Intel XE#323])
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-432/igt@kms_cursor_legacy@short-busy-flip-before-cursor-toggle.html

  * igt@kms_display_modes@extended-mode-basic:
    - shard-bmg:          [PASS][39] -> [SKIP][40] ([Intel XE#4302])
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-bmg-7/igt@kms_display_modes@extended-mode-basic.html
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-bmg-5/igt@kms_display_modes@extended-mode-basic.html

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-6:
    - shard-dg2-set2:     NOTRUN -> [SKIP][41] ([Intel XE#4494] / [i915#3804])
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-434/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-6.html

  * igt@kms_flip@2x-flip-vs-panning-vs-hang:
    - shard-adlp:         NOTRUN -> [SKIP][42] ([Intel XE#310]) +1 other test skip
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-adlp-1/igt@kms_flip@2x-flip-vs-panning-vs-hang.html

  * igt@kms_flip@2x-nonexisting-fb:
    - shard-lnl:          NOTRUN -> [SKIP][43] ([Intel XE#1421]) +1 other test skip
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-lnl-1/igt@kms_flip@2x-nonexisting-fb.html

  * igt@kms_flip@2x-plain-flip:
    - shard-bmg:          [PASS][44] -> [SKIP][45] ([Intel XE#2316]) +6 other tests skip
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-bmg-2/igt@kms_flip@2x-plain-flip.html
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-bmg-5/igt@kms_flip@2x-plain-flip.html

  * igt@kms_flip@absolute-wf_vblank-interruptible:
    - shard-dg2-set2:     NOTRUN -> [INCOMPLETE][46] ([Intel XE#2049]) +1 other test incomplete
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-432/igt@kms_flip@absolute-wf_vblank-interruptible.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1:
    - shard-lnl:          [PASS][47] -> [FAIL][48] ([Intel XE#301]) +2 other tests fail
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-lnl-6/igt@kms_flip@flip-vs-expired-vblank-interruptible@b-edp1.html

  * igt@kms_flip@flip-vs-rmfb-interruptible@b-hdmi-a1:
    - shard-adlp:         NOTRUN -> [DMESG-WARN][49] ([Intel XE#4543]) +2 other tests dmesg-warn
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-adlp-6/igt@kms_flip@flip-vs-rmfb-interruptible@b-hdmi-a1.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling@pipe-a-valid-mode:
    - shard-dg2-set2:     NOTRUN -> [SKIP][50] ([Intel XE#455])
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-435/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling@pipe-a-valid-mode.html

  * igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-x-to-x:
    - shard-adlp:         [PASS][51] -> [DMESG-FAIL][52] ([Intel XE#4543]) +2 other tests dmesg-fail
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-adlp-9/igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-x-to-x.html
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-adlp-8/igt@kms_flip_tiling@flip-change-tiling@pipe-c-hdmi-a-1-x-to-x.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-shrfb-msflip-blt:
    - shard-dg2-set2:     NOTRUN -> [SKIP][53] ([Intel XE#651]) +2 other tests skip
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-432/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-shrfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-pri-shrfb-draw-blt:
    - shard-adlp:         NOTRUN -> [SKIP][54] ([Intel XE#651]) +2 other tests skip
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-adlp-6/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-pri-shrfb-draw-mmap-wc:
    - shard-lnl:          NOTRUN -> [SKIP][55] ([Intel XE#651]) +1 other test skip
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-lnl-1/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc:
    - shard-adlp:         NOTRUN -> [SKIP][56] ([Intel XE#653]) +1 other test skip
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-adlp-6/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt:
    - shard-dg2-set2:     NOTRUN -> [SKIP][57] ([Intel XE#653]) +2 other tests skip
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-432/igt@kms_frontbuffer_tracking@psr-2p-primscrn-indfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen:
    - shard-adlp:         NOTRUN -> [SKIP][58] ([Intel XE#656]) +6 other tests skip
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-adlp-1/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen.html
    - shard-lnl:          NOTRUN -> [SKIP][59] ([Intel XE#656]) +3 other tests skip
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-lnl-1/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-fullscreen.html

  * igt@kms_plane_cursor@primary@pipe-a-hdmi-a-2-size-256:
    - shard-dg2-set2:     NOTRUN -> [FAIL][60] ([Intel XE#616]) +2 other tests fail
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-432/igt@kms_plane_cursor@primary@pipe-a-hdmi-a-2-size-256.html

  * igt@kms_plane_multiple@2x-tiling-x:
    - shard-bmg:          [PASS][61] -> [SKIP][62] ([Intel XE#4596])
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-bmg-4/igt@kms_plane_multiple@2x-tiling-x.html
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-x.html

  * igt@kms_plane_scaling@plane-upscale-factor-0-25-with-modifiers:
    - shard-dg2-set2:     [PASS][63] -> [SKIP][64] ([Intel XE#4208] / [i915#2575]) +87 other tests skip
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-432/igt@kms_plane_scaling@plane-upscale-factor-0-25-with-modifiers.html
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_plane_scaling@plane-upscale-factor-0-25-with-modifiers.html

  * igt@kms_pm_backlight@basic-brightness:
    - shard-dg2-set2:     NOTRUN -> [SKIP][65] ([Intel XE#870])
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-432/igt@kms_pm_backlight@basic-brightness.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-primary-update-sf-dmg-area:
    - shard-dg2-set2:     NOTRUN -> [SKIP][66] ([Intel XE#1489]) +1 other test skip
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-432/igt@kms_psr2_sf@fbc-psr2-overlay-primary-update-sf-dmg-area.html

  * igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf:
    - shard-adlp:         NOTRUN -> [SKIP][67] ([Intel XE#1489])
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-adlp-3/igt@kms_psr2_sf@pr-cursor-plane-move-continuous-sf.html

  * igt@kms_psr@psr-primary-blt:
    - shard-adlp:         NOTRUN -> [SKIP][68] ([Intel XE#2850] / [Intel XE#929]) +2 other tests skip
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-adlp-3/igt@kms_psr@psr-primary-blt.html

  * igt@kms_psr@psr2-cursor-plane-onoff:
    - shard-dg2-set2:     NOTRUN -> [SKIP][69] ([Intel XE#2850] / [Intel XE#929]) +3 other tests skip
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-432/igt@kms_psr@psr2-cursor-plane-onoff.html

  * igt@xe_ccs@block-multicopy-compressed:
    - shard-adlp:         NOTRUN -> [SKIP][70] ([Intel XE#455] / [Intel XE#488])
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-adlp-1/igt@xe_ccs@block-multicopy-compressed.html

  * igt@xe_compute_preempt@compute-preempt-many-all-ram:
    - shard-adlp:         NOTRUN -> [SKIP][71] ([Intel XE#455]) +1 other test skip
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-adlp-3/igt@xe_compute_preempt@compute-preempt-many-all-ram.html

  * igt@xe_copy_basic@mem-set-linear-0xfd:
    - shard-adlp:         NOTRUN -> [SKIP][72] ([Intel XE#1126])
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-adlp-1/igt@xe_copy_basic@mem-set-linear-0xfd.html

  * igt@xe_eudebug_online@resume-one:
    - shard-dg2-set2:     NOTRUN -> [SKIP][73] ([Intel XE#4837]) +2 other tests skip
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-434/igt@xe_eudebug_online@resume-one.html

  * igt@xe_eudebug_sriov@deny-eudebug:
    - shard-dg2-set2:     NOTRUN -> [SKIP][74] ([Intel XE#4518])
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-434/igt@xe_eudebug_sriov@deny-eudebug.html

  * igt@xe_evict@evict-large-multi-vm:
    - shard-adlp:         NOTRUN -> [SKIP][75] ([Intel XE#261] / [Intel XE#688])
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-adlp-1/igt@xe_evict@evict-large-multi-vm.html
    - shard-lnl:          NOTRUN -> [SKIP][76] ([Intel XE#688])
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-lnl-1/igt@xe_evict@evict-large-multi-vm.html

  * igt@xe_exec_basic@many-null-rebind:
    - shard-dg2-set2:     [PASS][77] -> [SKIP][78] ([Intel XE#4208]) +182 other tests skip
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-433/igt@xe_exec_basic@many-null-rebind.html
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@xe_exec_basic@many-null-rebind.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue:
    - shard-adlp:         NOTRUN -> [SKIP][79] ([Intel XE#1392])
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-adlp-1/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue.html
    - shard-lnl:          NOTRUN -> [SKIP][80] ([Intel XE#1392])
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-lnl-1/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-bindexecqueue.html

  * igt@xe_exec_basic@multigpu-no-exec-userptr-invalidate:
    - shard-dg2-set2:     NOTRUN -> [SKIP][81] ([Intel XE#1392])
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-userptr-invalidate.html

  * igt@xe_exec_fault_mode@once-basic-imm:
    - shard-adlp:         NOTRUN -> [SKIP][82] ([Intel XE#288]) +5 other tests skip
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-adlp-1/igt@xe_exec_fault_mode@once-basic-imm.html

  * igt@xe_exec_fault_mode@twice-basic-prefetch:
    - shard-dg2-set2:     NOTRUN -> [SKIP][83] ([Intel XE#288]) +3 other tests skip
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-434/igt@xe_exec_fault_mode@twice-basic-prefetch.html

  * igt@xe_exec_system_allocator@evict-malloc-mix-bo:
    - shard-bmg:          [PASS][84] -> [ABORT][85] ([Intel XE#3970])
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-bmg-3/igt@xe_exec_system_allocator@evict-malloc-mix-bo.html
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-bmg-5/igt@xe_exec_system_allocator@evict-malloc-mix-bo.html

  * igt@xe_exec_system_allocator@threads-many-large-execqueues-mmap-new-huge:
    - shard-lnl:          NOTRUN -> [SKIP][86] ([Intel XE#4943]) +1 other test skip
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-lnl-1/igt@xe_exec_system_allocator@threads-many-large-execqueues-mmap-new-huge.html

  * igt@xe_exec_system_allocator@threads-many-large-malloc-multi-fault:
    - shard-adlp:         NOTRUN -> [SKIP][87] ([Intel XE#4915]) +44 other tests skip
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-adlp-3/igt@xe_exec_system_allocator@threads-many-large-malloc-multi-fault.html

  * igt@xe_exec_system_allocator@threads-many-large-mmap-shared-remap-dontunmap-eocheck:
    - shard-dg2-set2:     NOTRUN -> [SKIP][88] ([Intel XE#4915]) +42 other tests skip
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-434/igt@xe_exec_system_allocator@threads-many-large-mmap-shared-remap-dontunmap-eocheck.html

  * igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-new-bo-map-nomemset:
    - shard-lnl:          [PASS][89] -> [FAIL][90] ([Intel XE#5018])
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-lnl-5/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-new-bo-map-nomemset.html
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-lnl-1/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-new-bo-map-nomemset.html

  * igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv:
    - shard-adlp:         NOTRUN -> [ABORT][91] ([Intel XE#4917])
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-adlp-6/igt@xe_fault_injection@probe-fail-guc-xe_guc_ct_send_recv.html

  * igt@xe_oa@short-reads:
    - shard-adlp:         NOTRUN -> [SKIP][92] ([Intel XE#2541] / [Intel XE#3573])
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-adlp-1/igt@xe_oa@short-reads.html

  * igt@xe_peer2peer@write@write-gpua-vram01-gpub-system-p2p:
    - shard-dg2-set2:     NOTRUN -> [FAIL][93] ([Intel XE#1173])
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-463/igt@xe_peer2peer@write@write-gpua-vram01-gpub-system-p2p.html

  * igt@xe_pm@s2idle-multiple-execs:
    - shard-adlp:         [PASS][94] -> [DMESG-WARN][95] ([Intel XE#2953] / [Intel XE#4173]) +1 other test dmesg-warn
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-adlp-8/igt@xe_pm@s2idle-multiple-execs.html
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-adlp-4/igt@xe_pm@s2idle-multiple-execs.html

  * igt@xe_pmu@gt-frequency:
    - shard-dg2-set2:     [PASS][96] -> [FAIL][97] ([Intel XE#4819]) +1 other test fail
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-463/igt@xe_pmu@gt-frequency.html
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-435/igt@xe_pmu@gt-frequency.html

  * igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq:
    - shard-adlp:         NOTRUN -> [SKIP][98] ([Intel XE#4733])
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-adlp-1/igt@xe_pxp@pxp-stale-bo-bind-post-termination-irq.html

  * igt@xe_query@multigpu-query-topology:
    - shard-dg2-set2:     NOTRUN -> [SKIP][99] ([Intel XE#944])
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-432/igt@xe_query@multigpu-query-topology.html

  * igt@xe_render_copy@render-stress-4-copies:
    - shard-adlp:         NOTRUN -> [SKIP][100] ([Intel XE#4814])
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-adlp-1/igt@xe_render_copy@render-stress-4-copies.html

  
#### Possible fixes ####

  * igt@fbdev@eof:
    - shard-dg2-set2:     [SKIP][101] ([Intel XE#2134]) -> [PASS][102] +1 other test pass
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-466/igt@fbdev@eof.html
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-466/igt@fbdev@eof.html

  * igt@intel_sysfs_debugfs@xe-debugfs-read-all-entries-display-off:
    - shard-dg2-set2:     [SKIP][103] ([Intel XE#4208] / [Intel XE#4618]) -> [PASS][104]
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@intel_sysfs_debugfs@xe-debugfs-read-all-entries-display-off.html
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-435/igt@intel_sysfs_debugfs@xe-debugfs-read-all-entries-display-off.html

  * igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p:
    - shard-bmg:          [SKIP][105] ([Intel XE#2314] / [Intel XE#2894]) -> [PASS][106]
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-bmg-5/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-bmg-1/igt@kms_bw@connected-linear-tiling-2-displays-2560x1440p.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs:
    - shard-dg2-set2:     [INCOMPLETE][107] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4345] / [Intel XE#4522]) -> [PASS][108]
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-6:
    - shard-dg2-set2:     [INCOMPLETE][109] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522]) -> [PASS][110]
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-6.html
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-434/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs@pipe-b-hdmi-a-6.html

  * igt@kms_cursor_crc@cursor-suspend@pipe-a-hdmi-a-1:
    - shard-adlp:         [DMESG-WARN][111] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][112] +2 other tests pass
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-adlp-4/igt@kms_cursor_crc@cursor-suspend@pipe-a-hdmi-a-1.html
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-adlp-2/igt@kms_cursor_crc@cursor-suspend@pipe-a-hdmi-a-1.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-legacy:
    - shard-bmg:          [SKIP][113] ([Intel XE#2291]) -> [PASS][114] +11 other tests pass
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-bmg-3/igt@kms_cursor_legacy@cursorb-vs-flipa-legacy.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic:
    - shard-bmg:          [FAIL][115] ([Intel XE#4633]) -> [PASS][116]
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-bmg-6/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-bmg-8/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html

  * igt@kms_dp_link_training@non-uhbr-sst:
    - shard-bmg:          [SKIP][117] ([Intel XE#4354]) -> [PASS][118]
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-bmg-5/igt@kms_dp_link_training@non-uhbr-sst.html
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-bmg-1/igt@kms_dp_link_training@non-uhbr-sst.html

  * igt@kms_dp_linktrain_fallback@dp-fallback:
    - shard-bmg:          [SKIP][119] ([Intel XE#4294]) -> [PASS][120]
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-bmg-5/igt@kms_dp_linktrain_fallback@dp-fallback.html
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-bmg-7/igt@kms_dp_linktrain_fallback@dp-fallback.html

  * igt@kms_flip@2x-plain-flip-fb-recreate:
    - shard-bmg:          [SKIP][121] ([Intel XE#2316]) -> [PASS][122] +12 other tests pass
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-bmg-5/igt@kms_flip@2x-plain-flip-fb-recreate.html
   [122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-bmg-1/igt@kms_flip@2x-plain-flip-fb-recreate.html

  * igt@kms_flip@flip-vs-absolute-wf_vblank@d-hdmi-a1:
    - shard-adlp:         [DMESG-WARN][123] ([Intel XE#4543]) -> [PASS][124] +5 other tests pass
   [123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-adlp-1/igt@kms_flip@flip-vs-absolute-wf_vblank@d-hdmi-a1.html
   [124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-adlp-9/igt@kms_flip@flip-vs-absolute-wf_vblank@d-hdmi-a1.html

  * igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1:
    - shard-lnl:          [FAIL][125] ([Intel XE#301]) -> [PASS][126]
   [125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-lnl-1/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html
   [126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-lnl-6/igt@kms_flip@flip-vs-expired-vblank-interruptible@a-edp1.html

  * igt@kms_flip@flip-vs-suspend-interruptible:
    - shard-dg2-set2:     [INCOMPLETE][127] ([Intel XE#2049] / [Intel XE#2597]) -> [PASS][128]
   [127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-464/igt@kms_flip@flip-vs-suspend-interruptible.html
   [128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-432/igt@kms_flip@flip-vs-suspend-interruptible.html

  * igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-to-x:
    - shard-adlp:         [DMESG-FAIL][129] ([Intel XE#4543]) -> [PASS][130]
   [129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-adlp-9/igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-to-x.html
   [130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-adlp-8/igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-to-x.html

  * igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-wc:
    - shard-dg2-set2:     [SKIP][131] ([Intel XE#2351] / [Intel XE#4208]) -> [PASS][132] +8 other tests pass
   [131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-wc.html
   [132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-432/igt@kms_frontbuffer_tracking@fbc-1p-primscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_hdr@static-toggle-suspend:
    - shard-bmg:          [SKIP][133] ([Intel XE#1503]) -> [PASS][134]
   [133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-bmg-6/igt@kms_hdr@static-toggle-suspend.html
   [134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-bmg-7/igt@kms_hdr@static-toggle-suspend.html

  * igt@kms_joiner@basic-force-big-joiner:
    - shard-bmg:          [SKIP][135] ([Intel XE#3012]) -> [PASS][136]
   [135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-bmg-6/igt@kms_joiner@basic-force-big-joiner.html
   [136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-bmg-8/igt@kms_joiner@basic-force-big-joiner.html

  * igt@kms_lease@lease-invalid-crtc:
    - shard-dg2-set2:     [SKIP][137] ([Intel XE#4208] / [i915#2575]) -> [PASS][138] +94 other tests pass
   [137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_lease@lease-invalid-crtc.html
   [138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-463/igt@kms_lease@lease-invalid-crtc.html

  * igt@kms_plane_multiple@2x-tiling-none:
    - shard-bmg:          [SKIP][139] ([Intel XE#4596]) -> [PASS][140]
   [139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-none.html
   [140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-bmg-8/igt@kms_plane_multiple@2x-tiling-none.html

  * igt@kms_plane_scaling@2x-scaler-multi-pipe:
    - shard-bmg:          [SKIP][141] ([Intel XE#2571]) -> [PASS][142]
   [141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-bmg-5/igt@kms_plane_scaling@2x-scaler-multi-pipe.html
   [142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-bmg-7/igt@kms_plane_scaling@2x-scaler-multi-pipe.html

  * igt@kms_pm_dc@dc6-dpms:
    - shard-adlp:         [FAIL][143] ([Intel XE#718]) -> [PASS][144]
   [143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-adlp-9/igt@kms_pm_dc@dc6-dpms.html
   [144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-adlp-8/igt@kms_pm_dc@dc6-dpms.html

  * igt@kms_setmode@basic:
    - shard-bmg:          [FAIL][145] ([Intel XE#2883]) -> [PASS][146] +4 other tests pass
   [145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-bmg-2/igt@kms_setmode@basic.html
   [146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-bmg-2/igt@kms_setmode@basic.html

  * igt@kms_setmode@clone-exclusive-crtc:
    - shard-bmg:          [SKIP][147] ([Intel XE#1435]) -> [PASS][148] +1 other test pass
   [147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-bmg-5/igt@kms_setmode@clone-exclusive-crtc.html
   [148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-bmg-3/igt@kms_setmode@clone-exclusive-crtc.html

  * igt@xe_exec_basic@multigpu-no-exec-userptr-invalidate-race:
    - shard-dg2-set2:     [SKIP][149] ([Intel XE#1392]) -> [PASS][150]
   [149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-userptr-invalidate-race.html
   [150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-435/igt@xe_exec_basic@multigpu-no-exec-userptr-invalidate-race.html

  * igt@xe_exec_basic@twice-basic:
    - shard-adlp:         [DMESG-FAIL][151] -> [PASS][152]
   [151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-adlp-1/igt@xe_exec_basic@twice-basic.html
   [152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-adlp-1/igt@xe_exec_basic@twice-basic.html

  * igt@xe_module_load@reload-no-display:
    - shard-dg2-set2:     [FAIL][153] ([Intel XE#4208]) -> [PASS][154]
   [153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@xe_module_load@reload-no-display.html
   [154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-463/igt@xe_module_load@reload-no-display.html

  * igt@xe_vm@munmap-style-unbind-many-either-side-partial:
    - shard-dg2-set2:     [SKIP][155] ([Intel XE#4208]) -> [PASS][156] +209 other tests pass
   [155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@xe_vm@munmap-style-unbind-many-either-side-partial.html
   [156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-432/igt@xe_vm@munmap-style-unbind-many-either-side-partial.html

  
#### Warnings ####

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - shard-dg2-set2:     [SKIP][157] ([Intel XE#4208] / [i915#2575]) -> [SKIP][158] ([Intel XE#623])
   [157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-466/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html
   [158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-466/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_big_fb@4-tiled-16bpp-rotate-270:
    - shard-dg2-set2:     [SKIP][159] ([Intel XE#316]) -> [SKIP][160] ([Intel XE#2351] / [Intel XE#4208])
   [159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-466/igt@kms_big_fb@4-tiled-16bpp-rotate-270.html
   [160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_big_fb@4-tiled-16bpp-rotate-270.html

  * igt@kms_big_fb@4-tiled-8bpp-rotate-270:
    - shard-dg2-set2:     [SKIP][161] ([Intel XE#316]) -> [SKIP][162] ([Intel XE#4208]) +3 other tests skip
   [161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-432/igt@kms_big_fb@4-tiled-8bpp-rotate-270.html
   [162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_big_fb@4-tiled-8bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-8bpp-rotate-270:
    - shard-dg2-set2:     [SKIP][163] ([Intel XE#4208]) -> [SKIP][164] ([Intel XE#316]) +1 other test skip
   [163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_big_fb@x-tiled-8bpp-rotate-270.html
   [164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-463/igt@kms_big_fb@x-tiled-8bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-8bpp-rotate-90:
    - shard-dg2-set2:     [SKIP][165] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][166] ([Intel XE#316]) +1 other test skip
   [165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-466/igt@kms_big_fb@x-tiled-8bpp-rotate-90.html
   [166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-466/igt@kms_big_fb@x-tiled-8bpp-rotate-90.html

  * igt@kms_big_fb@y-tiled-addfb:
    - shard-dg2-set2:     [SKIP][167] ([Intel XE#619]) -> [SKIP][168] ([Intel XE#2351] / [Intel XE#4208])
   [167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-463/igt@kms_big_fb@y-tiled-addfb.html
   [168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_big_fb@y-tiled-addfb.html

  * igt@kms_big_fb@y-tiled-addfb-size-offset-overflow:
    - shard-dg2-set2:     [SKIP][169] ([Intel XE#607]) -> [SKIP][170] ([Intel XE#2351] / [Intel XE#4208])
   [169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-466/igt@kms_big_fb@y-tiled-addfb-size-offset-overflow.html
   [170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_big_fb@y-tiled-addfb-size-offset-overflow.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip:
    - shard-dg2-set2:     [SKIP][171] ([Intel XE#1124]) -> [SKIP][172] ([Intel XE#2351] / [Intel XE#4208]) +2 other tests skip
   [171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-432/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip.html
   [172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-0-hflip.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0:
    - shard-dg2-set2:     [SKIP][173] ([Intel XE#4208]) -> [SKIP][174] ([Intel XE#1124]) +6 other tests skip
   [173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0.html
   [174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-463/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0.html

  * igt@kms_big_fb@yf-tiled-32bpp-rotate-180:
    - shard-dg2-set2:     [SKIP][175] ([Intel XE#1124]) -> [SKIP][176] ([Intel XE#4208]) +4 other tests skip
   [175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-433/igt@kms_big_fb@yf-tiled-32bpp-rotate-180.html
   [176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_big_fb@yf-tiled-32bpp-rotate-180.html

  * igt@kms_big_fb@yf-tiled-addfb:
    - shard-dg2-set2:     [SKIP][177] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][178] ([Intel XE#619])
   [177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_big_fb@yf-tiled-addfb.html
   [178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-463/igt@kms_big_fb@yf-tiled-addfb.html

  * igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
    - shard-dg2-set2:     [SKIP][179] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][180] ([Intel XE#1124]) +3 other tests skip
   [179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
   [180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-435/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html

  * igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p:
    - shard-dg2-set2:     [SKIP][181] ([Intel XE#2191]) -> [SKIP][182] ([Intel XE#4208] / [i915#2575])
   [181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-463/igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p.html
   [182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p.html

  * igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p:
    - shard-dg2-set2:     [SKIP][183] ([Intel XE#4208] / [i915#2575]) -> [SKIP][184] ([Intel XE#2191]) +2 other tests skip
   [183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p.html
   [184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-463/igt@kms_bw@connected-linear-tiling-4-displays-3840x2160p.html

  * igt@kms_bw@linear-tiling-1-displays-2560x1440p:
    - shard-dg2-set2:     [SKIP][185] ([Intel XE#4208] / [i915#2575]) -> [SKIP][186] ([Intel XE#367])
   [185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_bw@linear-tiling-1-displays-2560x1440p.html
   [186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-463/igt@kms_bw@linear-tiling-1-displays-2560x1440p.html

  * igt@kms_bw@linear-tiling-3-displays-2160x1440p:
    - shard-dg2-set2:     [SKIP][187] ([Intel XE#367]) -> [SKIP][188] ([Intel XE#4208] / [i915#2575]) +2 other tests skip
   [187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-466/igt@kms_bw@linear-tiling-3-displays-2160x1440p.html
   [188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_bw@linear-tiling-3-displays-2160x1440p.html

  * igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-mc-ccs:
    - shard-dg2-set2:     [SKIP][189] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][190] ([Intel XE#455] / [Intel XE#787]) +2 other tests skip
   [189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-mc-ccs.html
   [190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-432/igt@kms_ccs@ccs-on-another-bo-4-tiled-mtl-mc-ccs.html

  * igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs:
    - shard-dg2-set2:     [SKIP][191] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][192] ([Intel XE#4208]) +6 other tests skip
   [191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-433/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs.html
   [192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-mc-ccs.html

  * igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs-cc:
    - shard-dg2-set2:     [SKIP][193] ([Intel XE#455] / [Intel XE#787]) -> [SKIP][194] ([Intel XE#2351] / [Intel XE#4208]) +2 other tests skip
   [193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-466/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs-cc.html
   [194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-rc-ccs-cc.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs:
    - shard-dg2-set2:     [SKIP][195] ([Intel XE#3442]) -> [SKIP][196] ([Intel XE#4208])
   [195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-432/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html
   [196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs.html

  * igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
    - shard-dg2-set2:     [SKIP][197] ([Intel XE#4208]) -> [INCOMPLETE][198] ([Intel XE#2705] / [Intel XE#4212])
   [197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
   [198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-463/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html

  * igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs:
    - shard-dg2-set2:     [SKIP][199] ([Intel XE#4208]) -> [SKIP][200] ([Intel XE#2907]) +1 other test skip
   [199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs.html
   [200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-435/igt@kms_ccs@random-ccs-data-4-tiled-lnl-ccs.html

  * igt@kms_ccs@random-ccs-data-y-tiled-ccs:
    - shard-dg2-set2:     [SKIP][201] ([Intel XE#4208]) -> [SKIP][202] ([Intel XE#455] / [Intel XE#787]) +12 other tests skip
   [201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_ccs@random-ccs-data-y-tiled-ccs.html
   [202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-463/igt@kms_ccs@random-ccs-data-y-tiled-ccs.html

  * igt@kms_chamelium_color@ctm-0-50:
    - shard-dg2-set2:     [SKIP][203] ([Intel XE#306]) -> [SKIP][204] ([Intel XE#4208] / [i915#2575]) +2 other tests skip
   [203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-432/igt@kms_chamelium_color@ctm-0-50.html
   [204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_chamelium_color@ctm-0-50.html

  * igt@kms_chamelium_color@ctm-limited-range:
    - shard-dg2-set2:     [SKIP][205] ([Intel XE#4208] / [i915#2575]) -> [SKIP][206] ([Intel XE#306])
   [205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_chamelium_color@ctm-limited-range.html
   [206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-463/igt@kms_chamelium_color@ctm-limited-range.html

  * igt@kms_chamelium_hpd@hdmi-hpd-for-each-pipe:
    - shard-dg2-set2:     [SKIP][207] ([Intel XE#373]) -> [SKIP][208] ([Intel XE#4208] / [i915#2575]) +8 other tests skip
   [207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-432/igt@kms_chamelium_hpd@hdmi-hpd-for-each-pipe.html
   [208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_chamelium_hpd@hdmi-hpd-for-each-pipe.html

  * igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode:
    - shard-dg2-set2:     [SKIP][209] ([Intel XE#4208] / [i915#2575]) -> [SKIP][210] ([Intel XE#373]) +10 other tests skip
   [209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode.html
   [210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-463/igt@kms_chamelium_hpd@hdmi-hpd-with-enabled-mode.html

  * igt@kms_content_protection@atomic:
    - shard-dg2-set2:     [FAIL][211] ([Intel XE#1178]) -> [SKIP][212] ([Intel XE#4208] / [i915#2575])
   [211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-463/igt@kms_content_protection@atomic.html
   [212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_content_protection@atomic.html

  * igt@kms_content_protection@dp-mst-lic-type-0:
    - shard-dg2-set2:     [SKIP][213] ([Intel XE#307]) -> [SKIP][214] ([Intel XE#4208] / [i915#2575])
   [213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-433/igt@kms_content_protection@dp-mst-lic-type-0.html
   [214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_content_protection@dp-mst-lic-type-0.html

  * igt@kms_content_protection@legacy:
    - shard-bmg:          [FAIL][215] ([Intel XE#1178]) -> [SKIP][216] ([Intel XE#2341]) +1 other test skip
   [215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-bmg-3/igt@kms_content_protection@legacy.html
   [216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-bmg-6/igt@kms_content_protection@legacy.html

  * igt@kms_content_protection@srm:
    - shard-dg2-set2:     [SKIP][217] ([Intel XE#4208] / [i915#2575]) -> [FAIL][218] ([Intel XE#1178])
   [217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_content_protection@srm.html
   [218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-435/igt@kms_content_protection@srm.html

  * igt@kms_cursor_crc@cursor-onscreen-512x512:
    - shard-dg2-set2:     [SKIP][219] ([Intel XE#308]) -> [SKIP][220] ([Intel XE#4208] / [i915#2575]) +1 other test skip
   [219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-466/igt@kms_cursor_crc@cursor-onscreen-512x512.html
   [220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_cursor_crc@cursor-onscreen-512x512.html

  * igt@kms_cursor_crc@cursor-rapid-movement-512x170:
    - shard-dg2-set2:     [SKIP][221] ([Intel XE#4208] / [i915#2575]) -> [SKIP][222] ([Intel XE#308]) +1 other test skip
   [221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html
   [222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-463/igt@kms_cursor_crc@cursor-rapid-movement-512x170.html

  * igt@kms_dirtyfb@psr-dirtyfb-ioctl:
    - shard-dg2-set2:     [SKIP][223] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][224] ([Intel XE#455])
   [223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html
   [224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-463/igt@kms_dirtyfb@psr-dirtyfb-ioctl.html

  * igt@kms_dp_linktrain_fallback@dsc-fallback:
    - shard-dg2-set2:     [SKIP][225] ([Intel XE#4208]) -> [SKIP][226] ([Intel XE#4331])
   [225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_dp_linktrain_fallback@dsc-fallback.html
   [226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-432/igt@kms_dp_linktrain_fallback@dsc-fallback.html

  * igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests:
    - shard-dg2-set2:     [SKIP][227] ([Intel XE#4422]) -> [SKIP][228] ([Intel XE#4208])
   [227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-433/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests.html
   [228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-dirtyfb-tests.html

  * igt@kms_feature_discovery@display-3x:
    - shard-dg2-set2:     [SKIP][229] ([Intel XE#703]) -> [SKIP][230] ([Intel XE#4208] / [i915#2575])
   [229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-466/igt@kms_feature_discovery@display-3x.html
   [230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_feature_discovery@display-3x.html

  * igt@kms_feature_discovery@dp-mst:
    - shard-dg2-set2:     [SKIP][231] ([Intel XE#4208] / [i915#2575]) -> [SKIP][232] ([Intel XE#1137])
   [231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_feature_discovery@dp-mst.html
   [232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-463/igt@kms_feature_discovery@dp-mst.html

  * igt@kms_feature_discovery@psr1:
    - shard-dg2-set2:     [SKIP][233] ([Intel XE#4208] / [i915#2575]) -> [SKIP][234] ([Intel XE#1135])
   [233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_feature_discovery@psr1.html
   [234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-435/igt@kms_feature_discovery@psr1.html

  * igt@kms_feature_discovery@psr2:
    - shard-dg2-set2:     [SKIP][235] ([Intel XE#1135]) -> [SKIP][236] ([Intel XE#4208] / [i915#2575])
   [235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-463/igt@kms_feature_discovery@psr2.html
   [236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_feature_discovery@psr2.html

  * igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling:
    - shard-dg2-set2:     [SKIP][237] ([Intel XE#4208]) -> [SKIP][238] ([Intel XE#455])
   [237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling.html
   [238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-435/igt@kms_flip_scaled_crc@flip-32bpp-ytile-to-64bpp-ytile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling:
    - shard-dg2-set2:     [SKIP][239] ([Intel XE#455]) -> [SKIP][240] ([Intel XE#2351] / [Intel XE#4208])
   [239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-463/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling.html
   [240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-downscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling:
    - shard-dg2-set2:     [SKIP][241] ([Intel XE#455]) -> [SKIP][242] ([Intel XE#4208]) +5 other tests skip
   [241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-466/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling.html
   [242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-32bpp-ytilercccs-downscaling.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt:
    - shard-bmg:          [SKIP][243] ([Intel XE#2311]) -> [SKIP][244] ([Intel XE#2312]) +19 other tests skip
   [243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-bmg-4/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html
   [244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-indfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-draw-render:
    - shard-bmg:          [SKIP][245] ([Intel XE#2312]) -> [SKIP][246] ([Intel XE#2311]) +29 other tests skip
   [245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-bmg-5/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-draw-render.html
   [246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-spr-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-shrfb-draw-render:
    - shard-dg2-set2:     [SKIP][247] ([Intel XE#651]) -> [SKIP][248] ([Intel XE#4208]) +19 other tests skip
   [247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-432/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-shrfb-draw-render.html
   [248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-shrfb-draw-render.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen:
    - shard-dg2-set2:     [SKIP][249] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][250] ([Intel XE#651]) +3 other tests skip
   [249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen.html
   [250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-435/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-spr-indfb-fullscreen.html

  * igt@kms_frontbuffer_tracking@drrs-indfb-scaledprimary:
    - shard-dg2-set2:     [SKIP][251] ([Intel XE#4208]) -> [SKIP][252] ([Intel XE#651]) +28 other tests skip
   [251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_frontbuffer_tracking@drrs-indfb-scaledprimary.html
   [252]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-432/igt@kms_frontbuffer_tracking@drrs-indfb-scaledprimary.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][253] ([Intel XE#5390]) -> [SKIP][254] ([Intel XE#2312]) +10 other tests skip
   [253]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc.html
   [254]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff:
    - shard-bmg:          [SKIP][255] ([Intel XE#2312]) -> [SKIP][256] ([Intel XE#5390]) +12 other tests skip
   [255]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html
   [256]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-bmg-1/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-shrfb-plflip-blt:
    - shard-dg2-set2:     [SKIP][257] ([Intel XE#651]) -> [SKIP][258] ([Intel XE#2351] / [Intel XE#4208]) +8 other tests skip
   [257]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-432/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-shrfb-plflip-blt.html
   [258]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-shrfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render:
    - shard-bmg:          [SKIP][259] ([Intel XE#2312]) -> [SKIP][260] ([Intel XE#2313]) +28 other tests skip
   [259]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render.html
   [260]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-pri-indfb-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-plflip-blt:
    - shard-bmg:          [SKIP][261] ([Intel XE#2313]) -> [SKIP][262] ([Intel XE#2312]) +23 other tests skip
   [261]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-bmg-3/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-plflip-blt.html
   [262]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-plflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-blt:
    - shard-dg2-set2:     [SKIP][263] ([Intel XE#653]) -> [SKIP][264] ([Intel XE#4208]) +21 other tests skip
   [263]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-433/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-blt.html
   [264]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_frontbuffer_tracking@psr-1p-primscrn-pri-shrfb-draw-blt.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc:
    - shard-dg2-set2:     [SKIP][265] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][266] ([Intel XE#653]) +5 other tests skip
   [265]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc.html
   [266]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-463/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-msflip-blt:
    - shard-dg2-set2:     [SKIP][267] ([Intel XE#653]) -> [SKIP][268] ([Intel XE#2351] / [Intel XE#4208]) +6 other tests skip
   [267]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-463/igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-msflip-blt.html
   [268]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@psr-slowdraw:
    - shard-dg2-set2:     [SKIP][269] ([Intel XE#4208]) -> [SKIP][270] ([Intel XE#653]) +23 other tests skip
   [269]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_frontbuffer_tracking@psr-slowdraw.html
   [270]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-463/igt@kms_frontbuffer_tracking@psr-slowdraw.html

  * igt@kms_hdr@brightness-with-hdr:
    - shard-bmg:          [SKIP][271] ([Intel XE#3544]) -> [SKIP][272] ([Intel XE#3374] / [Intel XE#3544])
   [271]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-bmg-1/igt@kms_hdr@brightness-with-hdr.html
   [272]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-bmg-7/igt@kms_hdr@brightness-with-hdr.html

  * igt@kms_plane_cursor@primary:
    - shard-dg2-set2:     [SKIP][273] ([Intel XE#4208] / [i915#2575]) -> [FAIL][274] ([Intel XE#616])
   [273]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_plane_cursor@primary.html
   [274]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-432/igt@kms_plane_cursor@primary.html

  * igt@kms_plane_multiple@2x-tiling-y:
    - shard-dg2-set2:     [SKIP][275] ([Intel XE#5021]) -> [SKIP][276] ([Intel XE#4208] / [i915#2575])
   [275]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-463/igt@kms_plane_multiple@2x-tiling-y.html
   [276]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_plane_multiple@2x-tiling-y.html

  * igt@kms_plane_multiple@2x-tiling-yf:
    - shard-bmg:          [SKIP][277] ([Intel XE#5021]) -> [SKIP][278] ([Intel XE#4596])
   [277]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-bmg-7/igt@kms_plane_multiple@2x-tiling-yf.html
   [278]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-bmg-5/igt@kms_plane_multiple@2x-tiling-yf.html
    - shard-dg2-set2:     [SKIP][279] ([Intel XE#4208] / [i915#2575]) -> [SKIP][280] ([Intel XE#5021])
   [279]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_plane_multiple@2x-tiling-yf.html
   [280]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-435/igt@kms_plane_multiple@2x-tiling-yf.html

  * igt@kms_plane_multiple@tiling-y:
    - shard-dg2-set2:     [SKIP][281] ([Intel XE#5020]) -> [SKIP][282] ([Intel XE#4208] / [i915#2575])
   [281]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-432/igt@kms_plane_multiple@tiling-y.html
   [282]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_plane_multiple@tiling-y.html

  * igt@kms_pm_backlight@bad-brightness:
    - shard-dg2-set2:     [SKIP][283] ([Intel XE#870]) -> [SKIP][284] ([Intel XE#4208])
   [283]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-433/igt@kms_pm_backlight@bad-brightness.html
   [284]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_pm_backlight@bad-brightness.html

  * igt@kms_pm_backlight@brightness-with-dpms:
    - shard-dg2-set2:     [SKIP][285] ([Intel XE#4208]) -> [SKIP][286] ([Intel XE#2938])
   [285]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_pm_backlight@brightness-with-dpms.html
   [286]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-435/igt@kms_pm_backlight@brightness-with-dpms.html

  * igt@kms_pm_backlight@fade-with-suspend:
    - shard-dg2-set2:     [SKIP][287] ([Intel XE#4208]) -> [SKIP][288] ([Intel XE#870]) +1 other test skip
   [287]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_pm_backlight@fade-with-suspend.html
   [288]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-432/igt@kms_pm_backlight@fade-with-suspend.html

  * igt@kms_pm_dc@dc6-psr:
    - shard-dg2-set2:     [SKIP][289] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][290] ([Intel XE#1129])
   [289]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_pm_dc@dc6-psr.html
   [290]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-463/igt@kms_pm_dc@dc6-psr.html

  * igt@kms_psr2_sf@fbc-pr-overlay-plane-update-sf-dmg-area:
    - shard-dg2-set2:     [SKIP][291] ([Intel XE#1489]) -> [SKIP][292] ([Intel XE#4208]) +7 other tests skip
   [291]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-432/igt@kms_psr2_sf@fbc-pr-overlay-plane-update-sf-dmg-area.html
   [292]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_psr2_sf@fbc-pr-overlay-plane-update-sf-dmg-area.html

  * igt@kms_psr2_sf@psr2-overlay-primary-update-sf-dmg-area:
    - shard-dg2-set2:     [SKIP][293] ([Intel XE#4208]) -> [SKIP][294] ([Intel XE#1489]) +7 other tests skip
   [293]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_psr2_sf@psr2-overlay-primary-update-sf-dmg-area.html
   [294]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-463/igt@kms_psr2_sf@psr2-overlay-primary-update-sf-dmg-area.html

  * igt@kms_psr2_su@frontbuffer-xrgb8888:
    - shard-dg2-set2:     [SKIP][295] ([Intel XE#1122]) -> [SKIP][296] ([Intel XE#4208])
   [295]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-466/igt@kms_psr2_su@frontbuffer-xrgb8888.html
   [296]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_psr2_su@frontbuffer-xrgb8888.html

  * igt@kms_psr@fbc-psr-sprite-plane-move:
    - shard-dg2-set2:     [SKIP][297] ([Intel XE#2351] / [Intel XE#4208]) -> [SKIP][298] ([Intel XE#2850] / [Intel XE#929]) +4 other tests skip
   [297]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_psr@fbc-psr-sprite-plane-move.html
   [298]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-435/igt@kms_psr@fbc-psr-sprite-plane-move.html

  * igt@kms_psr@fbc-psr2-dpms:
    - shard-dg2-set2:     [SKIP][299] ([Intel XE#2850] / [Intel XE#929]) -> [SKIP][300] ([Intel XE#4208]) +6 other tests skip
   [299]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-463/igt@kms_psr@fbc-psr2-dpms.html
   [300]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_psr@fbc-psr2-dpms.html

  * igt@kms_psr@fbc-psr2-sprite-plane-move:
    - shard-dg2-set2:     [SKIP][301] ([Intel XE#4208]) -> [SKIP][302] ([Intel XE#2850] / [Intel XE#929]) +12 other tests skip
   [301]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_psr@fbc-psr2-sprite-plane-move.html
   [302]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-463/igt@kms_psr@fbc-psr2-sprite-plane-move.html

  * igt@kms_psr@psr-dpms:
    - shard-dg2-set2:     [SKIP][303] ([Intel XE#2850] / [Intel XE#929]) -> [SKIP][304] ([Intel XE#2351] / [Intel XE#4208]) +7 other tests skip
   [303]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-466/igt@kms_psr@psr-dpms.html
   [304]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_psr@psr-dpms.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-270:
    - shard-dg2-set2:     [SKIP][305] ([Intel XE#4208] / [i915#2575]) -> [SKIP][306] ([Intel XE#3414])
   [305]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_rotation_crc@primary-y-tiled-reflect-x-270.html
   [306]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-435/igt@kms_rotation_crc@primary-y-tiled-reflect-x-270.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180:
    - shard-dg2-set2:     [SKIP][307] ([Intel XE#4208] / [i915#2575]) -> [SKIP][308] ([Intel XE#1127])
   [307]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html
   [308]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-435/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-180.html

  * igt@kms_rotation_crc@sprite-rotation-270:
    - shard-dg2-set2:     [SKIP][309] ([Intel XE#3414]) -> [SKIP][310] ([Intel XE#4208] / [i915#2575])
   [309]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-463/igt@kms_rotation_crc@sprite-rotation-270.html
   [310]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_rotation_crc@sprite-rotation-270.html

  * igt@kms_tiled_display@basic-test-pattern:
    - shard-bmg:          [SKIP][311] ([Intel XE#2426]) -> [FAIL][312] ([Intel XE#1729])
   [311]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-bmg-5/igt@kms_tiled_display@basic-test-pattern.html
   [312]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern.html

  * igt@kms_vrr@flip-dpms:
    - shard-dg2-set2:     [SKIP][313] ([Intel XE#455]) -> [SKIP][314] ([Intel XE#4208] / [i915#2575]) +3 other tests skip
   [313]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-433/igt@kms_vrr@flip-dpms.html
   [314]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_vrr@flip-dpms.html

  * igt@kms_vrr@flipline:
    - shard-dg2-set2:     [SKIP][315] ([Intel XE#4208] / [i915#2575]) -> [SKIP][316] ([Intel XE#455]) +7 other tests skip
   [315]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@kms_vrr@flipline.html
   [316]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-463/igt@kms_vrr@flipline.html

  * igt@kms_vrr@lobf:
    - shard-dg2-set2:     [SKIP][317] ([Intel XE#2168]) -> [SKIP][318] ([Intel XE#4208] / [i915#2575])
   [317]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-433/igt@kms_vrr@lobf.html
   [318]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@kms_vrr@lobf.html

  * igt@xe_copy_basic@mem-copy-linear-0x3fff:
    - shard-dg2-set2:     [SKIP][319] ([Intel XE#4208]) -> [SKIP][320] ([Intel XE#1123])
   [319]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@xe_copy_basic@mem-copy-linear-0x3fff.html
   [320]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-432/igt@xe_copy_basic@mem-copy-linear-0x3fff.html

  * igt@xe_copy_basic@mem-set-linear-0xfffe:
    - shard-dg2-set2:     [SKIP][321] ([Intel XE#1126]) -> [SKIP][322] ([Intel XE#4208]) +1 other test skip
   [321]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-433/igt@xe_copy_basic@mem-set-linear-0xfffe.html
   [322]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@xe_copy_basic@mem-set-linear-0xfffe.html

  * igt@xe_create@multigpu-create-massive-size:
    - shard-dg2-set2:     [SKIP][323] ([Intel XE#4208]) -> [SKIP][324] ([Intel XE#944])
   [323]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-466/igt@xe_create@multigpu-create-massive-size.html
   [324]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-466/igt@xe_create@multigpu-create-massive-size.html

  * igt@xe_eu_stall@blocking-re-enable:
    - shard-dg2-set2:     [SKIP][325] ([Intel XE#5419]) -> [SKIP][326] ([Intel XE#4208]) +1 other test skip
   [325]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-466/igt@xe_eu_stall@blocking-re-enable.html
   [326]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@xe_eu_stall@blocking-re-enable.html

  * igt@xe_eu_stall@invalid-gt-id:
    - shard-dg2-set2:     [SKIP][327] ([Intel XE#4208]) -> [SKIP][328] ([Intel XE#5419])
   [327]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@xe_eu_stall@invalid-gt-id.html
   [328]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-463/igt@xe_eu_stall@invalid-gt-id.html

  * igt@xe_eudebug@basic-close:
    - shard-dg2-set2:     [SKIP][329] ([Intel XE#4837]) -> [SKIP][330] ([Intel XE#4208]) +14 other tests skip
   [329]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-463/igt@xe_eudebug@basic-close.html
   [330]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@xe_eudebug@basic-close.html

  * igt@xe_eudebug@basic-vm-bind-ufence-delay-ack:
    - shard-dg2-set2:     [SKIP][331] ([Intel XE#4208]) -> [SKIP][332] ([Intel XE#4837]) +11 other tests skip
   [331]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@xe_eudebug@basic-vm-bind-ufence-delay-ack.html
   [332]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-435/igt@xe_eudebug@basic-vm-bind-ufence-delay-ack.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr:
    - shard-dg2-set2:     [SKIP][333] ([Intel XE#4208]) -> [SKIP][334] ([Intel XE#1392]) +1 other test skip
   [333]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr.html
   [334]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-432/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr.html

  * igt@xe_exec_basic@multigpu-no-exec-null-defer-bind:
    - shard-dg2-set2:     [SKIP][335] ([Intel XE#1392]) -> [SKIP][336] ([Intel XE#4208]) +2 other tests skip
   [335]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-null-defer-bind.html
   [336]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@xe_exec_basic@multigpu-no-exec-null-defer-bind.html

  * igt@xe_exec_fault_mode@once-bindexecqueue-imm:
    - shard-dg2-set2:     [SKIP][337] ([Intel XE#288]) -> [SKIP][338] ([Intel XE#4208]) +24 other tests skip
   [337]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-463/igt@xe_exec_fault_mode@once-bindexecqueue-imm.html
   [338]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@xe_exec_fault_mode@once-bindexecqueue-imm.html

  * igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-rebind-prefetch:
    - shard-dg2-set2:     [SKIP][339] ([Intel XE#4208]) -> [SKIP][340] ([Intel XE#288]) +22 other tests skip
   [339]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-rebind-prefetch.html
   [340]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-463/igt@xe_exec_fault_mode@twice-bindexecqueue-userptr-rebind-prefetch.html

  * igt@xe_exec_mix_modes@exec-simple-batch-store-lr:
    - shard-dg2-set2:     [SKIP][341] ([Intel XE#4208]) -> [SKIP][342] ([Intel XE#2360]) +1 other test skip
   [341]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-466/igt@xe_exec_mix_modes@exec-simple-batch-store-lr.html
   [342]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-466/igt@xe_exec_mix_modes@exec-simple-batch-store-lr.html

  * igt@xe_exec_system_allocator@many-large-malloc-nomemset:
    - shard-dg2-set2:     [SKIP][343] ([Intel XE#4915]) -> [SKIP][344] ([Intel XE#4208]) +243 other tests skip
   [343]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-433/igt@xe_exec_system_allocator@many-large-malloc-nomemset.html
   [344]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@xe_exec_system_allocator@many-large-malloc-nomemset.html

  * igt@xe_exec_system_allocator@threads-many-stride-mmap-remap-eocheck:
    - shard-dg2-set2:     [SKIP][345] ([Intel XE#4208]) -> [SKIP][346] ([Intel XE#4915]) +255 other tests skip
   [345]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@xe_exec_system_allocator@threads-many-stride-mmap-remap-eocheck.html
   [346]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-432/igt@xe_exec_system_allocator@threads-many-stride-mmap-remap-eocheck.html

  * igt@xe_exec_system_allocator@threads-shared-vm-many-large-new-bo-map-nomemset:
    - shard-lnl:          [FAIL][347] ([Intel XE#5018]) -> [FAIL][348] ([Intel XE#4937])
   [347]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-lnl-2/igt@xe_exec_system_allocator@threads-shared-vm-many-large-new-bo-map-nomemset.html
   [348]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-lnl-5/igt@xe_exec_system_allocator@threads-shared-vm-many-large-new-bo-map-nomemset.html

  * igt@xe_mmap@small-bar:
    - shard-dg2-set2:     [SKIP][349] ([Intel XE#512]) -> [SKIP][350] ([Intel XE#4208])
   [349]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-463/igt@xe_mmap@small-bar.html
   [350]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@xe_mmap@small-bar.html

  * igt@xe_oa@invalid-create-userspace-config:
    - shard-dg2-set2:     [SKIP][351] ([Intel XE#4208]) -> [SKIP][352] ([Intel XE#2541] / [Intel XE#3573]) +4 other tests skip
   [351]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@xe_oa@invalid-create-userspace-config.html
   [352]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-432/igt@xe_oa@invalid-create-userspace-config.html

  * igt@xe_oa@mmio-triggered-reports-read:
    - shard-dg2-set2:     [SKIP][353] ([Intel XE#5103]) -> [SKIP][354] ([Intel XE#4208])
   [353]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-433/igt@xe_oa@mmio-triggered-reports-read.html
   [354]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@xe_oa@mmio-triggered-reports-read.html

  * igt@xe_oa@polling-small-buf:
    - shard-dg2-set2:     [SKIP][355] ([Intel XE#2541] / [Intel XE#3573]) -> [SKIP][356] ([Intel XE#4208]) +4 other tests skip
   [355]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-433/igt@xe_oa@polling-small-buf.html
   [356]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@xe_oa@polling-small-buf.html

  * igt@xe_oa@syncs-syncobj-wait:
    - shard-dg2-set2:     [SKIP][357] ([Intel XE#2541] / [Intel XE#3573] / [Intel XE#4501]) -> [SKIP][358] ([Intel XE#4208])
   [357]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-432/igt@xe_oa@syncs-syncobj-wait.html
   [358]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@xe_oa@syncs-syncobj-wait.html

  * igt@xe_oa@syncs-ufence-wait-cfg:
    - shard-dg2-set2:     [SKIP][359] ([Intel XE#4208]) -> [SKIP][360] ([Intel XE#2541] / [Intel XE#3573] / [Intel XE#4501]) +1 other test skip
   [359]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@xe_oa@syncs-ufence-wait-cfg.html
   [360]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-432/igt@xe_oa@syncs-ufence-wait-cfg.html

  * igt@xe_pat@display-vs-wb-transient:
    - shard-dg2-set2:     [SKIP][361] ([Intel XE#1337]) -> [SKIP][362] ([Intel XE#4208])
   [361]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-463/igt@xe_pat@display-vs-wb-transient.html
   [362]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@xe_pat@display-vs-wb-transient.html

  * igt@xe_pat@pat-index-xe2:
    - shard-dg2-set2:     [SKIP][363] ([Intel XE#4208]) -> [SKIP][364] ([Intel XE#977])
   [363]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-466/igt@xe_pat@pat-index-xe2.html
   [364]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-466/igt@xe_pat@pat-index-xe2.html

  * igt@xe_pat@pat-index-xehpc:
    - shard-dg2-set2:     [SKIP][365] ([Intel XE#4208]) -> [SKIP][366] ([Intel XE#2838] / [Intel XE#979])
   [365]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@xe_pat@pat-index-xehpc.html
   [366]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-463/igt@xe_pat@pat-index-xehpc.html

  * igt@xe_peer2peer@write:
    - shard-dg2-set2:     [SKIP][367] ([Intel XE#1061] / [Intel XE#4208]) -> [FAIL][368] ([Intel XE#1173])
   [367]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@xe_peer2peer@write.html
   [368]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-463/igt@xe_peer2peer@write.html

  * igt@xe_pm@d3cold-mocs:
    - shard-dg2-set2:     [SKIP][369] ([Intel XE#4208]) -> [SKIP][370] ([Intel XE#2284])
   [369]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@xe_pm@d3cold-mocs.html
   [370]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-435/igt@xe_pm@d3cold-mocs.html

  * igt@xe_pm@s3-d3cold-basic-exec:
    - shard-dg2-set2:     [SKIP][371] ([Intel XE#2284] / [Intel XE#366]) -> [SKIP][372] ([Intel XE#4208]) +2 other tests skip
   [371]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-432/igt@xe_pm@s3-d3cold-basic-exec.html
   [372]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@xe_pm@s3-d3cold-basic-exec.html

  * igt@xe_pmu@fn-engine-activity-sched-if-idle:
    - shard-dg2-set2:     [SKIP][373] ([Intel XE#4650]) -> [SKIP][374] ([Intel XE#4208])
   [373]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-463/igt@xe_pmu@fn-engine-activity-sched-if-idle.html
   [374]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@xe_pmu@fn-engine-activity-sched-if-idle.html

  * igt@xe_pxp@pxp-termination-key-update-post-rpm:
    - shard-dg2-set2:     [SKIP][375] ([Intel XE#4208]) -> [SKIP][376] ([Intel XE#4733]) +4 other tests skip
   [375]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@xe_pxp@pxp-termination-key-update-post-rpm.html
   [376]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-432/igt@xe_pxp@pxp-termination-key-update-post-rpm.html

  * igt@xe_pxp@pxp-termination-key-update-post-termination-irq:
    - shard-dg2-set2:     [SKIP][377] ([Intel XE#4733]) -> [SKIP][378] ([Intel XE#4208]) +2 other tests skip
   [377]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-463/igt@xe_pxp@pxp-termination-key-update-post-termination-irq.html
   [378]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@xe_pxp@pxp-termination-key-update-post-termination-irq.html

  * igt@xe_query@multigpu-query-engines:
    - shard-dg2-set2:     [SKIP][379] ([Intel XE#944]) -> [SKIP][380] ([Intel XE#4208]) +2 other tests skip
   [379]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-432/igt@xe_query@multigpu-query-engines.html
   [380]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@xe_query@multigpu-query-engines.html

  * igt@xe_render_copy@render-stress-2-copies:
    - shard-dg2-set2:     [SKIP][381] ([Intel XE#4814]) -> [SKIP][382] ([Intel XE#4208])
   [381]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-433/igt@xe_render_copy@render-stress-2-copies.html
   [382]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@xe_render_copy@render-stress-2-copies.html

  * igt@xe_spin_batch@spin-mem-copy:
    - shard-dg2-set2:     [SKIP][383] ([Intel XE#4208]) -> [SKIP][384] ([Intel XE#4821])
   [383]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@xe_spin_batch@spin-mem-copy.html
   [384]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-463/igt@xe_spin_batch@spin-mem-copy.html

  * igt@xe_sriov_auto_provisioning@resources-released-on-vfs-disabling:
    - shard-dg2-set2:     [SKIP][385] ([Intel XE#4130]) -> [SKIP][386] ([Intel XE#4208])
   [385]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-433/igt@xe_sriov_auto_provisioning@resources-released-on-vfs-disabling.html
   [386]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@xe_sriov_auto_provisioning@resources-released-on-vfs-disabling.html

  * igt@xe_sriov_flr@flr-twice:
    - shard-dg2-set2:     [SKIP][387] ([Intel XE#4273]) -> [SKIP][388] ([Intel XE#4208])
   [387]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-432/igt@xe_sriov_flr@flr-twice.html
   [388]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@xe_sriov_flr@flr-twice.html

  * igt@xe_sriov_scheduling@equal-throughput:
    - shard-dg2-set2:     [SKIP][389] ([Intel XE#4351]) -> [SKIP][390] ([Intel XE#4208])
   [389]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-466/igt@xe_sriov_scheduling@equal-throughput.html
   [390]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-436/igt@xe_sriov_scheduling@equal-throughput.html

  * igt@xe_sriov_scheduling@nonpreempt-engine-resets:
    - shard-dg2-set2:     [SKIP][391] ([Intel XE#4208]) -> [SKIP][392] ([Intel XE#4351])
   [391]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f/shard-dg2-436/igt@xe_sriov_scheduling@nonpreempt-engine-resets.html
   [392]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/shard-dg2-432/igt@xe_sriov_scheduling@nonpreempt-engine-resets.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#1061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1061
  [Intel XE#1122]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1122
  [Intel XE#1123]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1123
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1126]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1126
  [Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127
  [Intel XE#1129]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1129
  [Intel XE#1135]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1135
  [Intel XE#1137]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1137
  [Intel XE#1173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1173
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1337]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1337
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
  [Intel XE#1424]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1424
  [Intel XE#1428]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1428
  [Intel XE#1435]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1435
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
  [Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
  [Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
  [Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
  [Intel XE#2134]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2134
  [Intel XE#2168]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2168
  [Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
  [Intel XE#2284]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2284
  [Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
  [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
  [Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
  [Intel XE#2351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2351
  [Intel XE#2360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2360
  [Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
  [Intel XE#2541]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2541
  [Intel XE#2571]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2571
  [Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
  [Intel XE#261]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/261
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2669]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2669
  [Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
  [Intel XE#2838]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2838
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
  [Intel XE#2883]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2883
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
  [Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
  [Intel XE#2938]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2938
  [Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#3012]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3012
  [Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
  [Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
  [Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
  [Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310
  [Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
  [Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
  [Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323
  [Intel XE#3374]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3374
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#3442]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3442
  [Intel XE#3544]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3544
  [Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
  [Intel XE#366]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/366
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#3862]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3862
  [Intel XE#3908]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3908
  [Intel XE#3970]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3970
  [Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130
  [Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
  [Intel XE#4208]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4208
  [Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
  [Intel XE#4273]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4273
  [Intel XE#4294]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4294
  [Intel XE#4302]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4302
  [Intel XE#4331]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4331
  [Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
  [Intel XE#4351]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4351
  [Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
  [Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
  [Intel XE#4494]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4494
  [Intel XE#4501]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4501
  [Intel XE#4518]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4518
  [Intel XE#4522]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4522
  [Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
  [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
  [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
  [Intel XE#4618]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4618
  [Intel XE#4633]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4633
  [Intel XE#4650]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4650
  [Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
  [Intel XE#4814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4814
  [Intel XE#4819]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4819
  [Intel XE#4821]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4821
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#488]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/488
  [Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
  [Intel XE#4917]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4917
  [Intel XE#4937]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4937
  [Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
  [Intel XE#5018]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5018
  [Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
  [Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
  [Intel XE#5103]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5103
  [Intel XE#512]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/512
  [Intel XE#5300]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5300
  [Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390
  [Intel XE#5419]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5419
  [Intel XE#607]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/607
  [Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
  [Intel XE#616]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/616
  [Intel XE#619]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/619
  [Intel XE#623]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/623
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
  [Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
  [Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
  [Intel XE#703]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/703
  [Intel XE#718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/718
  [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
  [Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
  [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
  [Intel XE#977]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/977
  [Intel XE#979]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/979
  [i915#2575]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/2575
  [i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804


Build changes
-------------

  * Linux: xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f -> xe-pw-151290v1

  IGT_8445: 8445
  xe-3366-b9993cff911b1dd0abde4929435cc1eeb79e1c8f: b9993cff911b1dd0abde4929435cc1eeb79e1c8f
  xe-pw-151290v1: 151290v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-151290v1/index.html

[-- Attachment #2: Type: text/html, Size: 129384 bytes --]

Re: [PATCH v7 1/9] mei: bus: add mei_cldev_mtu interface

[Greg KH]

On Tue, Jul 08, 2025 at 12:42:29AM +0530, Badal Nilawar wrote:
> From: Alexander Usyskin <alexander.usyskin@intel.com>
> 
> Allow to bus client to obtain client mtu.

I'm sorry, but this does not make sense.  Please work on a better
changelog text here after reading the kernel documentation that gives
you a lot of information on how to do this well.

thanks,

greg k-h

Re: [PATCH v7 2/9] mei: late_bind: add late binding component driver

[Greg KH]

On Tue, Jul 08, 2025 at 12:42:30AM +0530, Badal Nilawar wrote:
> From: Alexander Usyskin <alexander.usyskin@intel.com>
> 
> Add late binding component driver.

That says what this does, but not why, or even what "late binding"
means.

> It allows pushing the late binding configuration from, for example,
> the Xe graphics driver to the Intel discrete graphics card's CSE device.
> 
> Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
> Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
> Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
> ---
>  drivers/misc/mei/Kconfig                    |  11 +
>  drivers/misc/mei/Makefile                   |   1 +
>  drivers/misc/mei/mei_late_bind.c            | 271 ++++++++++++++++++++
>  include/drm/intel/i915_component.h          |   1 +
>  include/drm/intel/late_bind_mei_interface.h |  62 +++++
>  5 files changed, 346 insertions(+)
>  create mode 100644 drivers/misc/mei/mei_late_bind.c
>  create mode 100644 include/drm/intel/late_bind_mei_interface.h
> 
> diff --git a/drivers/misc/mei/Kconfig b/drivers/misc/mei/Kconfig
> index 7575fee96cc6..36569604038c 100644
> --- a/drivers/misc/mei/Kconfig
> +++ b/drivers/misc/mei/Kconfig
> @@ -81,6 +81,17 @@ config INTEL_MEI_VSC
>  	  This driver can also be built as a module. If so, the module
>  	  will be called mei-vsc.
>  
> +config INTEL_MEI_LATE_BIND
> +	tristate "Intel late binding support on ME Interface"
> +	depends on INTEL_MEI_ME
> +	depends on DRM_XE
> +	help
> +	  MEI Support for Late Binding for Intel graphics card.
> +
> +	  Enables the ME FW interfaces for Late Binding feature,
> +	  allowing loading of firmware for the devices like Fan
> +	  Controller by Intel Xe driver.

Where is "Late Binding feature" documented so we know what that is?  Why
wouldn't it just always be enabled and why must it be a config option?

> --- /dev/null
> +++ b/include/drm/intel/late_bind_mei_interface.h
> @@ -0,0 +1,62 @@
> +/* SPDX-License-Identifier: MIT */
> +/*
> + * Copyright (c) 2025 Intel Corporation
> + */
> +
> +#ifndef _LATE_BIND_MEI_INTERFACE_H_
> +#define _LATE_BIND_MEI_INTERFACE_H_
> +
> +#include <linux/types.h>
> +
> +struct device;
> +struct module;

Not needed.

> +
> +/**
> + * Late Binding flags
> + * Persistent across warm reset

persistent where?

> + */
> +#define CSC_LATE_BINDING_FLAGS_IS_PERSISTENT	BIT(0)
> +
> +/**
> + * xe_late_bind_fw_type - enum to determine late binding fw type
> + */
> +enum late_bind_type {
> +	CSC_LATE_BINDING_TYPE_FAN_CONTROL = 1,
> +};

shouldn't you have mei_ as a prefix for the enum type and the values?

> +
> +/**
> + * Late Binding payload status
> + */
> +enum csc_late_binding_status {

Same here, what is "CSC"?

> +	CSC_LATE_BINDING_STATUS_SUCCESS           = 0,
> +	CSC_LATE_BINDING_STATUS_4ID_MISMATCH      = 1,
> +	CSC_LATE_BINDING_STATUS_ARB_FAILURE       = 2,
> +	CSC_LATE_BINDING_STATUS_GENERAL_ERROR     = 3,
> +	CSC_LATE_BINDING_STATUS_INVALID_PARAMS    = 4,
> +	CSC_LATE_BINDING_STATUS_INVALID_SIGNATURE = 5,
> +	CSC_LATE_BINDING_STATUS_INVALID_PAYLOAD   = 6,
> +	CSC_LATE_BINDING_STATUS_TIMEOUT           = 7,
> +};

This enum type is never used.

> +
> +/**
> + * struct late_bind_component_ops - ops for Late Binding services.
> + * @owner: Module providing the ops
> + * @push_config: Sends a config to FW.
> + */
> +struct late_bind_component_ops {
> +	/**
> +	 * @push_config: Sends a config to FW.

What is "FW"?

> +	 * @dev: device struct corresponding to the mei device

Why not pass in the mei device structure, not a 'struct device' so that
we know this is correct?

> +	 * @type: payload type
> +	 * @flags: payload flags
> +	 * @payload: payload buffer

Where are these defined?  Why are they not enums?

> +	 * @payload_size: payload buffer size

Size in what?

> +	 *
> +	 * Return: 0 success, negative errno value on transport failure,
> +	 *         positive status returned by FW
> +	 */
> +	int (*push_config)(struct device *dev, u32 type, u32 flags,
> +			   const void *payload, size_t payload_size);
> +};
> +
> +#endif /* _LATE_BIND_MEI_INTERFACE_H_ */
> -- 
> 2.34.1
> 

Re: [PATCH v7 0/9] Introducing firmware late binding

[Greg KH]

On Tue, Jul 08, 2025 at 12:42:28AM +0530, Badal Nilawar wrote:
> v7:
>  xe_kmd:
>  - resolved kernel doc warnings
>  mei:
>  - Address v6 review comments (greg kh)

I don't know what comments you addressed, please be specific, as in the
past other ones have not been addressed (i.e. the .owner stuff) and I
had to find that review again...

thanks,

greg k-h

RE: [PATCH v7 2/9] mei: late_bind: add late binding component driver

[Gupta, Anshuman]

> -----Original Message-----
> From: Greg KH <gregkh@linuxfoundation.org>
> Sent: Tuesday, July 8, 2025 12:18 PM
> To: Nilawar, Badal <badal.nilawar@intel.com>
> Cc: intel-xe@lists.freedesktop.org; dri-devel@lists.freedesktop.org; linux-
> kernel@vger.kernel.org; Gupta, Anshuman <anshuman.gupta@intel.com>;
> Vivi, Rodrigo <rodrigo.vivi@intel.com>; Usyskin, Alexander
> <alexander.usyskin@intel.com>; Ceraolo Spurio, Daniele
> <daniele.ceraolospurio@intel.com>
> Subject: Re: [PATCH v7 2/9] mei: late_bind: add late binding component driver
> 
> On Tue, Jul 08, 2025 at 12:42:30AM +0530, Badal Nilawar wrote:
> > From: Alexander Usyskin <alexander.usyskin@intel.com>
> >
> > Add late binding component driver.
> 
> That says what this does, but not why, or even what "late binding"
> means.
> 
> > It allows pushing the late binding configuration from, for example,
> > the Xe graphics driver to the Intel discrete graphics card's CSE device.
> >
> > Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
> > Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
> > Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
> > ---
> >  drivers/misc/mei/Kconfig                    |  11 +
> >  drivers/misc/mei/Makefile                   |   1 +
> >  drivers/misc/mei/mei_late_bind.c            | 271 ++++++++++++++++++++
> >  include/drm/intel/i915_component.h          |   1 +
> >  include/drm/intel/late_bind_mei_interface.h |  62 +++++
> >  5 files changed, 346 insertions(+)
> >  create mode 100644 drivers/misc/mei/mei_late_bind.c  create mode
> > 100644 include/drm/intel/late_bind_mei_interface.h
> >
> > diff --git a/drivers/misc/mei/Kconfig b/drivers/misc/mei/Kconfig index
> > 7575fee96cc6..36569604038c 100644
> > --- a/drivers/misc/mei/Kconfig
> > +++ b/drivers/misc/mei/Kconfig
> > @@ -81,6 +81,17 @@ config INTEL_MEI_VSC
> >  	  This driver can also be built as a module. If so, the module
> >  	  will be called mei-vsc.
> >
> > +config INTEL_MEI_LATE_BIND
> > +	tristate "Intel late binding support on ME Interface"
> > +	depends on INTEL_MEI_ME
> > +	depends on DRM_XE
> > +	help
> > +	  MEI Support for Late Binding for Intel graphics card.
> > +
> > +	  Enables the ME FW interfaces for Late Binding feature,
> > +	  allowing loading of firmware for the devices like Fan
> > +	  Controller by Intel Xe driver.
> 
> Where is "Late Binding feature" documented so we know what that is?  Why
> wouldn't it just always be enabled and why must it be a config option?
> 
> > --- /dev/null
> > +++ b/include/drm/intel/late_bind_mei_interface.h
> > @@ -0,0 +1,62 @@
> > +/* SPDX-License-Identifier: MIT */
> > +/*
> > + * Copyright (c) 2025 Intel Corporation  */
> > +
> > +#ifndef _LATE_BIND_MEI_INTERFACE_H_
> > +#define _LATE_BIND_MEI_INTERFACE_H_
> > +
> > +#include <linux/types.h>
> > +
> > +struct device;
> > +struct module;
> 
> Not needed.
> 
> > +
> > +/**
> > + * Late Binding flags
> > + * Persistent across warm reset
> 
> persistent where?
> 
> > + */
> > +#define CSC_LATE_BINDING_FLAGS_IS_PERSISTENT	BIT(0)
> > +
> > +/**
> > + * xe_late_bind_fw_type - enum to determine late binding fw type  */
> > +enum late_bind_type {
> > +	CSC_LATE_BINDING_TYPE_FAN_CONTROL = 1, };
> 
> shouldn't you have mei_ as a prefix for the enum type and the values?
> 
> > +
> > +/**
> > + * Late Binding payload status
> > + */
> > +enum csc_late_binding_status {
> 
> Same here, what is "CSC"?
> 
> > +	CSC_LATE_BINDING_STATUS_SUCCESS           = 0,
> > +	CSC_LATE_BINDING_STATUS_4ID_MISMATCH      = 1,
> > +	CSC_LATE_BINDING_STATUS_ARB_FAILURE       = 2,
> > +	CSC_LATE_BINDING_STATUS_GENERAL_ERROR     = 3,
> > +	CSC_LATE_BINDING_STATUS_INVALID_PARAMS    = 4,
> > +	CSC_LATE_BINDING_STATUS_INVALID_SIGNATURE = 5,
> > +	CSC_LATE_BINDING_STATUS_INVALID_PAYLOAD   = 6,
> > +	CSC_LATE_BINDING_STATUS_TIMEOUT           = 7,
> > +};
> 
> This enum type is never used.
These enum used by CSC firmware to 
These Enum used in 5th patch of this series by xe_late_bind_parse_status() to print the error status 
returned by CSC firmware in push_config().
Thanks,
Anshuman.
> 
> > +
> > +/**
> > + * struct late_bind_component_ops - ops for Late Binding services.
> > + * @owner: Module providing the ops
> > + * @push_config: Sends a config to FW.
> > + */
> > +struct late_bind_component_ops {
> > +	/**
> > +	 * @push_config: Sends a config to FW.
> 
> What is "FW"?
> 
> > +	 * @dev: device struct corresponding to the mei device
> 
> Why not pass in the mei device structure, not a 'struct device' so that we know
> this is correct?
> 
> > +	 * @type: payload type
> > +	 * @flags: payload flags
> > +	 * @payload: payload buffer
> 
> Where are these defined?  Why are they not enums?
> 
> > +	 * @payload_size: payload buffer size
> 
> Size in what?
> 
> > +	 *
> > +	 * Return: 0 success, negative errno value on transport failure,
> > +	 *         positive status returned by FW
> > +	 */
> > +	int (*push_config)(struct device *dev, u32 type, u32 flags,
> > +			   const void *payload, size_t payload_size); };
> > +
> > +#endif /* _LATE_BIND_MEI_INTERFACE_H_ */
> > --
> > 2.34.1
> >

RE: [PATCH v7 0/9] Introducing firmware late binding

[Gupta, Anshuman]

> -----Original Message-----
> From: Greg KH <gregkh@linuxfoundation.org>
> Sent: Tuesday, July 8, 2025 12:19 PM
> To: Nilawar, Badal <badal.nilawar@intel.com>
> Cc: intel-xe@lists.freedesktop.org; dri-devel@lists.freedesktop.org; linux-
> kernel@vger.kernel.org; Gupta, Anshuman <anshuman.gupta@intel.com>;
> Vivi, Rodrigo <rodrigo.vivi@intel.com>; Usyskin, Alexander
> <alexander.usyskin@intel.com>; Ceraolo Spurio, Daniele
> <daniele.ceraolospurio@intel.com>
> Subject: Re: [PATCH v7 0/9] Introducing firmware late binding
> 
> On Tue, Jul 08, 2025 at 12:42:28AM +0530, Badal Nilawar wrote:
> > v7:
> >  xe_kmd:
> >  - resolved kernel doc warnings
> >  mei:
> >  - Address v6 review comments (greg kh)
> 
> I don't know what comments you addressed, please be specific, as in the past
> other ones have not been addressed (i.e. the .owner stuff) and I had to find
> that review again...
V7 series patch changelog has the details of addressed review comment.
https://patchwork.freedesktop.org/patch/662505/?series=151202&rev=3
---
v2:
 - Use generic naming (Jani)
 - Drop xe_late_bind_component struct to move to xe code (Daniele/Sasha)
v3:
 - Updated kconfig description
 - Move CSC late binding specific flags/defines to late_bind_mei_interface.h (Daniele)
 - Add match for PCI_CLASS_DISPLAY_OTHER to support headless cards (Anshuman)
v4:
 - Add fixes in push_config (Sasha)
 - Use INTEL_ prefix for component, refine doc,
   add status enum to headerlate_bind_mei_interface.h (Anshuman)
v5:
 - Addressed review comments
v7(greh kh):
 - dropped sub directory
 - dropped .owner from late_bind_component_ops
 - In csc_heci_late_bind_req/rsp headers
   - used __le32
   - updated doc for reserved fields
 - used conversion macros le32_to_cpu, cpu_to_le32
 - fixed duplicate print in dev_dbg
---

It seems Latest series[*] after dropping patch 10 does not have details of addressed review comment.
* https://patchwork.freedesktop.org/series/151290/ 

Thanks,
Anshuman
> 
> thanks,
> 
> greg k-h

RE: [PATCH v7 2/9] mei: late_bind: add late binding component driver

[Usyskin, Alexander]

> Subject: Re: [PATCH v7 2/9] mei: late_bind: add late binding component driver
> 
> On Tue, Jul 08, 2025 at 12:42:30AM +0530, Badal Nilawar wrote:
> > From: Alexander Usyskin <alexander.usyskin@intel.com>
> >
> > Add late binding component driver.
> 
> That says what this does, but not why, or even what "late binding"
> means.
> 
Will rephrase and add explanations.

> > It allows pushing the late binding configuration from, for example,
> > the Xe graphics driver to the Intel discrete graphics card's CSE device.
> >
> > Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
> > Signed-off-by: Badal Nilawar <badal.nilawar@intel.com>
> > Reviewed-by: Anshuman Gupta <anshuman.gupta@intel.com>
> > ---
> >  drivers/misc/mei/Kconfig                    |  11 +
> >  drivers/misc/mei/Makefile                   |   1 +
> >  drivers/misc/mei/mei_late_bind.c            | 271 ++++++++++++++++++++
> >  include/drm/intel/i915_component.h          |   1 +
> >  include/drm/intel/late_bind_mei_interface.h |  62 +++++
> >  5 files changed, 346 insertions(+)
> >  create mode 100644 drivers/misc/mei/mei_late_bind.c
> >  create mode 100644 include/drm/intel/late_bind_mei_interface.h
> >
> > diff --git a/drivers/misc/mei/Kconfig b/drivers/misc/mei/Kconfig
> > index 7575fee96cc6..36569604038c 100644
> > --- a/drivers/misc/mei/Kconfig
> > +++ b/drivers/misc/mei/Kconfig
> > @@ -81,6 +81,17 @@ config INTEL_MEI_VSC
> >  	  This driver can also be built as a module. If so, the module
> >  	  will be called mei-vsc.
> >
> > +config INTEL_MEI_LATE_BIND
> > +	tristate "Intel late binding support on ME Interface"
> > +	depends on INTEL_MEI_ME
> > +	depends on DRM_XE
> > +	help
> > +	  MEI Support for Late Binding for Intel graphics card.
> > +
> > +	  Enables the ME FW interfaces for Late Binding feature,
> > +	  allowing loading of firmware for the devices like Fan
> > +	  Controller by Intel Xe driver.
> 
> Where is "Late Binding feature" documented so we know what that is?  Why
Will push part of cover letter here for better explanations

> wouldn't it just always be enabled and why must it be a config option?
This will add the module with a driver on MSI bus to the system.
I suppose some people want to have minimal config.

> 
> > --- /dev/null
> > +++ b/include/drm/intel/late_bind_mei_interface.h
> > @@ -0,0 +1,62 @@
> > +/* SPDX-License-Identifier: MIT */
> > +/*
> > + * Copyright (c) 2025 Intel Corporation
> > + */
> > +
> > +#ifndef _LATE_BIND_MEI_INTERFACE_H_
> > +#define _LATE_BIND_MEI_INTERFACE_H_
> > +
> > +#include <linux/types.h>
> > +
> > +struct device;
> > +struct module;
> 
> Not needed.
Will drop, thx

> 
> > +
> > +/**
> > + * Late Binding flags
> > + * Persistent across warm reset
> 
> persistent where?
Persistent in firmware storage, will rephrase

> 
> > + */
> > +#define CSC_LATE_BINDING_FLAGS_IS_PERSISTENT	BIT(0)
> > +
> > +/**
> > + * xe_late_bind_fw_type - enum to determine late binding fw type
> > + */
> > +enum late_bind_type {
> > +	CSC_LATE_BINDING_TYPE_FAN_CONTROL = 1,
> > +};
> 
> shouldn't you have mei_ as a prefix for the enum type and the values?
> 
This is a bridge between mei and graphics drivers, so mei is not a right prefix.
I'll look for better prefix here.

> > +
> > +/**
> > + * Late Binding payload status
> > + */
> > +enum csc_late_binding_status {
> 
> Same here, what is "CSC"?
> 
> > +	CSC_LATE_BINDING_STATUS_SUCCESS           = 0,
> > +	CSC_LATE_BINDING_STATUS_4ID_MISMATCH      = 1,
> > +	CSC_LATE_BINDING_STATUS_ARB_FAILURE       = 2,
> > +	CSC_LATE_BINDING_STATUS_GENERAL_ERROR     = 3,
> > +	CSC_LATE_BINDING_STATUS_INVALID_PARAMS    = 4,
> > +	CSC_LATE_BINDING_STATUS_INVALID_SIGNATURE = 5,
> > +	CSC_LATE_BINDING_STATUS_INVALID_PAYLOAD   = 6,
> > +	CSC_LATE_BINDING_STATUS_TIMEOUT           = 7,
> > +};
> 
> This enum type is never used.
> 
> > +
> > +/**
> > + * struct late_bind_component_ops - ops for Late Binding services.
> > + * @owner: Module providing the ops
> > + * @push_config: Sends a config to FW.
> > + */
> > +struct late_bind_component_ops {
> > +	/**
> > +	 * @push_config: Sends a config to FW.
> 
> What is "FW"?
> 
> > +	 * @dev: device struct corresponding to the mei device
> 
> Why not pass in the mei device structure, not a 'struct device' so that
> we know this is correct?
Component consumer only knows this device.
It has no knowledge about mei internal device.

> 
> > +	 * @type: payload type
> > +	 * @flags: payload flags
> > +	 * @payload: payload buffer
> 
> Where are these defined?  Why are they not enums?
It is bitmap, will add this information.
The lone available bit is defined at the beginning of this file
> 
> > +	 * @payload_size: payload buffer size
> 
> Size in what?
In bytes, will specify

> 
> > +	 *
> > +	 * Return: 0 success, negative errno value on transport failure,
> > +	 *         positive status returned by FW
> > +	 */
> > +	int (*push_config)(struct device *dev, u32 type, u32 flags,
> > +			   const void *payload, size_t payload_size);
> > +};
> > +
> > +#endif /* _LATE_BIND_MEI_INTERFACE_H_ */
> > --
> > 2.34.1
> >