[RFC PATCH 0/6] Multi-pass MMU interval notifiers

[RFC PATCH 0/6] Multi-pass MMU interval notifiers

[Thomas Hellström]

GPU use-cases for mmu_interval_notifiers with hmm often involve
starting a gpu operation and then waiting for it to complete.
These operations are typically context preemption or TLB flushing.
    
With single-pass notifiers per GPU this doesn't scale in
multi-gpu scenarios. In those scenarios we'd want to first start
preemption- or TLB flushing on all GPUs and as a second pass wait
for them to complete on all GPUs.
    
One can do this on per-driver basis multiplexing per-driver
notifiers but that would mean sharing the notifier "user" lock
across all GPUs and that doesn't scale well either, so adding support
for multi-pass in the core appears like the right choice.

So this series does that, with pach 1 implementing the core support
and also describes the choices made.
The rest of the patches implements a POC with drm_gpusvm, but this
will also come in handy for things like userptr where waiting for
bind completion, starting of preemption and waiting for
preemption completion can pe pipelined across GPUs.

Any feedback or suggestions for alternative approches appreciated.

Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Jason Gunthorpe <jgg@ziepe.ca>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Simona Vetter <simona.vetter@ffwll.ch>
Cc: Dave Airlie <airlied@gmail.com>
Cc: <dri-devel@lists.freedesktop.org>
Cc: <linux-mm@kvack.org>
Cc: <linux-kernel@vger.kernel.org>

Matthew Brost (5):
  drm/gpusvm: Update GPU SVM / Xe to twopass MMU notifier
  drm/gpusvm: Add drm_gpusvm_in_notifier_* helpers
  drm/xe: Skip waiting on unarmed fences in
    xe_gt_tlb_invalidation_fence_wait
  drm/xe: Add fences argument to xe_vm_range_tilemask_tlb_invalidation
  drm/xe: Implement two pass MMU notifiers for SVM

Thomas Hellström (1):
  mm/mmu_notifier: Allow multiple struct mmu_interval_notifier passes

 drivers/gpu/drm/drm_gpusvm.c                | 18 +++--
 drivers/gpu/drm/xe/xe_gt_tlb_invalidation.h |  3 +-
 drivers/gpu/drm/xe/xe_svm.c                 | 84 +++++++++++++++++----
 drivers/gpu/drm/xe/xe_vm.c                  | 26 ++++---
 drivers/gpu/drm/xe/xe_vm.h                  |  6 +-
 include/drm/drm_gpusvm.h                    | 33 ++++++--
 include/linux/mmu_notifier.h                | 30 ++++++++
 mm/mmu_notifier.c                           | 67 +++++++++++++---
 8 files changed, 217 insertions(+), 50 deletions(-)

-- 
2.50.1

[RFC PATCH 1/6] mm/mmu_notifier: Allow multiple struct mmu_interval_notifier passes

[Thomas Hellström]

GPU use-cases for mmu_interval_notifiers with hmm often involve
starting a gpu operation and then waiting for it to complete.
These operations are typically context preemption or TLB flushing.

With single-pass notifiers per GPU this doesn't scale in
multi-gpu scenarios. In those scenarios we'd want to first start
preemption- or TLB flushing on all GPUs and as a second pass wait
for them to complete on all gpus.

One can do this on per-driver basis multiplexing per-driver
notifiers but that would mean sharing the notifier "user" lock
across all GPUs and that doesn't scale well either, so adding support
for multi-pass in the core appears like the right choice.

Implement multi-pass capability in the mmu_interval_notifier. Use a
linked list for the additional passes to minimize the impact for
use-cases that don't need the multi-pass functionality.

Cc: Jason Gunthorpe <jgg@ziepe.ca>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Simona Vetter <simona.vetter@ffwll.ch>
Cc: Dave Airlie <airlied@gmail.com>
Cc: <dri-devel@lists.freedesktop.org>
Cc: <linux-mm@kvack.org>
Cc: <linux-kernel@vger.kernel.org>

Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
---
 include/linux/mmu_notifier.h | 30 ++++++++++++++++
 mm/mmu_notifier.c            | 67 +++++++++++++++++++++++++++++++-----
 2 files changed, 88 insertions(+), 9 deletions(-)

diff --git a/include/linux/mmu_notifier.h b/include/linux/mmu_notifier.h
index d1094c2d5fb6..1107a8eafd8a 100644
--- a/include/linux/mmu_notifier.h
+++ b/include/linux/mmu_notifier.h
@@ -233,6 +233,32 @@ struct mmu_notifier {
 	unsigned int users;
 };
 
+/**
+ * struct mmu_interval_notifier_pass - mmu_interval_notifier multi-pass abstraction
+ * @link: List link for the notifiers pending pass list
+ *
+ * Allocate, typically using GFP_NOWAIT in the interval notifier's first pass.
+ * If allocation fails (which is not unlikely under memory pressure), fall back
+ * to single-pass operation.
+ */
+struct mmu_interval_notifier_pass {
+	struct list_head link;
+	/**
+	 * @pass: Driver callback for additionall pass.
+	 * @additional_pass: Pointer to the mmu_interval_notifier_pass structure.
+	 * @range: The mmu_notifier_range.
+	 * @cur_seq: The current sequence set by the first pass.
+	 *
+	 * Return: Either a pointer to a valid mmu_interval_notifier_pass for
+	 * another pass to be called, or %NULL if processing is complete for this
+	 * notifier. There is no error reporting mechanism for additional passes.
+	 */
+	struct mmu_interval_notifier_pass *
+	(*pass) (struct mmu_interval_notifier_pass *additional_pass,
+		 const struct mmu_notifier_range *range,
+		 unsigned long cur_seq);
+};
+
 /**
  * struct mmu_interval_notifier_ops
  * @invalidate: Upon return the caller must stop using any SPTEs within this
@@ -243,6 +269,10 @@ struct mmu_interval_notifier_ops {
 	bool (*invalidate)(struct mmu_interval_notifier *interval_sub,
 			   const struct mmu_notifier_range *range,
 			   unsigned long cur_seq);
+	bool (*invalidate_multipass)(struct mmu_interval_notifier *interval_sub,
+				     const struct mmu_notifier_range *range,
+				     unsigned long cur_seq,
+				     struct mmu_interval_notifier_pass **pass);
 };
 
 struct mmu_interval_notifier {
diff --git a/mm/mmu_notifier.c b/mm/mmu_notifier.c
index 8e0125dc0522..dd6af87db103 100644
--- a/mm/mmu_notifier.c
+++ b/mm/mmu_notifier.c
@@ -260,6 +260,22 @@ mmu_interval_read_begin(struct mmu_interval_notifier *interval_sub)
 }
 EXPORT_SYMBOL_GPL(mmu_interval_read_begin);
 
+static void mn_itree_additional_passes(struct list_head *additional_passes,
+				       const struct mmu_notifier_range *range,
+				       unsigned long cur_seq)
+{
+	struct mmu_interval_notifier_pass *p, *next;
+
+	while (!list_empty(additional_passes)) {
+		list_for_each_entry_safe(p, next, additional_passes, link) {
+			list_del_init(&p->link);
+			p = p->pass(p, range, cur_seq);
+			if (p)
+				list_add_tail(&p->link, additional_passes);
+		}
+	}
+}
+
 static void mn_itree_release(struct mmu_notifier_subscriptions *subscriptions,
 			     struct mm_struct *mm)
 {
@@ -272,17 +288,32 @@ static void mn_itree_release(struct mmu_notifier_subscriptions *subscriptions,
 	};
 	struct mmu_interval_notifier *interval_sub;
 	unsigned long cur_seq;
+	LIST_HEAD(additional_passes);
 	bool ret;
 
 	for (interval_sub =
 		     mn_itree_inv_start_range(subscriptions, &range, &cur_seq);
 	     interval_sub;
 	     interval_sub = mn_itree_inv_next(interval_sub, &range)) {
-		ret = interval_sub->ops->invalidate(interval_sub, &range,
-						    cur_seq);
+		if (interval_sub->ops->invalidate_multipass) {
+			struct mmu_interval_notifier_pass *second = NULL;
+
+			ret = interval_sub->ops->invalidate_multipass(interval_sub,
+								      &range,
+								      cur_seq,
+								      &second);
+			if (ret && second)
+				list_add_tail(&second->link, &additional_passes);
+
+		} else {
+			ret = interval_sub->ops->invalidate(interval_sub,
+							    &range,
+							    cur_seq);
+		}
 		WARN_ON(!ret);
 	}
 
+	mn_itree_additional_passes(&additional_passes, &range, cur_seq);
 	mn_itree_inv_end(subscriptions);
 }
 
@@ -431,6 +462,8 @@ static int mn_itree_invalidate(struct mmu_notifier_subscriptions *subscriptions,
 {
 	struct mmu_interval_notifier *interval_sub;
 	unsigned long cur_seq;
+	LIST_HEAD(additional_passes);
+	int err = 0;
 
 	for (interval_sub =
 		     mn_itree_inv_start_range(subscriptions, range, &cur_seq);
@@ -438,23 +471,39 @@ static int mn_itree_invalidate(struct mmu_notifier_subscriptions *subscriptions,
 	     interval_sub = mn_itree_inv_next(interval_sub, range)) {
 		bool ret;
 
-		ret = interval_sub->ops->invalidate(interval_sub, range,
-						    cur_seq);
+		if (interval_sub->ops->invalidate_multipass) {
+			struct mmu_interval_notifier_pass *second = NULL;
+
+			ret = interval_sub->ops->invalidate_multipass(interval_sub,
+								      range,
+								      cur_seq,
+								      &second);
+			if (ret && second)
+				list_add_tail(&second->link, &additional_passes);
+
+		} else {
+			ret = interval_sub->ops->invalidate(interval_sub,
+							    range,
+							    cur_seq);
+		}
 		if (!ret) {
 			if (WARN_ON(mmu_notifier_range_blockable(range)))
 				continue;
-			goto out_would_block;
+			err = -EAGAIN;
+			break;
 		}
 	}
-	return 0;
 
-out_would_block:
+	mn_itree_additional_passes(&additional_passes, range, cur_seq);
+
 	/*
 	 * On -EAGAIN the non-blocking caller is not allowed to call
 	 * invalidate_range_end()
 	 */
-	mn_itree_inv_end(subscriptions);
-	return -EAGAIN;
+	if (err)
+		mn_itree_inv_end(subscriptions);
+
+	return err;
 }
 
 static int mn_hlist_invalidate_range_start(
-- 
2.50.1

[RFC PATCH 2/6] drm/gpusvm: Update GPU SVM / Xe to twopass MMU notifier

[Thomas Hellström]

From: Matthew Brost <matthew.brost@intel.com>

Update GPU SVM and Xe to use two-pass MMU notifiers, enabling pipelined
TLB invalidations across VMs or multiple devices.

The driver-side (Xe) implementation is not yet implemented.

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/drm_gpusvm.c | 18 +++++++++++-------
 drivers/gpu/drm/xe/xe_svm.c  |  9 +++++----
 include/drm/drm_gpusvm.h     | 11 +++++++----
 3 files changed, 23 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/drm_gpusvm.c b/drivers/gpu/drm/drm_gpusvm.c
index 661306da6b2d..92dc7d2bd6cf 100644
--- a/drivers/gpu/drm/drm_gpusvm.c
+++ b/drivers/gpu/drm/drm_gpusvm.c
@@ -374,10 +374,13 @@ notifier_iter_first(struct rb_root_cached *root, unsigned long start,
 	     (notifier__) = (next__), (next__) = __drm_gpusvm_notifier_next(notifier__))
 
 /**
- * drm_gpusvm_notifier_invalidate() - Invalidate a GPU SVM notifier.
+ * drm_gpusvm_notifier_invalidate_twopass() - Invalidate a GPU SVM notifie,
+ * fist pass.
+ *
  * @mni: Pointer to the mmu_interval_notifier structure.
  * @mmu_range: Pointer to the mmu_notifier_range structure.
  * @cur_seq: Current sequence number.
+ * @pass: First pass of MMU notifier
  *
  * This function serves as a generic MMU notifier for GPU SVM. It sets the MMU
  * notifier sequence number and calls the driver invalidate vfunc under
@@ -386,9 +389,10 @@ notifier_iter_first(struct rb_root_cached *root, unsigned long start,
  * Return: true if the operation succeeds, false otherwise.
  */
 static bool
-drm_gpusvm_notifier_invalidate(struct mmu_interval_notifier *mni,
-			       const struct mmu_notifier_range *mmu_range,
-			       unsigned long cur_seq)
+drm_gpusvm_notifier_invalidate_twopass(struct mmu_interval_notifier *mni,
+				       const struct mmu_notifier_range *mmu_range,
+				       unsigned long cur_seq,
+				       struct mmu_interval_notifier_pass **pass)
 {
 	struct drm_gpusvm_notifier *notifier =
 		container_of(mni, typeof(*notifier), notifier);
@@ -399,7 +403,7 @@ drm_gpusvm_notifier_invalidate(struct mmu_interval_notifier *mni,
 
 	down_write(&gpusvm->notifier_lock);
 	mmu_interval_set_seq(mni, cur_seq);
-	gpusvm->ops->invalidate(gpusvm, notifier, mmu_range);
+	gpusvm->ops->invalidate_twopass(gpusvm, notifier, mmu_range, pass);
 	up_write(&gpusvm->notifier_lock);
 
 	return true;
@@ -409,7 +413,7 @@ drm_gpusvm_notifier_invalidate(struct mmu_interval_notifier *mni,
  * drm_gpusvm_notifier_ops - MMU interval notifier operations for GPU SVM
  */
 static const struct mmu_interval_notifier_ops drm_gpusvm_notifier_ops = {
-	.invalidate = drm_gpusvm_notifier_invalidate,
+	.invalidate_twopass = drm_gpusvm_notifier_invalidate_twopass,
 };
 
 /**
@@ -440,7 +444,7 @@ int drm_gpusvm_init(struct drm_gpusvm *gpusvm,
 		    const struct drm_gpusvm_ops *ops,
 		    const unsigned long *chunk_sizes, int num_chunks)
 {
-	if (!ops->invalidate || !num_chunks)
+	if (!ops->invalidate_twopass || !num_chunks)
 		return -EINVAL;
 
 	gpusvm->name = name;
diff --git a/drivers/gpu/drm/xe/xe_svm.c b/drivers/gpu/drm/xe/xe_svm.c
index e35c6d4def20..23c5b363261c 100644
--- a/drivers/gpu/drm/xe/xe_svm.c
+++ b/drivers/gpu/drm/xe/xe_svm.c
@@ -171,9 +171,10 @@ xe_svm_range_notifier_event_end(struct xe_vm *vm, struct drm_gpusvm_range *r,
 						   mmu_range);
 }
 
-static void xe_svm_invalidate(struct drm_gpusvm *gpusvm,
-			      struct drm_gpusvm_notifier *notifier,
-			      const struct mmu_notifier_range *mmu_range)
+static void xe_svm_invalidate_twopass(struct drm_gpusvm *gpusvm,
+				      struct drm_gpusvm_notifier *notifier,
+				      const struct mmu_notifier_range *mmu_range,
+				      struct mmu_interval_notifier_pass **p)
 {
 	struct xe_vm *vm = gpusvm_to_vm(gpusvm);
 	struct xe_device *xe = vm->xe;
@@ -553,7 +554,7 @@ static const struct drm_pagemap_devmem_ops dpagemap_devmem_ops = {
 static const struct drm_gpusvm_ops gpusvm_ops = {
 	.range_alloc = xe_svm_range_alloc,
 	.range_free = xe_svm_range_free,
-	.invalidate = xe_svm_invalidate,
+	.invalidate_twopass = xe_svm_invalidate_twopass,
 };
 
 static const unsigned long fault_chunk_sizes[] = {
diff --git a/include/drm/drm_gpusvm.h b/include/drm/drm_gpusvm.h
index 8d613e9b2690..8b5e159857fc 100644
--- a/include/drm/drm_gpusvm.h
+++ b/include/drm/drm_gpusvm.h
@@ -63,17 +63,20 @@ struct drm_gpusvm_ops {
 	void (*range_free)(struct drm_gpusvm_range *range);
 
 	/**
-	 * @invalidate: Invalidate GPU SVM notifier (required)
+	 * @invalidate_twopass: Invalidate first pass GPU SVM notifier (required)
 	 * @gpusvm: Pointer to the GPU SVM
 	 * @notifier: Pointer to the GPU SVM notifier
 	 * @mmu_range: Pointer to the mmu_notifier_range structure
+	 * @pass: Pass of MMU notifier, optionally populated driver side
+	 * if a second pass of MMU notifier is desired
 	 *
 	 * Invalidate the GPU page tables. It can safely walk the notifier range
 	 * RB tree/list in this function. Called while holding the notifier lock.
 	 */
-	void (*invalidate)(struct drm_gpusvm *gpusvm,
-			   struct drm_gpusvm_notifier *notifier,
-			   const struct mmu_notifier_range *mmu_range);
+	void (*invalidate_twopass)(struct drm_gpusvm *gpusvm,
+				   struct drm_gpusvm_notifier *notifier,
+				   const struct mmu_notifier_range *mmu_range,
+				   struct mmu_interval_notifier_pass **pass);
 };
 
 /**
-- 
2.50.1

[RFC PATCH 3/6] drm/gpusvm: Add drm_gpusvm_in_notifier_* helpers

[Thomas Hellström]

From: Matthew Brost <matthew.brost@intel.com>

Abstract drm_gpusvm_in_notifier_lock/unlock with helpers. Intended usage
is a client side 2nd pass of a MMU notifier.

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
 include/drm/drm_gpusvm.h | 22 ++++++++++++++++++++--
 1 file changed, 20 insertions(+), 2 deletions(-)

diff --git a/include/drm/drm_gpusvm.h b/include/drm/drm_gpusvm.h
index 8b5e159857fc..4bdbe10685cf 100644
--- a/include/drm/drm_gpusvm.h
+++ b/include/drm/drm_gpusvm.h
@@ -313,7 +313,7 @@ void drm_gpusvm_range_set_unmapped(struct drm_gpusvm_range *range,
 #endif
 
 /**
- * drm_gpusvm_notifier_lock() - Lock GPU SVM notifier
+ * drm_gpusvm_notifier_lock() - Lock GPU SVM notifier, client side
  * @gpusvm__: Pointer to the GPU SVM structure.
  *
  * Abstract client usage GPU SVM notifier lock, take lock
@@ -322,7 +322,7 @@ void drm_gpusvm_range_set_unmapped(struct drm_gpusvm_range *range,
 	down_read(&(gpusvm__)->notifier_lock)
 
 /**
- * drm_gpusvm_notifier_unlock() - Unlock GPU SVM notifier
+ * drm_gpusvm_notifier_unlock() - Unlock GPU SVM notifier, client side
  * @gpusvm__: Pointer to the GPU SVM structure.
  *
  * Abstract client usage GPU SVM notifier lock, drop lock
@@ -330,6 +330,24 @@ void drm_gpusvm_range_set_unmapped(struct drm_gpusvm_range *range,
 #define drm_gpusvm_notifier_unlock(gpusvm__)	\
 	up_read(&(gpusvm__)->notifier_lock)
 
+/**
+ * drm_gpusvm_in_notifier_lock() - Lock GPU SVM notifier, in notifier
+ * @gpusvm__: Pointer to the GPU SVM structure.
+ *
+ * Abstract in notifier (2nd pass) usage GPU SVM notifier lock, take lock
+ */
+#define drm_gpusvm_in_notifier_lock(gpusvm__)	\
+	down_write(&(gpusvm__)->notifier_lock)
+
+/**
+ * drm_gpusvm_in_notifier_unlock() - Unlock GPU SVM notifier, in notifier
+ * @gpusvm__: Pointer to the GPU SVM structure.
+ *
+ * Abstract in notifier (2nd pass) GPU SVM notifier lock, drop lock
+ */
+#define drm_gpusvm_in_notifier_unlock(gpusvm__)	\
+	up_write(&(gpusvm__)->notifier_lock)
+
 /**
  * drm_gpusvm_range_start() - GPU SVM range start address
  * @range: Pointer to the GPU SVM range
-- 
2.50.1

[RFC PATCH 4/6] drm/xe: Skip waiting on unarmed fences in xe_gt_tlb_invalidation_fence_wait

[Thomas Hellström]

From: Matthew Brost <matthew.brost@intel.com>

Avoids unnecessary waits when the TLB invalidation fence has not been
armed, simplifying caller logic in cases where the fence status is
uncertain.

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/xe/xe_gt_tlb_invalidation.h | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.h b/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.h
index f7f0f2eaf4b5..c6d4398d3429 100644
--- a/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.h
+++ b/drivers/gpu/drm/xe/xe_gt_tlb_invalidation.h
@@ -34,7 +34,8 @@ void xe_gt_tlb_invalidation_fence_signal(struct xe_gt_tlb_invalidation_fence *fe
 static inline void
 xe_gt_tlb_invalidation_fence_wait(struct xe_gt_tlb_invalidation_fence *fence)
 {
-	dma_fence_wait(&fence->base, false);
+	if (fence->seqno)
+		dma_fence_wait(&fence->base, false);
 }
 
 #endif	/* _XE_GT_TLB_INVALIDATION_ */
-- 
2.50.1

[RFC PATCH 5/6] drm/xe: Add fences argument to xe_vm_range_tilemask_tlb_invalidation

[Thomas Hellström]

From: Matthew Brost <matthew.brost@intel.com>

Introduce a fences argument to xe_vm_range_tilemask_tlb_invalidation,
allowing callers to provide fences and defer waiting to a later point.

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/xe/xe_svm.c |  3 ++-
 drivers/gpu/drm/xe/xe_vm.c  | 26 +++++++++++++++++---------
 drivers/gpu/drm/xe/xe_vm.h  |  6 ++++--
 3 files changed, 23 insertions(+), 12 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_svm.c b/drivers/gpu/drm/xe/xe_svm.c
index 23c5b363261c..82a598c8d56e 100644
--- a/drivers/gpu/drm/xe/xe_svm.c
+++ b/drivers/gpu/drm/xe/xe_svm.c
@@ -226,7 +226,8 @@ static void xe_svm_invalidate_twopass(struct drm_gpusvm *gpusvm,
 
 	xe_device_wmb(xe);
 
-	err = xe_vm_range_tilemask_tlb_invalidation(vm, adj_start, adj_end, tile_mask);
+	err = xe_vm_range_tilemask_tlb_invalidation(vm, NULL, adj_start,
+						    adj_end, tile_mask);
 	WARN_ON_ONCE(err);
 
 range_notifier_event_end:
diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c
index 148a2425006f..52242fac6969 100644
--- a/drivers/gpu/drm/xe/xe_vm.c
+++ b/drivers/gpu/drm/xe/xe_vm.c
@@ -3846,6 +3846,7 @@ void xe_vm_unlock(struct xe_vm *vm)
  * xe_vm_range_tilemask_tlb_invalidation - Issue a TLB invalidation on this tilemask for an
  * address range
  * @vm: The VM
+ * @fences: Caller provided fences, caller owns waiting if non-NULL
  * @start: start address
  * @end: end address
  * @tile_mask: mask for which gt's issue tlb invalidation
@@ -3854,10 +3855,12 @@ void xe_vm_unlock(struct xe_vm *vm)
  *
  * Returns 0 for success, negative error code otherwise.
  */
-int xe_vm_range_tilemask_tlb_invalidation(struct xe_vm *vm, u64 start,
-					  u64 end, u8 tile_mask)
+int xe_vm_range_tilemask_tlb_invalidation(struct xe_vm *vm,
+					  struct xe_gt_tlb_invalidation_fence *fences,
+					  u64 start, u64 end, u8 tile_mask)
 {
 	struct xe_gt_tlb_invalidation_fence fence[XE_MAX_TILES_PER_DEVICE * XE_MAX_GT_PER_TILE];
+	struct xe_gt_tlb_invalidation_fence *__fence = fences ?: fence;
 	struct xe_tile *tile;
 	u32 fence_id = 0;
 	u8 id;
@@ -3869,37 +3872,41 @@ int xe_vm_range_tilemask_tlb_invalidation(struct xe_vm *vm, u64 start,
 	for_each_tile(tile, vm->xe, id) {
 		if (tile_mask & BIT(id)) {
 			xe_gt_tlb_invalidation_fence_init(tile->primary_gt,
-							  &fence[fence_id], true);
+							 __fence, true);
 
 			err = xe_gt_tlb_invalidation_range(tile->primary_gt,
-							   &fence[fence_id],
+							   __fence,
 							   start,
 							   end,
 							   vm->usm.asid);
 			if (err)
 				goto wait;
 			++fence_id;
+			++__fence;
 
 			if (!tile->media_gt)
 				continue;
 
 			xe_gt_tlb_invalidation_fence_init(tile->media_gt,
-							  &fence[fence_id], true);
+							  __fence, true);
 
 			err = xe_gt_tlb_invalidation_range(tile->media_gt,
-							   &fence[fence_id],
+							   __fence,
 							   start,
 							   end,
 							   vm->usm.asid);
 			if (err)
 				goto wait;
 			++fence_id;
+			++__fence;
 		}
 	}
 
 wait:
-	for (id = 0; id < fence_id; ++id)
-		xe_gt_tlb_invalidation_fence_wait(&fence[id]);
+	if (!fences) {
+		for (id = 0; id < fence_id; ++id)
+			xe_gt_tlb_invalidation_fence_wait(&fence[id]);
+	}
 
 	return err;
 }
@@ -3958,7 +3965,8 @@ int xe_vm_invalidate_vma(struct xe_vma *vma)
 
 	xe_device_wmb(xe);
 
-	ret = xe_vm_range_tilemask_tlb_invalidation(xe_vma_vm(vma), xe_vma_start(vma),
+	ret = xe_vm_range_tilemask_tlb_invalidation(xe_vma_vm(vma), NULL,
+						    xe_vma_start(vma),
 						    xe_vma_end(vma), tile_mask);
 
 	/* WRITE_ONCE pairs with READ_ONCE in xe_vm_has_valid_gpu_mapping() */
diff --git a/drivers/gpu/drm/xe/xe_vm.h b/drivers/gpu/drm/xe/xe_vm.h
index 3475a118f666..d1c3c9aa8d03 100644
--- a/drivers/gpu/drm/xe/xe_vm.h
+++ b/drivers/gpu/drm/xe/xe_vm.h
@@ -22,6 +22,7 @@ struct dma_fence;
 
 struct xe_exec_queue;
 struct xe_file;
+struct xe_gt_tlb_invalidation_fence;
 struct xe_sync_entry;
 struct xe_svm_range;
 struct drm_exec;
@@ -228,8 +229,9 @@ struct dma_fence *xe_vm_range_rebind(struct xe_vm *vm,
 struct dma_fence *xe_vm_range_unbind(struct xe_vm *vm,
 				     struct xe_svm_range *range);
 
-int xe_vm_range_tilemask_tlb_invalidation(struct xe_vm *vm, u64 start,
-					  u64 end, u8 tile_mask);
+int xe_vm_range_tilemask_tlb_invalidation(struct xe_vm *vm,
+					  struct xe_gt_tlb_invalidation_fence *fences,
+					  u64 start, u64 end, u8 tile_mask);
 
 int xe_vm_invalidate_vma(struct xe_vma *vma);
 
-- 
2.50.1

[RFC PATCH 6/6] drm/xe: Implement two pass MMU notifiers for SVM

[Thomas Hellström]

From: Matthew Brost <matthew.brost@intel.com>

Implement two-pass MMU notifiers for SVM, enabling multiple VMs or
devices with GPU mappings to pipeline costly TLB invalidations by
issuing them in the first pass and waiting for completion in the second.

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
 drivers/gpu/drm/drm_gpusvm.c |  2 +-
 drivers/gpu/drm/xe/xe_svm.c  | 74 ++++++++++++++++++++++++++++++------
 2 files changed, 63 insertions(+), 13 deletions(-)

diff --git a/drivers/gpu/drm/drm_gpusvm.c b/drivers/gpu/drm/drm_gpusvm.c
index 92dc7d2bd6cf..f153df1bc862 100644
--- a/drivers/gpu/drm/drm_gpusvm.c
+++ b/drivers/gpu/drm/drm_gpusvm.c
@@ -413,7 +413,7 @@ drm_gpusvm_notifier_invalidate_twopass(struct mmu_interval_notifier *mni,
  * drm_gpusvm_notifier_ops - MMU interval notifier operations for GPU SVM
  */
 static const struct mmu_interval_notifier_ops drm_gpusvm_notifier_ops = {
-	.invalidate_twopass = drm_gpusvm_notifier_invalidate_twopass,
+	.invalidate_multipass = drm_gpusvm_notifier_invalidate_twopass,
 };
 
 /**
diff --git a/drivers/gpu/drm/xe/xe_svm.c b/drivers/gpu/drm/xe/xe_svm.c
index 82a598c8d56e..5728394806ca 100644
--- a/drivers/gpu/drm/xe/xe_svm.c
+++ b/drivers/gpu/drm/xe/xe_svm.c
@@ -144,15 +144,8 @@ xe_svm_range_notifier_event_begin(struct xe_vm *vm, struct drm_gpusvm_range *r,
 	 * invalidations spanning multiple ranges.
 	 */
 	for_each_tile(tile, xe, id)
-		if (xe_pt_zap_ptes_range(tile, vm, range)) {
+		if (xe_pt_zap_ptes_range(tile, vm, range))
 			tile_mask |= BIT(id);
-			/*
-			 * WRITE_ONCE pairs with READ_ONCE in
-			 * xe_vm_has_valid_gpu_mapping()
-			 */
-			WRITE_ONCE(range->tile_invalidated,
-				   range->tile_invalidated | BIT(id));
-		}
 
 	return tile_mask;
 }
@@ -161,16 +154,60 @@ static void
 xe_svm_range_notifier_event_end(struct xe_vm *vm, struct drm_gpusvm_range *r,
 				const struct mmu_notifier_range *mmu_range)
 {
+	struct xe_svm_range *range = to_xe_range(r);
 	struct drm_gpusvm_ctx ctx = { .in_notifier = true, };
 
 	xe_svm_assert_in_notifier(vm);
 
+	/*
+	 * WRITE_ONCE pairs with READ_ONCE in xe_vm_has_valid_gpu_mapping()
+	 */
+	WRITE_ONCE(range->tile_invalidated, range->tile_present);
+
 	drm_gpusvm_range_unmap_pages(&vm->svm.gpusvm, r, &ctx);
 	if (!xe_vm_is_closed(vm) && mmu_range->event == MMU_NOTIFY_UNMAP)
 		xe_svm_garbage_collector_add_range(vm, to_xe_range(r),
 						   mmu_range);
 }
 
+struct xe_svm_invalidate_pass {
+	struct drm_gpusvm *gpusvm;
+	struct drm_gpusvm_notifier *notifier;
+#define XE_SVM_INVALIDATE_FENCE_COUNT	\
+	(XE_MAX_TILES_PER_DEVICE * XE_MAX_GT_PER_TILE)
+	struct xe_gt_tlb_invalidation_fence fences[XE_SVM_INVALIDATE_FENCE_COUNT];
+	struct mmu_interval_notifier_pass p;
+};
+
+static struct mmu_interval_notifier_pass *
+xe_svm_invalidate_second(struct mmu_interval_notifier_pass *p,
+			 const struct mmu_notifier_range *mmu_range,
+			 unsigned long cur_seq)
+{
+	struct xe_svm_invalidate_pass *pass = container_of(p, typeof(*pass), p);
+	struct drm_gpusvm *gpusvm = pass->gpusvm;
+	struct drm_gpusvm_notifier *notifier = pass->notifier;
+	struct drm_gpusvm_range *r = NULL;
+	struct xe_vm *vm = gpusvm_to_vm(gpusvm);
+	u64 adj_start = mmu_range->start, adj_end = mmu_range->end;
+	int id;
+
+	/* Adjust invalidation to notifier boundaries */
+	adj_start = max(drm_gpusvm_notifier_start(notifier), adj_start);
+	adj_end = min(drm_gpusvm_notifier_end(notifier), adj_end);
+
+	for (id = 0; id < XE_SVM_INVALIDATE_FENCE_COUNT; ++id)
+		xe_gt_tlb_invalidation_fence_wait(&pass->fences[id]);
+
+	drm_gpusvm_in_notifier_lock(gpusvm);
+	drm_gpusvm_for_each_range(r, notifier, adj_start, adj_end)
+		xe_svm_range_notifier_event_end(vm, r, mmu_range);
+	drm_gpusvm_in_notifier_unlock(gpusvm);
+
+	kfree(pass);
+	return NULL;
+}
+
 static void xe_svm_invalidate_twopass(struct drm_gpusvm *gpusvm,
 				      struct drm_gpusvm_notifier *notifier,
 				      const struct mmu_notifier_range *mmu_range,
@@ -179,6 +216,8 @@ static void xe_svm_invalidate_twopass(struct drm_gpusvm *gpusvm,
 	struct xe_vm *vm = gpusvm_to_vm(gpusvm);
 	struct xe_device *xe = vm->xe;
 	struct drm_gpusvm_range *r, *first;
+	struct xe_svm_invalidate_pass *pass = NULL;
+	struct xe_gt_tlb_invalidation_fence *fences = NULL;
 	u64 adj_start = mmu_range->start, adj_end = mmu_range->end;
 	u8 tile_mask = 0;
 	long err;
@@ -226,14 +265,25 @@ static void xe_svm_invalidate_twopass(struct drm_gpusvm *gpusvm,
 
 	xe_device_wmb(xe);
 
-	err = xe_vm_range_tilemask_tlb_invalidation(vm, NULL, adj_start,
+	pass = kzalloc(sizeof(*pass), GFP_NOWAIT);
+	if (pass) {
+		pass->gpusvm = gpusvm;
+		pass->notifier = notifier;
+		pass->p.pass = xe_svm_invalidate_second;
+		fences = pass->fences;
+		*p = &pass->p;
+	}
+
+	err = xe_vm_range_tilemask_tlb_invalidation(vm, fences, adj_start,
 						    adj_end, tile_mask);
 	WARN_ON_ONCE(err);
 
 range_notifier_event_end:
-	r = first;
-	drm_gpusvm_for_each_range(r, notifier, adj_start, adj_end)
-		xe_svm_range_notifier_event_end(vm, r, mmu_range);
+	if (!pass) {
+		r = first;
+		drm_gpusvm_for_each_range(r, notifier, adj_start, adj_end)
+			xe_svm_range_notifier_event_end(vm, r, mmu_range);
+	}
 }
 
 static int __xe_svm_garbage_collector(struct xe_vm *vm,
-- 
2.50.1

✓ CI.KUnit: success for Multi-pass MMU interval notifiers

[Patchwork]

== Series Details ==

Series: Multi-pass MMU interval notifiers
URL   : https://patchwork.freedesktop.org/series/152725/
State : success

== Summary ==

+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[13:59:06] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:59:11] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[13:59:38] Starting KUnit Kernel (1/1)...
[13:59:38] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[13:59:38] ================== guc_buf (11 subtests) ===================
[13:59:38] [PASSED] test_smallest
[13:59:38] [PASSED] test_largest
[13:59:38] [PASSED] test_granular
[13:59:38] [PASSED] test_unique
[13:59:38] [PASSED] test_overlap
[13:59:38] [PASSED] test_reusable
[13:59:38] [PASSED] test_too_big
[13:59:38] [PASSED] test_flush
[13:59:38] [PASSED] test_lookup
[13:59:38] [PASSED] test_data
[13:59:38] [PASSED] test_class
[13:59:38] ===================== [PASSED] guc_buf =====================
[13:59:38] =================== guc_dbm (7 subtests) ===================
[13:59:38] [PASSED] test_empty
[13:59:38] [PASSED] test_default
[13:59:38] ======================== test_size  ========================
[13:59:38] [PASSED] 4
[13:59:38] [PASSED] 8
[13:59:38] [PASSED] 32
[13:59:38] [PASSED] 256
[13:59:38] ==================== [PASSED] test_size ====================
[13:59:38] ======================= test_reuse  ========================
[13:59:38] [PASSED] 4
[13:59:38] [PASSED] 8
[13:59:38] [PASSED] 32
[13:59:38] [PASSED] 256
[13:59:38] =================== [PASSED] test_reuse ====================
[13:59:38] =================== test_range_overlap  ====================
[13:59:38] [PASSED] 4
[13:59:38] [PASSED] 8
[13:59:38] [PASSED] 32
[13:59:38] [PASSED] 256
[13:59:38] =============== [PASSED] test_range_overlap ================
[13:59:38] =================== test_range_compact  ====================
[13:59:38] [PASSED] 4
[13:59:38] [PASSED] 8
[13:59:38] [PASSED] 32
[13:59:38] [PASSED] 256
[13:59:38] =============== [PASSED] test_range_compact ================
[13:59:38] ==================== test_range_spare  =====================
[13:59:38] [PASSED] 4
[13:59:38] [PASSED] 8
[13:59:38] [PASSED] 32
[13:59:38] [PASSED] 256
[13:59:38] ================ [PASSED] test_range_spare =================
[13:59:38] ===================== [PASSED] guc_dbm =====================
[13:59:38] =================== guc_idm (6 subtests) ===================
[13:59:38] [PASSED] bad_init
[13:59:38] [PASSED] no_init
[13:59:38] [PASSED] init_fini
[13:59:38] [PASSED] check_used
[13:59:38] [PASSED] check_quota
[13:59:38] [PASSED] check_all
[13:59:38] ===================== [PASSED] guc_idm =====================
[13:59:38] ================== no_relay (3 subtests) ===================
[13:59:38] [PASSED] xe_drops_guc2pf_if_not_ready
[13:59:38] [PASSED] xe_drops_guc2vf_if_not_ready
[13:59:38] [PASSED] xe_rejects_send_if_not_ready
[13:59:38] ==================== [PASSED] no_relay =====================
[13:59:38] ================== pf_relay (14 subtests) ==================
[13:59:38] [PASSED] pf_rejects_guc2pf_too_short
[13:59:38] [PASSED] pf_rejects_guc2pf_too_long
[13:59:38] [PASSED] pf_rejects_guc2pf_no_payload
[13:59:38] [PASSED] pf_fails_no_payload
[13:59:38] [PASSED] pf_fails_bad_origin
[13:59:38] [PASSED] pf_fails_bad_type
[13:59:38] [PASSED] pf_txn_reports_error
[13:59:38] [PASSED] pf_txn_sends_pf2guc
[13:59:38] [PASSED] pf_sends_pf2guc
[13:59:38] [SKIPPED] pf_loopback_nop
[13:59:38] [SKIPPED] pf_loopback_echo
[13:59:38] [SKIPPED] pf_loopback_fail
[13:59:38] [SKIPPED] pf_loopback_busy
[13:59:38] [SKIPPED] pf_loopback_retry
[13:59:38] ==================== [PASSED] pf_relay =====================
[13:59:38] ================== vf_relay (3 subtests) ===================
[13:59:38] [PASSED] vf_rejects_guc2vf_too_short
[13:59:38] [PASSED] vf_rejects_guc2vf_too_long
[13:59:38] [PASSED] vf_rejects_guc2vf_no_payload
[13:59:38] ==================== [PASSED] vf_relay =====================
[13:59:38] ===================== lmtt (1 subtest) =====================
[13:59:38] ======================== test_ops  =========================
[13:59:38] [PASSED] 2-level
[13:59:38] [PASSED] multi-level
[13:59:38] ==================== [PASSED] test_ops =====================
[13:59:38] ====================== [PASSED] lmtt =======================
[13:59:38] ================= pf_service (11 subtests) =================
[13:59:38] [PASSED] pf_negotiate_any
[13:59:38] [PASSED] pf_negotiate_base_match
[13:59:38] [PASSED] pf_negotiate_base_newer
[13:59:38] [PASSED] pf_negotiate_base_next
[13:59:38] [SKIPPED] pf_negotiate_base_older
[13:59:38] [PASSED] pf_negotiate_base_prev
[13:59:38] [PASSED] pf_negotiate_latest_match
[13:59:38] [PASSED] pf_negotiate_latest_newer
[13:59:38] [PASSED] pf_negotiate_latest_next
[13:59:38] [SKIPPED] pf_negotiate_latest_older
[13:59:38] [SKIPPED] pf_negotiate_latest_prev
[13:59:38] =================== [PASSED] pf_service ====================
[13:59:38] =================== xe_mocs (2 subtests) ===================
[13:59:38] ================ xe_live_mocs_kernel_kunit  ================
[13:59:38] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[13:59:38] ================ xe_live_mocs_reset_kunit  =================
[13:59:38] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[13:59:38] ==================== [SKIPPED] xe_mocs =====================
[13:59:38] ================= xe_migrate (2 subtests) ==================
[13:59:38] ================= xe_migrate_sanity_kunit  =================
[13:59:38] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[13:59:38] ================== xe_validate_ccs_kunit  ==================
[13:59:38] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[13:59:38] =================== [SKIPPED] xe_migrate ===================
[13:59:38] ================== xe_dma_buf (1 subtest) ==================
[13:59:38] ==================== xe_dma_buf_kunit  =====================
[13:59:38] ================ [SKIPPED] xe_dma_buf_kunit ================
[13:59:38] =================== [SKIPPED] xe_dma_buf ===================
[13:59:38] ================= xe_bo_shrink (1 subtest) =================
[13:59:38] =================== xe_bo_shrink_kunit  ====================
[13:59:38] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[13:59:38] ================== [SKIPPED] xe_bo_shrink ==================
[13:59:38] ==================== xe_bo (2 subtests) ====================
[13:59:38] ================== xe_ccs_migrate_kunit  ===================
[13:59:38] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[13:59:38] ==================== xe_bo_evict_kunit  ====================
[13:59:38] =============== [SKIPPED] xe_bo_evict_kunit ================
[13:59:38] ===================== [SKIPPED] xe_bo ======================
[13:59:38] ==================== args (11 subtests) ====================
[13:59:38] [PASSED] count_args_test
[13:59:38] [PASSED] call_args_example
[13:59:38] [PASSED] call_args_test
[13:59:38] [PASSED] drop_first_arg_example
[13:59:38] [PASSED] drop_first_arg_test
[13:59:38] [PASSED] first_arg_example
[13:59:38] [PASSED] first_arg_test
[13:59:38] [PASSED] last_arg_example
[13:59:38] [PASSED] last_arg_test
[13:59:38] [PASSED] pick_arg_example
[13:59:38] [PASSED] sep_comma_example
[13:59:38] ====================== [PASSED] args =======================
[13:59:38] =================== xe_pci (3 subtests) ====================
[13:59:38] ==================== check_graphics_ip  ====================
[13:59:38] [PASSED] 12.70 Xe_LPG
[13:59:38] [PASSED] 12.71 Xe_LPG
[13:59:38] [PASSED] 12.74 Xe_LPG+
[13:59:38] [PASSED] 20.01 Xe2_HPG
[13:59:38] [PASSED] 20.02 Xe2_HPG
[13:59:38] [PASSED] 20.04 Xe2_LPG
[13:59:38] [PASSED] 30.00 Xe3_LPG
[13:59:38] [PASSED] 30.01 Xe3_LPG
[13:59:38] [PASSED] 30.03 Xe3_LPG
[13:59:38] ================ [PASSED] check_graphics_ip ================
[13:59:38] ===================== check_media_ip  ======================
[13:59:38] [PASSED] 13.00 Xe_LPM+
[13:59:38] [PASSED] 13.01 Xe2_HPM
[13:59:38] [PASSED] 20.00 Xe2_LPM
[13:59:38] [PASSED] 30.00 Xe3_LPM
[13:59:38] [PASSED] 30.02 Xe3_LPM
[13:59:38] ================= [PASSED] check_media_ip ==================
[13:59:38] ================= check_platform_gt_count  =================
[13:59:38] [PASSED] 0x9A60 (TIGERLAKE)
[13:59:38] [PASSED] 0x9A68 (TIGERLAKE)
[13:59:38] [PASSED] 0x9A70 (TIGERLAKE)
[13:59:38] [PASSED] 0x9A40 (TIGERLAKE)
[13:59:38] [PASSED] 0x9A49 (TIGERLAKE)
[13:59:38] [PASSED] 0x9A59 (TIGERLAKE)
[13:59:38] [PASSED] 0x9A78 (TIGERLAKE)
[13:59:38] [PASSED] 0x9AC0 (TIGERLAKE)
[13:59:38] [PASSED] 0x9AC9 (TIGERLAKE)
[13:59:38] [PASSED] 0x9AD9 (TIGERLAKE)
[13:59:38] [PASSED] 0x9AF8 (TIGERLAKE)
[13:59:38] [PASSED] 0x4C80 (ROCKETLAKE)
[13:59:38] [PASSED] 0x4C8A (ROCKETLAKE)
[13:59:38] [PASSED] 0x4C8B (ROCKETLAKE)
[13:59:38] [PASSED] 0x4C8C (ROCKETLAKE)
[13:59:38] [PASSED] 0x4C90 (ROCKETLAKE)
[13:59:38] [PASSED] 0x4C9A (ROCKETLAKE)
[13:59:38] [PASSED] 0x4680 (ALDERLAKE_S)
[13:59:38] [PASSED] 0x4682 (ALDERLAKE_S)
[13:59:38] [PASSED] 0x4688 (ALDERLAKE_S)
[13:59:38] [PASSED] 0x468A (ALDERLAKE_S)
[13:59:38] [PASSED] 0x468B (ALDERLAKE_S)
[13:59:38] [PASSED] 0x4690 (ALDERLAKE_S)
[13:59:38] [PASSED] 0x4692 (ALDERLAKE_S)
[13:59:38] [PASSED] 0x4693 (ALDERLAKE_S)
[13:59:38] [PASSED] 0x46A0 (ALDERLAKE_P)
[13:59:38] [PASSED] 0x46A1 (ALDERLAKE_P)
[13:59:38] [PASSED] 0x46A2 (ALDERLAKE_P)
[13:59:38] [PASSED] 0x46A3 (ALDERLAKE_P)
[13:59:38] [PASSED] 0x46A6 (ALDERLAKE_P)
[13:59:38] [PASSED] 0x46A8 (ALDERLAKE_P)
[13:59:38] [PASSED] 0x46AA (ALDERLAKE_P)
[13:59:38] [PASSED] 0x462A (ALDERLAKE_P)
[13:59:38] [PASSED] 0x4626 (ALDERLAKE_P)
[13:59:38] [PASSED] 0x4628 (ALDERLAKE_P)
[13:59:38] [PASSED] 0x46B0 (ALDERLAKE_P)
[13:59:38] [PASSED] 0x46B1 (ALDERLAKE_P)
[13:59:38] [PASSED] 0x46B2 (ALDERLAKE_P)
[13:59:38] [PASSED] 0x46B3 (ALDERLAKE_P)
[13:59:38] [PASSED] 0x46C0 (ALDERLAKE_P)
[13:59:38] [PASSED] 0x46C1 (ALDERLAKE_P)
[13:59:38] [PASSED] 0x46C2 (ALDERLAKE_P)
[13:59:38] [PASSED] 0x46C3 (ALDERLAKE_P)
[13:59:38] [PASSED] 0x46D0 (ALDERLAKE_N)
[13:59:38] [PASSED] 0x46D1 (ALDERLAKE_N)
[13:59:38] [PASSED] 0x46D2 (ALDERLAKE_N)
[13:59:38] [PASSED] 0x46D3 (ALDERLAKE_N)
[13:59:38] [PASSED] 0x46D4 (ALDERLAKE_N)
[13:59:38] [PASSED] 0xA721 (ALDERLAKE_P)
[13:59:38] [PASSED] 0xA7A1 (ALDERLAKE_P)
[13:59:38] [PASSED] 0xA7A9 (ALDERLAKE_P)
[13:59:38] [PASSED] 0xA7AC (ALDERLAKE_P)
[13:59:38] [PASSED] 0xA7AD (ALDERLAKE_P)
[13:59:38] [PASSED] 0xA720 (ALDERLAKE_P)
[13:59:38] [PASSED] 0xA7A0 (ALDERLAKE_P)
[13:59:38] [PASSED] 0xA7A8 (ALDERLAKE_P)
[13:59:38] [PASSED] 0xA7AA (ALDERLAKE_P)
[13:59:38] [PASSED] 0xA7AB (ALDERLAKE_P)
[13:59:38] [PASSED] 0xA780 (ALDERLAKE_S)
[13:59:38] [PASSED] 0xA781 (ALDERLAKE_S)
[13:59:38] [PASSED] 0xA782 (ALDERLAKE_S)
[13:59:38] [PASSED] 0xA783 (ALDERLAKE_S)
[13:59:38] [PASSED] 0xA788 (ALDERLAKE_S)
[13:59:38] [PASSED] 0xA789 (ALDERLAKE_S)
[13:59:38] [PASSED] 0xA78A (ALDERLAKE_S)
[13:59:38] [PASSED] 0xA78B (ALDERLAKE_S)
[13:59:38] [PASSED] 0x4905 (DG1)
[13:59:38] [PASSED] 0x4906 (DG1)
[13:59:38] [PASSED] 0x4907 (DG1)
[13:59:38] [PASSED] 0x4908 (DG1)
[13:59:38] [PASSED] 0x4909 (DG1)
[13:59:38] [PASSED] 0x56C0 (DG2)
[13:59:38] [PASSED] 0x56C2 (DG2)
[13:59:38] [PASSED] 0x56C1 (DG2)
[13:59:38] [PASSED] 0x7D51 (METEORLAKE)
[13:59:38] [PASSED] 0x7DD1 (METEORLAKE)
[13:59:38] [PASSED] 0x7D41 (METEORLAKE)
[13:59:38] [PASSED] 0x7D67 (METEORLAKE)
[13:59:38] [PASSED] 0xB640 (METEORLAKE)
[13:59:38] [PASSED] 0x56A0 (DG2)
[13:59:38] [PASSED] 0x56A1 (DG2)
[13:59:38] [PASSED] 0x56A2 (DG2)
[13:59:38] [PASSED] 0x56BE (DG2)
[13:59:38] [PASSED] 0x56BF (DG2)
[13:59:38] [PASSED] 0x5690 (DG2)
[13:59:38] [PASSED] 0x5691 (DG2)
[13:59:38] [PASSED] 0x5692 (DG2)
[13:59:38] [PASSED] 0x56A5 (DG2)
[13:59:38] [PASSED] 0x56A6 (DG2)
[13:59:38] [PASSED] 0x56B0 (DG2)
[13:59:38] [PASSED] 0x56B1 (DG2)
[13:59:38] [PASSED] 0x56BA (DG2)
[13:59:38] [PASSED] 0x56BB (DG2)
[13:59:38] [PASSED] 0x56BC (DG2)
[13:59:38] [PASSED] 0x56BD (DG2)
[13:59:38] [PASSED] 0x5693 (DG2)
[13:59:38] [PASSED] 0x5694 (DG2)
[13:59:38] [PASSED] 0x5695 (DG2)
[13:59:38] [PASSED] 0x56A3 (DG2)
[13:59:38] [PASSED] 0x56A4 (DG2)
[13:59:38] [PASSED] 0x56B2 (DG2)
[13:59:38] [PASSED] 0x56B3 (DG2)
[13:59:38] [PASSED] 0x5696 (DG2)
[13:59:38] [PASSED] 0x5697 (DG2)
[13:59:38] [PASSED] 0xB69 (PVC)
[13:59:38] [PASSED] 0xB6E (PVC)
[13:59:38] [PASSED] 0xBD4 (PVC)
[13:59:38] [PASSED] 0xBD5 (PVC)
[13:59:38] [PASSED] 0xBD6 (PVC)
[13:59:38] [PASSED] 0xBD7 (PVC)
[13:59:38] [PASSED] 0xBD8 (PVC)
[13:59:38] [PASSED] 0xBD9 (PVC)
[13:59:38] [PASSED] 0xBDA (PVC)
[13:59:38] [PASSED] 0xBDB (PVC)
[13:59:38] [PASSED] 0xBE0 (PVC)
[13:59:38] [PASSED] 0xBE1 (PVC)
[13:59:38] [PASSED] 0xBE5 (PVC)
[13:59:38] [PASSED] 0x7D40 (METEORLAKE)
[13:59:38] [PASSED] 0x7D45 (METEORLAKE)
[13:59:38] [PASSED] 0x7D55 (METEORLAKE)
[13:59:38] [PASSED] 0x7D60 (METEORLAKE)
[13:59:38] [PASSED] 0x7DD5 (METEORLAKE)
[13:59:38] [PASSED] 0x6420 (LUNARLAKE)
[13:59:38] [PASSED] 0x64A0 (LUNARLAKE)
[13:59:38] [PASSED] 0x64B0 (LUNARLAKE)
[13:59:38] [PASSED] 0xE202 (BATTLEMAGE)
[13:59:38] [PASSED] 0xE209 (BATTLEMAGE)
[13:59:38] [PASSED] 0xE20B (BATTLEMAGE)
[13:59:38] [PASSED] 0xE20C (BATTLEMAGE)
[13:59:38] [PASSED] 0xE20D (BATTLEMAGE)
[13:59:38] [PASSED] 0xE210 (BATTLEMAGE)
[13:59:38] [PASSED] 0xE211 (BATTLEMAGE)
[13:59:38] [PASSED] 0xE212 (BATTLEMAGE)
[13:59:38] [PASSED] 0xE216 (BATTLEMAGE)
[13:59:38] [PASSED] 0xE220 (BATTLEMAGE)
[13:59:38] [PASSED] 0xE221 (BATTLEMAGE)
[13:59:38] [PASSED] 0xE222 (BATTLEMAGE)
[13:59:38] [PASSED] 0xE223 (BATTLEMAGE)
[13:59:38] [PASSED] 0xB080 (PANTHERLAKE)
[13:59:38] [PASSED] 0xB081 (PANTHERLAKE)
[13:59:38] [PASSED] 0xB082 (PANTHERLAKE)
[13:59:38] [PASSED] 0xB083 (PANTHERLAKE)
[13:59:38] [PASSED] 0xB084 (PANTHERLAKE)
[13:59:38] [PASSED] 0xB085 (PANTHERLAKE)
[13:59:38] [PASSED] 0xB086 (PANTHERLAKE)
[13:59:38] [PASSED] 0xB087 (PANTHERLAKE)
[13:59:38] [PASSED] 0xB08F (PANTHERLAKE)
[13:59:38] [PASSED] 0xB090 (PANTHERLAKE)
[13:59:38] [PASSED] 0xB0A0 (PANTHERLAKE)
[13:59:38] [PASSED] 0xB0B0 (PANTHERLAKE)
[13:59:38] [PASSED] 0xFD80 (PANTHERLAKE)
[13:59:38] [PASSED] 0xFD81 (PANTHERLAKE)
[13:59:38] ============= [PASSED] check_platform_gt_count =============
[13:59:38] ===================== [PASSED] xe_pci ======================
[13:59:38] =================== xe_rtp (2 subtests) ====================
[13:59:38] =============== xe_rtp_process_to_sr_tests  ================
[13:59:38] [PASSED] coalesce-same-reg
[13:59:38] [PASSED] no-match-no-add
[13:59:38] [PASSED] match-or
[13:59:38] [PASSED] match-or-xfail
[13:59:38] [PASSED] no-match-no-add-multiple-rules
[13:59:38] [PASSED] two-regs-two-entries
[13:59:38] [PASSED] clr-one-set-other
[13:59:38] [PASSED] set-field
[13:59:38] [PASSED] conflict-duplicate
[13:59:38] [PASSED] conflict-not-disjoint
[13:59:38] [PASSED] conflict-reg-type
[13:59:38] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[13:59:38] ================== xe_rtp_process_tests  ===================
[13:59:38] [PASSED] active1
[13:59:38] [PASSED] active2
[13:59:38] [PASSED] active-inactive
[13:59:38] [PASSED] inactive-active
[13:59:38] [PASSED] inactive-1st_or_active-inactive
[13:59:38] [PASSED] inactive-2nd_or_active-inactive
[13:59:38] [PASSED] inactive-last_or_active-inactive
[13:59:38] [PASSED] inactive-no_or_active-inactive
[13:59:38] ============== [PASSED] xe_rtp_process_tests ===============
[13:59:38] ===================== [PASSED] xe_rtp ======================
[13:59:38] ==================== xe_wa (1 subtest) =====================
[13:59:38] ======================== xe_wa_gt  =========================
[13:59:38] [PASSED] TIGERLAKE (B0)
[13:59:38] [PASSED] DG1 (A0)
[13:59:38] [PASSED] DG1 (B0)
[13:59:38] [PASSED] ALDERLAKE_S (A0)
[13:59:38] [PASSED] ALDERLAKE_S (B0)
[13:59:38] [PASSED] ALDERLAKE_S (C0)
[13:59:38] [PASSED] ALDERLAKE_S (D0)
[13:59:38] [PASSED] ALDERLAKE_P (A0)
[13:59:38] [PASSED] ALDERLAKE_P (B0)
[13:59:38] [PASSED] ALDERLAKE_P (C0)
[13:59:38] [PASSED] ALDERLAKE_S_RPLS (D0)
[13:59:38] [PASSED] ALDERLAKE_P_RPLU (E0)
[13:59:38] [PASSED] DG2_G10 (C0)
[13:59:38] [PASSED] DG2_G11 (B1)
[13:59:38] [PASSED] DG2_G12 (A1)
[13:59:38] [PASSED] METEORLAKE (g:A0, m:A0)
[13:59:38] [PASSED] METEORLAKE (g:A0, m:A0)
[13:59:38] [PASSED] METEORLAKE (g:A0, m:A0)
[13:59:38] [PASSED] LUNARLAKE (g:A0, m:A0)
[13:59:38] [PASSED] LUNARLAKE (g:B0, m:A0)
stty: 'standard input': Inappropriate ioctl for device
[13:59:38] [PASSED] BATTLEMAGE (g:A0, m:A1)
[13:59:38] ==================== [PASSED] xe_wa_gt =====================
[13:59:38] ====================== [PASSED] xe_wa ======================
[13:59:38] ============================================================
[13:59:38] Testing complete. Ran 297 tests: passed: 281, skipped: 16
[13:59:38] Elapsed time: 31.801s total, 4.207s configuring, 27.228s building, 0.318s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[13:59:38] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[13:59:40] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[14:00:02] Starting KUnit Kernel (1/1)...
[14:00:02] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[14:00:02] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[14:00:02] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[14:00:02] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[14:00:02] =========== drm_validate_clone_mode (2 subtests) ===========
[14:00:02] ============== drm_test_check_in_clone_mode  ===============
[14:00:02] [PASSED] in_clone_mode
[14:00:02] [PASSED] not_in_clone_mode
[14:00:02] ========== [PASSED] drm_test_check_in_clone_mode ===========
[14:00:02] =============== drm_test_check_valid_clones  ===============
[14:00:02] [PASSED] not_in_clone_mode
[14:00:02] [PASSED] valid_clone
[14:00:02] [PASSED] invalid_clone
[14:00:02] =========== [PASSED] drm_test_check_valid_clones ===========
[14:00:02] ============= [PASSED] drm_validate_clone_mode =============
[14:00:02] ============= drm_validate_modeset (1 subtest) =============
[14:00:02] [PASSED] drm_test_check_connector_changed_modeset
[14:00:02] ============== [PASSED] drm_validate_modeset ===============
[14:00:02] ====== drm_test_bridge_get_current_state (2 subtests) ======
[14:00:02] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[14:00:02] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[14:00:02] ======== [PASSED] drm_test_bridge_get_current_state ========
[14:00:02] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[14:00:02] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[14:00:02] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[14:00:02] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[14:00:02] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[14:00:02] ============== drm_bridge_alloc (2 subtests) ===============
[14:00:02] [PASSED] drm_test_drm_bridge_alloc_basic
[14:00:02] [PASSED] drm_test_drm_bridge_alloc_get_put
[14:00:02] ================ [PASSED] drm_bridge_alloc =================
[14:00:02] ================== drm_buddy (7 subtests) ==================
[14:00:02] [PASSED] drm_test_buddy_alloc_limit
[14:00:02] [PASSED] drm_test_buddy_alloc_optimistic
[14:00:02] [PASSED] drm_test_buddy_alloc_pessimistic
[14:00:02] [PASSED] drm_test_buddy_alloc_pathological
[14:00:02] [PASSED] drm_test_buddy_alloc_contiguous
[14:00:02] [PASSED] drm_test_buddy_alloc_clear
[14:00:02] [PASSED] drm_test_buddy_alloc_range_bias
[14:00:02] ==================== [PASSED] drm_buddy ====================
[14:00:02] ============= drm_cmdline_parser (40 subtests) =============
[14:00:02] [PASSED] drm_test_cmdline_force_d_only
[14:00:02] [PASSED] drm_test_cmdline_force_D_only_dvi
[14:00:02] [PASSED] drm_test_cmdline_force_D_only_hdmi
[14:00:02] [PASSED] drm_test_cmdline_force_D_only_not_digital
[14:00:02] [PASSED] drm_test_cmdline_force_e_only
[14:00:02] [PASSED] drm_test_cmdline_res
[14:00:02] [PASSED] drm_test_cmdline_res_vesa
[14:00:02] [PASSED] drm_test_cmdline_res_vesa_rblank
[14:00:02] [PASSED] drm_test_cmdline_res_rblank
[14:00:02] [PASSED] drm_test_cmdline_res_bpp
[14:00:02] [PASSED] drm_test_cmdline_res_refresh
[14:00:02] [PASSED] drm_test_cmdline_res_bpp_refresh
[14:00:02] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[14:00:02] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[14:00:02] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[14:00:02] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[14:00:02] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[14:00:02] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[14:00:02] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[14:00:02] [PASSED] drm_test_cmdline_res_margins_force_on
[14:00:02] [PASSED] drm_test_cmdline_res_vesa_margins
[14:00:02] [PASSED] drm_test_cmdline_name
[14:00:02] [PASSED] drm_test_cmdline_name_bpp
[14:00:02] [PASSED] drm_test_cmdline_name_option
[14:00:02] [PASSED] drm_test_cmdline_name_bpp_option
[14:00:02] [PASSED] drm_test_cmdline_rotate_0
[14:00:02] [PASSED] drm_test_cmdline_rotate_90
[14:00:02] [PASSED] drm_test_cmdline_rotate_180
[14:00:02] [PASSED] drm_test_cmdline_rotate_270
[14:00:02] [PASSED] drm_test_cmdline_hmirror
[14:00:02] [PASSED] drm_test_cmdline_vmirror
[14:00:02] [PASSED] drm_test_cmdline_margin_options
[14:00:02] [PASSED] drm_test_cmdline_multiple_options
[14:00:02] [PASSED] drm_test_cmdline_bpp_extra_and_option
[14:00:02] [PASSED] drm_test_cmdline_extra_and_option
[14:00:02] [PASSED] drm_test_cmdline_freestanding_options
[14:00:02] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[14:00:02] [PASSED] drm_test_cmdline_panel_orientation
[14:00:02] ================ drm_test_cmdline_invalid  =================
[14:00:02] [PASSED] margin_only
[14:00:02] [PASSED] interlace_only
[14:00:02] [PASSED] res_missing_x
[14:00:02] [PASSED] res_missing_y
[14:00:02] [PASSED] res_bad_y
[14:00:02] [PASSED] res_missing_y_bpp
[14:00:02] [PASSED] res_bad_bpp
[14:00:02] [PASSED] res_bad_refresh
[14:00:02] [PASSED] res_bpp_refresh_force_on_off
[14:00:02] [PASSED] res_invalid_mode
[14:00:02] [PASSED] res_bpp_wrong_place_mode
[14:00:02] [PASSED] name_bpp_refresh
[14:00:02] [PASSED] name_refresh
[14:00:02] [PASSED] name_refresh_wrong_mode
[14:00:02] [PASSED] name_refresh_invalid_mode
[14:00:02] [PASSED] rotate_multiple
[14:00:02] [PASSED] rotate_invalid_val
[14:00:02] [PASSED] rotate_truncated
[14:00:02] [PASSED] invalid_option
[14:00:02] [PASSED] invalid_tv_option
[14:00:02] [PASSED] truncated_tv_option
[14:00:02] ============ [PASSED] drm_test_cmdline_invalid =============
[14:00:02] =============== drm_test_cmdline_tv_options  ===============
[14:00:02] [PASSED] NTSC
[14:00:02] [PASSED] NTSC_443
[14:00:02] [PASSED] NTSC_J
[14:00:02] [PASSED] PAL
[14:00:02] [PASSED] PAL_M
[14:00:02] [PASSED] PAL_N
[14:00:02] [PASSED] SECAM
[14:00:02] [PASSED] MONO_525
[14:00:02] [PASSED] MONO_625
[14:00:02] =========== [PASSED] drm_test_cmdline_tv_options ===========
[14:00:02] =============== [PASSED] drm_cmdline_parser ================
[14:00:02] ========== drmm_connector_hdmi_init (20 subtests) ==========
[14:00:02] [PASSED] drm_test_connector_hdmi_init_valid
[14:00:02] [PASSED] drm_test_connector_hdmi_init_bpc_8
[14:00:02] [PASSED] drm_test_connector_hdmi_init_bpc_10
[14:00:02] [PASSED] drm_test_connector_hdmi_init_bpc_12
[14:00:02] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[14:00:02] [PASSED] drm_test_connector_hdmi_init_bpc_null
[14:00:02] [PASSED] drm_test_connector_hdmi_init_formats_empty
[14:00:02] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[14:00:02] === drm_test_connector_hdmi_init_formats_yuv420_allowed  ===
[14:00:02] [PASSED] supported_formats=0x9 yuv420_allowed=1
[14:00:02] [PASSED] supported_formats=0x9 yuv420_allowed=0
[14:00:02] [PASSED] supported_formats=0x3 yuv420_allowed=1
[14:00:02] [PASSED] supported_formats=0x3 yuv420_allowed=0
[14:00:02] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[14:00:02] [PASSED] drm_test_connector_hdmi_init_null_ddc
[14:00:02] [PASSED] drm_test_connector_hdmi_init_null_product
[14:00:02] [PASSED] drm_test_connector_hdmi_init_null_vendor
[14:00:02] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[14:00:02] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[14:00:02] [PASSED] drm_test_connector_hdmi_init_product_valid
[14:00:02] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[14:00:02] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[14:00:02] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[14:00:02] ========= drm_test_connector_hdmi_init_type_valid  =========
[14:00:02] [PASSED] HDMI-A
[14:00:02] [PASSED] HDMI-B
[14:00:02] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[14:00:02] ======== drm_test_connector_hdmi_init_type_invalid  ========
[14:00:02] [PASSED] Unknown
[14:00:02] [PASSED] VGA
[14:00:02] [PASSED] DVI-I
[14:00:02] [PASSED] DVI-D
[14:00:02] [PASSED] DVI-A
[14:00:02] [PASSED] Composite
[14:00:02] [PASSED] SVIDEO
[14:00:02] [PASSED] LVDS
[14:00:02] [PASSED] Component
[14:00:02] [PASSED] DIN
[14:00:02] [PASSED] DP
[14:00:02] [PASSED] TV
[14:00:02] [PASSED] eDP
[14:00:02] [PASSED] Virtual
[14:00:02] [PASSED] DSI
[14:00:02] [PASSED] DPI
[14:00:02] [PASSED] Writeback
[14:00:02] [PASSED] SPI
[14:00:02] [PASSED] USB
[14:00:02] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[14:00:02] ============ [PASSED] drmm_connector_hdmi_init =============
[14:00:02] ============= drmm_connector_init (3 subtests) =============
[14:00:02] [PASSED] drm_test_drmm_connector_init
[14:00:02] [PASSED] drm_test_drmm_connector_init_null_ddc
[14:00:02] ========= drm_test_drmm_connector_init_type_valid  =========
[14:00:02] [PASSED] Unknown
[14:00:02] [PASSED] VGA
[14:00:02] [PASSED] DVI-I
[14:00:02] [PASSED] DVI-D
[14:00:02] [PASSED] DVI-A
[14:00:02] [PASSED] Composite
[14:00:02] [PASSED] SVIDEO
[14:00:02] [PASSED] LVDS
[14:00:02] [PASSED] Component
[14:00:02] [PASSED] DIN
[14:00:02] [PASSED] DP
[14:00:02] [PASSED] HDMI-A
[14:00:02] [PASSED] HDMI-B
[14:00:02] [PASSED] TV
[14:00:02] [PASSED] eDP
[14:00:02] [PASSED] Virtual
[14:00:02] [PASSED] DSI
[14:00:02] [PASSED] DPI
[14:00:02] [PASSED] Writeback
[14:00:02] [PASSED] SPI
[14:00:02] [PASSED] USB
[14:00:02] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[14:00:02] =============== [PASSED] drmm_connector_init ===============
[14:00:02] ========= drm_connector_dynamic_init (6 subtests) ==========
[14:00:02] [PASSED] drm_test_drm_connector_dynamic_init
[14:00:02] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[14:00:02] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[14:00:02] [PASSED] drm_test_drm_connector_dynamic_init_properties
[14:00:02] ===== drm_test_drm_connector_dynamic_init_type_valid  ======
[14:00:02] [PASSED] Unknown
[14:00:02] [PASSED] VGA
[14:00:02] [PASSED] DVI-I
[14:00:02] [PASSED] DVI-D
[14:00:02] [PASSED] DVI-A
[14:00:02] [PASSED] Composite
[14:00:02] [PASSED] SVIDEO
[14:00:02] [PASSED] LVDS
[14:00:02] [PASSED] Component
[14:00:02] [PASSED] DIN
[14:00:02] [PASSED] DP
[14:00:02] [PASSED] HDMI-A
[14:00:02] [PASSED] HDMI-B
[14:00:02] [PASSED] TV
[14:00:02] [PASSED] eDP
[14:00:02] [PASSED] Virtual
[14:00:02] [PASSED] DSI
[14:00:02] [PASSED] DPI
[14:00:02] [PASSED] Writeback
[14:00:02] [PASSED] SPI
[14:00:02] [PASSED] USB
[14:00:02] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[14:00:02] ======== drm_test_drm_connector_dynamic_init_name  =========
[14:00:02] [PASSED] Unknown
[14:00:02] [PASSED] VGA
[14:00:02] [PASSED] DVI-I
[14:00:02] [PASSED] DVI-D
[14:00:02] [PASSED] DVI-A
[14:00:02] [PASSED] Composite
[14:00:02] [PASSED] SVIDEO
[14:00:02] [PASSED] LVDS
[14:00:02] [PASSED] Component
[14:00:02] [PASSED] DIN
[14:00:02] [PASSED] DP
[14:00:02] [PASSED] HDMI-A
[14:00:02] [PASSED] HDMI-B
[14:00:02] [PASSED] TV
[14:00:02] [PASSED] eDP
[14:00:02] [PASSED] Virtual
[14:00:02] [PASSED] DSI
[14:00:02] [PASSED] DPI
[14:00:02] [PASSED] Writeback
[14:00:02] [PASSED] SPI
[14:00:02] [PASSED] USB
[14:00:02] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[14:00:02] =========== [PASSED] drm_connector_dynamic_init ============
[14:00:02] ==== drm_connector_dynamic_register_early (4 subtests) =====
[14:00:02] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[14:00:02] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[14:00:02] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[14:00:02] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[14:00:02] ====== [PASSED] drm_connector_dynamic_register_early =======
[14:00:02] ======= drm_connector_dynamic_register (7 subtests) ========
[14:00:02] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[14:00:02] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[14:00:02] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[14:00:02] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[14:00:02] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[14:00:02] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[14:00:02] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[14:00:02] ========= [PASSED] drm_connector_dynamic_register ==========
[14:00:02] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[14:00:02] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[14:00:02] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[14:00:02] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[14:00:02] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[14:00:02] ========== drm_test_get_tv_mode_from_name_valid  ===========
[14:00:02] [PASSED] NTSC
[14:00:02] [PASSED] NTSC-443
[14:00:02] [PASSED] NTSC-J
[14:00:02] [PASSED] PAL
[14:00:02] [PASSED] PAL-M
[14:00:02] [PASSED] PAL-N
[14:00:02] [PASSED] SECAM
[14:00:02] [PASSED] Mono
[14:00:02] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[14:00:02] [PASSED] drm_test_get_tv_mode_from_name_truncated
[14:00:02] ============ [PASSED] drm_get_tv_mode_from_name ============
[14:00:02] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[14:00:02] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[14:00:02] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[14:00:02] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[14:00:02] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[14:00:02] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[14:00:02] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[14:00:02] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid  =
[14:00:02] [PASSED] VIC 96
[14:00:02] [PASSED] VIC 97
[14:00:02] [PASSED] VIC 101
[14:00:02] [PASSED] VIC 102
[14:00:02] [PASSED] VIC 106
[14:00:02] [PASSED] VIC 107
[14:00:02] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[14:00:02] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[14:00:02] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[14:00:02] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[14:00:02] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[14:00:02] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[14:00:02] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[14:00:02] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[14:00:02] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name  ====
[14:00:02] [PASSED] Automatic
[14:00:02] [PASSED] Full
[14:00:02] [PASSED] Limited 16:235
[14:00:02] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[14:00:02] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[14:00:02] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[14:00:02] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[14:00:02] === drm_test_drm_hdmi_connector_get_output_format_name  ====
[14:00:02] [PASSED] RGB
[14:00:02] [PASSED] YUV 4:2:0
[14:00:02] [PASSED] YUV 4:2:2
[14:00:02] [PASSED] YUV 4:4:4
[14:00:02] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[14:00:02] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[14:00:02] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[14:00:02] ============= drm_damage_helper (21 subtests) ==============
[14:00:02] [PASSED] drm_test_damage_iter_no_damage
[14:00:02] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[14:00:02] [PASSED] drm_test_damage_iter_no_damage_src_moved
[14:00:02] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[14:00:02] [PASSED] drm_test_damage_iter_no_damage_not_visible
[14:00:02] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[14:00:02] [PASSED] drm_test_damage_iter_no_damage_no_fb
[14:00:02] [PASSED] drm_test_damage_iter_simple_damage
[14:00:02] [PASSED] drm_test_damage_iter_single_damage
[14:00:02] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[14:00:02] [PASSED] drm_test_damage_iter_single_damage_outside_src
[14:00:02] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[14:00:02] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[14:00:02] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[14:00:02] [PASSED] drm_test_damage_iter_single_damage_src_moved
[14:00:02] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[14:00:02] [PASSED] drm_test_damage_iter_damage
[14:00:02] [PASSED] drm_test_damage_iter_damage_one_intersect
[14:00:02] [PASSED] drm_test_damage_iter_damage_one_outside
[14:00:02] [PASSED] drm_test_damage_iter_damage_src_moved
[14:00:02] [PASSED] drm_test_damage_iter_damage_not_visible
[14:00:02] ================ [PASSED] drm_damage_helper ================
[14:00:02] ============== drm_dp_mst_helper (3 subtests) ==============
[14:00:02] ============== drm_test_dp_mst_calc_pbn_mode  ==============
[14:00:02] [PASSED] Clock 154000 BPP 30 DSC disabled
[14:00:02] [PASSED] Clock 234000 BPP 30 DSC disabled
[14:00:02] [PASSED] Clock 297000 BPP 24 DSC disabled
[14:00:02] [PASSED] Clock 332880 BPP 24 DSC enabled
[14:00:02] [PASSED] Clock 324540 BPP 24 DSC enabled
[14:00:02] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[14:00:02] ============== drm_test_dp_mst_calc_pbn_div  ===============
[14:00:02] [PASSED] Link rate 2000000 lane count 4
[14:00:02] [PASSED] Link rate 2000000 lane count 2
[14:00:02] [PASSED] Link rate 2000000 lane count 1
[14:00:02] [PASSED] Link rate 1350000 lane count 4
[14:00:02] [PASSED] Link rate 1350000 lane count 2
[14:00:02] [PASSED] Link rate 1350000 lane count 1
[14:00:02] [PASSED] Link rate 1000000 lane count 4
[14:00:02] [PASSED] Link rate 1000000 lane count 2
[14:00:02] [PASSED] Link rate 1000000 lane count 1
[14:00:02] [PASSED] Link rate 810000 lane count 4
[14:00:02] [PASSED] Link rate 810000 lane count 2
[14:00:02] [PASSED] Link rate 810000 lane count 1
[14:00:02] [PASSED] Link rate 540000 lane count 4
[14:00:02] [PASSED] Link rate 540000 lane count 2
[14:00:02] [PASSED] Link rate 540000 lane count 1
[14:00:02] [PASSED] Link rate 270000 lane count 4
[14:00:02] [PASSED] Link rate 270000 lane count 2
[14:00:02] [PASSED] Link rate 270000 lane count 1
[14:00:02] [PASSED] Link rate 162000 lane count 4
[14:00:02] [PASSED] Link rate 162000 lane count 2
[14:00:02] [PASSED] Link rate 162000 lane count 1
[14:00:02] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[14:00:02] ========= drm_test_dp_mst_sideband_msg_req_decode  =========
[14:00:02] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[14:00:02] [PASSED] DP_POWER_UP_PHY with port number
[14:00:02] [PASSED] DP_POWER_DOWN_PHY with port number
[14:00:02] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[14:00:02] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[14:00:02] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[14:00:02] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[14:00:02] [PASSED] DP_QUERY_PAYLOAD with port number
[14:00:02] [PASSED] DP_QUERY_PAYLOAD with VCPI
[14:00:02] [PASSED] DP_REMOTE_DPCD_READ with port number
[14:00:02] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[14:00:02] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[14:00:02] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[14:00:02] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[14:00:02] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[14:00:02] [PASSED] DP_REMOTE_I2C_READ with port number
[14:00:02] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[14:00:02] [PASSED] DP_REMOTE_I2C_READ with transactions array
[14:00:02] [PASSED] DP_REMOTE_I2C_WRITE with port number
[14:00:02] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[14:00:02] [PASSED] DP_REMOTE_I2C_WRITE with data array
[14:00:02] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[14:00:02] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[14:00:02] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[14:00:02] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[14:00:02] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[14:00:02] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[14:00:02] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[14:00:02] ================ [PASSED] drm_dp_mst_helper ================
[14:00:02] ================== drm_exec (7 subtests) ===================
[14:00:02] [PASSED] sanitycheck
[14:00:02] [PASSED] test_lock
[14:00:02] [PASSED] test_lock_unlock
[14:00:02] [PASSED] test_duplicates
[14:00:02] [PASSED] test_prepare
[14:00:02] [PASSED] test_prepare_array
[14:00:02] [PASSED] test_multiple_loops
[14:00:02] ==================== [PASSED] drm_exec =====================
[14:00:02] =========== drm_format_helper_test (17 subtests) ===========
[14:00:02] ============== drm_test_fb_xrgb8888_to_gray8  ==============
[14:00:02] [PASSED] single_pixel_source_buffer
[14:00:02] [PASSED] single_pixel_clip_rectangle
[14:00:02] [PASSED] well_known_colors
[14:00:02] [PASSED] destination_pitch
[14:00:02] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[14:00:02] ============= drm_test_fb_xrgb8888_to_rgb332  ==============
[14:00:02] [PASSED] single_pixel_source_buffer
[14:00:02] [PASSED] single_pixel_clip_rectangle
[14:00:02] [PASSED] well_known_colors
[14:00:02] [PASSED] destination_pitch
[14:00:02] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[14:00:02] ============= drm_test_fb_xrgb8888_to_rgb565  ==============
[14:00:02] [PASSED] single_pixel_source_buffer
[14:00:02] [PASSED] single_pixel_clip_rectangle
[14:00:02] [PASSED] well_known_colors
[14:00:02] [PASSED] destination_pitch
[14:00:02] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[14:00:02] ============ drm_test_fb_xrgb8888_to_xrgb1555  =============
[14:00:02] [PASSED] single_pixel_source_buffer
[14:00:02] [PASSED] single_pixel_clip_rectangle
[14:00:02] [PASSED] well_known_colors
[14:00:02] [PASSED] destination_pitch
[14:00:02] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[14:00:02] ============ drm_test_fb_xrgb8888_to_argb1555  =============
[14:00:02] [PASSED] single_pixel_source_buffer
[14:00:02] [PASSED] single_pixel_clip_rectangle
[14:00:02] [PASSED] well_known_colors
[14:00:02] [PASSED] destination_pitch
[14:00:02] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[14:00:02] ============ drm_test_fb_xrgb8888_to_rgba5551  =============
[14:00:02] [PASSED] single_pixel_source_buffer
[14:00:02] [PASSED] single_pixel_clip_rectangle
[14:00:02] [PASSED] well_known_colors
[14:00:02] [PASSED] destination_pitch
[14:00:02] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[14:00:02] ============= drm_test_fb_xrgb8888_to_rgb888  ==============
[14:00:02] [PASSED] single_pixel_source_buffer
[14:00:02] [PASSED] single_pixel_clip_rectangle
[14:00:02] [PASSED] well_known_colors
[14:00:02] [PASSED] destination_pitch
[14:00:02] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[14:00:02] ============= drm_test_fb_xrgb8888_to_bgr888  ==============
[14:00:02] [PASSED] single_pixel_source_buffer
[14:00:02] [PASSED] single_pixel_clip_rectangle
[14:00:02] [PASSED] well_known_colors
[14:00:02] [PASSED] destination_pitch
[14:00:02] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[14:00:02] ============ drm_test_fb_xrgb8888_to_argb8888  =============
[14:00:02] [PASSED] single_pixel_source_buffer
[14:00:02] [PASSED] single_pixel_clip_rectangle
[14:00:02] [PASSED] well_known_colors
[14:00:02] [PASSED] destination_pitch
[14:00:02] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[14:00:02] =========== drm_test_fb_xrgb8888_to_xrgb2101010  ===========
[14:00:02] [PASSED] single_pixel_source_buffer
[14:00:02] [PASSED] single_pixel_clip_rectangle
[14:00:02] [PASSED] well_known_colors
[14:00:02] [PASSED] destination_pitch
[14:00:02] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[14:00:02] =========== drm_test_fb_xrgb8888_to_argb2101010  ===========
[14:00:02] [PASSED] single_pixel_source_buffer
[14:00:02] [PASSED] single_pixel_clip_rectangle
[14:00:02] [PASSED] well_known_colors
[14:00:02] [PASSED] destination_pitch
[14:00:02] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[14:00:02] ============== drm_test_fb_xrgb8888_to_mono  ===============
[14:00:02] [PASSED] single_pixel_source_buffer
[14:00:02] [PASSED] single_pixel_clip_rectangle
[14:00:02] [PASSED] well_known_colors
[14:00:02] [PASSED] destination_pitch
[14:00:02] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[14:00:02] ==================== drm_test_fb_swab  =====================
[14:00:02] [PASSED] single_pixel_source_buffer
[14:00:02] [PASSED] single_pixel_clip_rectangle
[14:00:02] [PASSED] well_known_colors
[14:00:02] [PASSED] destination_pitch
[14:00:02] ================ [PASSED] drm_test_fb_swab =================
[14:00:02] ============ drm_test_fb_xrgb8888_to_xbgr8888  =============
[14:00:02] [PASSED] single_pixel_source_buffer
[14:00:02] [PASSED] single_pixel_clip_rectangle
[14:00:02] [PASSED] well_known_colors
[14:00:02] [PASSED] destination_pitch
[14:00:02] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[14:00:02] ============ drm_test_fb_xrgb8888_to_abgr8888  =============
[14:00:02] [PASSED] single_pixel_source_buffer
[14:00:02] [PASSED] single_pixel_clip_rectangle
[14:00:02] [PASSED] well_known_colors
[14:00:02] [PASSED] destination_pitch
[14:00:02] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[14:00:02] ================= drm_test_fb_clip_offset  =================
[14:00:02] [PASSED] pass through
[14:00:02] [PASSED] horizontal offset
[14:00:02] [PASSED] vertical offset
[14:00:02] [PASSED] horizontal and vertical offset
[14:00:02] [PASSED] horizontal offset (custom pitch)
[14:00:02] [PASSED] vertical offset (custom pitch)
[14:00:02] [PASSED] horizontal and vertical offset (custom pitch)
[14:00:02] ============= [PASSED] drm_test_fb_clip_offset =============
[14:00:02] =================== drm_test_fb_memcpy  ====================
[14:00:02] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[14:00:02] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[14:00:02] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[14:00:02] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[14:00:02] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[14:00:02] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[14:00:02] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[14:00:02] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[14:00:02] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[14:00:02] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[14:00:02] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[14:00:02] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[14:00:02] =============== [PASSED] drm_test_fb_memcpy ================
[14:00:02] ============= [PASSED] drm_format_helper_test ==============
[14:00:02] ================= drm_format (18 subtests) =================
[14:00:02] [PASSED] drm_test_format_block_width_invalid
[14:00:02] [PASSED] drm_test_format_block_width_one_plane
[14:00:02] [PASSED] drm_test_format_block_width_two_plane
[14:00:02] [PASSED] drm_test_format_block_width_three_plane
[14:00:02] [PASSED] drm_test_format_block_width_tiled
[14:00:02] [PASSED] drm_test_format_block_height_invalid
[14:00:02] [PASSED] drm_test_format_block_height_one_plane
[14:00:02] [PASSED] drm_test_format_block_height_two_plane
[14:00:02] [PASSED] drm_test_format_block_height_three_plane
[14:00:02] [PASSED] drm_test_format_block_height_tiled
[14:00:02] [PASSED] drm_test_format_min_pitch_invalid
[14:00:02] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[14:00:02] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[14:00:02] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[14:00:02] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[14:00:02] [PASSED] drm_test_format_min_pitch_two_plane
[14:00:02] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[14:00:02] [PASSED] drm_test_format_min_pitch_tiled
[14:00:02] =================== [PASSED] drm_format ====================
[14:00:02] ============== drm_framebuffer (10 subtests) ===============
[14:00:02] ========== drm_test_framebuffer_check_src_coords  ==========
[14:00:02] [PASSED] Success: source fits into fb
[14:00:02] [PASSED] Fail: overflowing fb with x-axis coordinate
[14:00:02] [PASSED] Fail: overflowing fb with y-axis coordinate
[14:00:02] [PASSED] Fail: overflowing fb with source width
[14:00:02] [PASSED] Fail: overflowing fb with source height
[14:00:02] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[14:00:02] [PASSED] drm_test_framebuffer_cleanup
[14:00:02] =============== drm_test_framebuffer_create  ===============
[14:00:02] [PASSED] ABGR8888 normal sizes
[14:00:02] [PASSED] ABGR8888 max sizes
[14:00:02] [PASSED] ABGR8888 pitch greater than min required
[14:00:02] [PASSED] ABGR8888 pitch less than min required
[14:00:02] [PASSED] ABGR8888 Invalid width
[14:00:02] [PASSED] ABGR8888 Invalid buffer handle
[14:00:02] [PASSED] No pixel format
[14:00:02] [PASSED] ABGR8888 Width 0
[14:00:02] [PASSED] ABGR8888 Height 0
[14:00:02] [PASSED] ABGR8888 Out of bound height * pitch combination
[14:00:02] [PASSED] ABGR8888 Large buffer offset
[14:00:02] [PASSED] ABGR8888 Buffer offset for inexistent plane
[14:00:02] [PASSED] ABGR8888 Invalid flag
[14:00:02] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[14:00:02] [PASSED] ABGR8888 Valid buffer modifier
[14:00:02] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[14:00:02] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[14:00:02] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[14:00:02] [PASSED] NV12 Normal sizes
[14:00:02] [PASSED] NV12 Max sizes
[14:00:02] [PASSED] NV12 Invalid pitch
[14:00:02] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[14:00:02] [PASSED] NV12 different  modifier per-plane
[14:00:02] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[14:00:02] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[14:00:02] [PASSED] NV12 Modifier for inexistent plane
[14:00:02] [PASSED] NV12 Handle for inexistent plane
[14:00:02] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[14:00:02] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[14:00:02] [PASSED] YVU420 Normal sizes
[14:00:02] [PASSED] YVU420 Max sizes
[14:00:02] [PASSED] YVU420 Invalid pitch
[14:00:02] [PASSED] YVU420 Different pitches
[14:00:02] [PASSED] YVU420 Different buffer offsets/pitches
[14:00:02] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[14:00:02] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[14:00:02] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[14:00:02] [PASSED] YVU420 Valid modifier
[14:00:02] [PASSED] YVU420 Different modifiers per plane
[14:00:02] [PASSED] YVU420 Modifier for inexistent plane
[14:00:02] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[14:00:02] [PASSED] X0L2 Normal sizes
[14:00:02] [PASSED] X0L2 Max sizes
[14:00:02] [PASSED] X0L2 Invalid pitch
[14:00:02] [PASSED] X0L2 Pitch greater than minimum required
[14:00:02] [PASSED] X0L2 Handle for inexistent plane
[14:00:02] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[14:00:02] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[14:00:02] [PASSED] X0L2 Valid modifier
[14:00:02] [PASSED] X0L2 Modifier for inexistent plane
[14:00:02] =========== [PASSED] drm_test_framebuffer_create ===========
[14:00:02] [PASSED] drm_test_framebuffer_free
[14:00:02] [PASSED] drm_test_framebuffer_init
[14:00:02] [PASSED] drm_test_framebuffer_init_bad_format
[14:00:02] [PASSED] drm_test_framebuffer_init_dev_mismatch
[14:00:02] [PASSED] drm_test_framebuffer_lookup
[14:00:02] [PASSED] drm_test_framebuffer_lookup_inexistent
[14:00:02] [PASSED] drm_test_framebuffer_modifiers_not_supported
[14:00:02] ================= [PASSED] drm_framebuffer =================
[14:00:02] ================ drm_gem_shmem (8 subtests) ================
[14:00:02] [PASSED] drm_gem_shmem_test_obj_create
[14:00:02] [PASSED] drm_gem_shmem_test_obj_create_private
[14:00:02] [PASSED] drm_gem_shmem_test_pin_pages
[14:00:02] [PASSED] drm_gem_shmem_test_vmap
[14:00:02] [PASSED] drm_gem_shmem_test_get_pages_sgt
[14:00:02] [PASSED] drm_gem_shmem_test_get_sg_table
[14:00:02] [PASSED] drm_gem_shmem_test_madvise
[14:00:02] [PASSED] drm_gem_shmem_test_purge
[14:00:02] ================== [PASSED] drm_gem_shmem ==================
[14:00:02] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[14:00:02] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[14:00:02] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[14:00:02] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[14:00:02] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[14:00:02] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[14:00:02] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[14:00:02] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420  =======
[14:00:02] [PASSED] Automatic
[14:00:02] [PASSED] Full
[14:00:02] [PASSED] Limited 16:235
[14:00:02] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[14:00:02] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[14:00:02] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[14:00:02] [PASSED] drm_test_check_disable_connector
[14:00:02] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[14:00:02] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[14:00:02] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[14:00:02] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[14:00:02] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[14:00:02] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[14:00:02] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[14:00:02] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[14:00:02] [PASSED] drm_test_check_output_bpc_dvi
[14:00:02] [PASSED] drm_test_check_output_bpc_format_vic_1
[14:00:02] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[14:00:02] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[14:00:02] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[14:00:02] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[14:00:02] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[14:00:02] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[14:00:02] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[14:00:02] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[14:00:02] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[14:00:02] [PASSED] drm_test_check_broadcast_rgb_value
[14:00:02] [PASSED] drm_test_check_bpc_8_value
[14:00:02] [PASSED] drm_test_check_bpc_10_value
[14:00:02] [PASSED] drm_test_check_bpc_12_value
[14:00:02] [PASSED] drm_test_check_format_value
[14:00:02] [PASSED] drm_test_check_tmds_char_value
[14:00:02] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[14:00:02] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[14:00:02] [PASSED] drm_test_check_mode_valid
[14:00:02] [PASSED] drm_test_check_mode_valid_reject
[14:00:02] [PASSED] drm_test_check_mode_valid_reject_rate
[14:00:02] [PASSED] drm_test_check_mode_valid_reject_max_clock
[14:00:02] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[14:00:02] ================= drm_managed (2 subtests) =================
[14:00:02] [PASSED] drm_test_managed_release_action
[14:00:02] [PASSED] drm_test_managed_run_action
[14:00:02] =================== [PASSED] drm_managed ===================
[14:00:02] =================== drm_mm (6 subtests) ====================
[14:00:02] [PASSED] drm_test_mm_init
[14:00:02] [PASSED] drm_test_mm_debug
[14:00:02] [PASSED] drm_test_mm_align32
[14:00:02] [PASSED] drm_test_mm_align64
[14:00:02] [PASSED] drm_test_mm_lowest
[14:00:02] [PASSED] drm_test_mm_highest
[14:00:02] ===================== [PASSED] drm_mm ======================
[14:00:02] ============= drm_modes_analog_tv (5 subtests) =============
[14:00:02] [PASSED] drm_test_modes_analog_tv_mono_576i
[14:00:02] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[14:00:02] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[14:00:02] [PASSED] drm_test_modes_analog_tv_pal_576i
[14:00:02] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[14:00:02] =============== [PASSED] drm_modes_analog_tv ===============
[14:00:02] ============== drm_plane_helper (2 subtests) ===============
[14:00:02] =============== drm_test_check_plane_state  ================
[14:00:02] [PASSED] clipping_simple
[14:00:02] [PASSED] clipping_rotate_reflect
[14:00:02] [PASSED] positioning_simple
[14:00:02] [PASSED] upscaling
[14:00:02] [PASSED] downscaling
[14:00:02] [PASSED] rounding1
[14:00:02] [PASSED] rounding2
[14:00:02] [PASSED] rounding3
[14:00:02] [PASSED] rounding4
[14:00:02] =========== [PASSED] drm_test_check_plane_state ============
[14:00:02] =========== drm_test_check_invalid_plane_state  ============
[14:00:02] [PASSED] positioning_invalid
[14:00:02] [PASSED] upscaling_invalid
[14:00:02] [PASSED] downscaling_invalid
[14:00:02] ======= [PASSED] drm_test_check_invalid_plane_state ========
[14:00:02] ================ [PASSED] drm_plane_helper =================
[14:00:02] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[14:00:02] ====== drm_test_connector_helper_tv_get_modes_check  =======
[14:00:02] [PASSED] None
[14:00:02] [PASSED] PAL
[14:00:02] [PASSED] NTSC
[14:00:02] [PASSED] Both, NTSC Default
[14:00:02] [PASSED] Both, PAL Default
[14:00:02] [PASSED] Both, NTSC Default, with PAL on command-line
[14:00:02] [PASSED] Both, PAL Default, with NTSC on command-line
[14:00:02] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[14:00:02] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[14:00:02] ================== drm_rect (9 subtests) ===================
[14:00:02] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[14:00:02] [PASSED] drm_test_rect_clip_scaled_not_clipped
[14:00:02] [PASSED] drm_test_rect_clip_scaled_clipped
[14:00:02] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[14:00:02] ================= drm_test_rect_intersect  =================
[14:00:02] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[14:00:02] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[14:00:02] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[14:00:02] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[14:00:02] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[14:00:02] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[14:00:02] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[14:00:02] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[14:00:02] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[14:00:02] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[14:00:02] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[14:00:02] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[14:00:02] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[14:00:02] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[14:00:02] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[14:00:02] ============= [PASSED] drm_test_rect_intersect =============
[14:00:02] ================ drm_test_rect_calc_hscale  ================
[14:00:02] [PASSED] normal use
[14:00:02] [PASSED] out of max range
[14:00:02] [PASSED] out of min range
[14:00:02] [PASSED] zero dst
[14:00:02] [PASSED] negative src
[14:00:02] [PASSED] negative dst
[14:00:02] ============ [PASSED] drm_test_rect_calc_hscale ============
[14:00:02] ================ drm_test_rect_calc_vscale  ================
[14:00:02] [PASSED] normal use
[14:00:02] [PASSED] out of max range
[14:00:02] [PASSED] out of min range
[14:00:02] [PASSED] zero dst
[14:00:02] [PASSED] negative src
[14:00:02] [PASSED] negative dst
[14:00:02] ============ [PASSED] drm_test_rect_calc_vscale ============
[14:00:02] ================== drm_test_rect_rotate  ===================
[14:00:02] [PASSED] reflect-x
[14:00:02] [PASSED] reflect-y
[14:00:02] [PASSED] rotate-0
[14:00:02] [PASSED] rotate-90
[14:00:02] [PASSED] rotate-180
[14:00:02] [PASSED] rotate-270
stty: 'standard input': Inappropriate ioctl for device
[14:00:02] ============== [PASSED] drm_test_rect_rotate ===============
[14:00:02] ================ drm_test_rect_rotate_inv  =================
[14:00:02] [PASSED] reflect-x
[14:00:02] [PASSED] reflect-y
[14:00:02] [PASSED] rotate-0
[14:00:02] [PASSED] rotate-90
[14:00:02] [PASSED] rotate-180
[14:00:02] [PASSED] rotate-270
[14:00:02] ============ [PASSED] drm_test_rect_rotate_inv =============
[14:00:02] ==================== [PASSED] drm_rect =====================
[14:00:02] ============ drm_sysfb_modeset_test (1 subtest) ============
[14:00:02] ============ drm_test_sysfb_build_fourcc_list  =============
[14:00:02] [PASSED] no native formats
[14:00:02] [PASSED] XRGB8888 as native format
[14:00:02] [PASSED] remove duplicates
[14:00:02] [PASSED] convert alpha formats
[14:00:02] [PASSED] random formats
[14:00:02] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[14:00:02] ============= [PASSED] drm_sysfb_modeset_test ==============
[14:00:02] ============================================================
[14:00:02] Testing complete. Ran 616 tests: passed: 616
[14:00:02] Elapsed time: 23.384s total, 1.710s configuring, 21.506s building, 0.144s running

+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[14:00:02] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[14:00:03] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=48
[14:00:11] Starting KUnit Kernel (1/1)...
[14:00:11] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[14:00:11] ================= ttm_device (5 subtests) ==================
[14:00:11] [PASSED] ttm_device_init_basic
[14:00:11] [PASSED] ttm_device_init_multiple
[14:00:11] [PASSED] ttm_device_fini_basic
[14:00:11] [PASSED] ttm_device_init_no_vma_man
[14:00:11] ================== ttm_device_init_pools  ==================
[14:00:11] [PASSED] No DMA allocations, no DMA32 required
[14:00:11] [PASSED] DMA allocations, DMA32 required
[14:00:11] [PASSED] No DMA allocations, DMA32 required
[14:00:11] [PASSED] DMA allocations, no DMA32 required
[14:00:11] ============== [PASSED] ttm_device_init_pools ==============
[14:00:11] =================== [PASSED] ttm_device ====================
[14:00:11] ================== ttm_pool (8 subtests) ===================
[14:00:11] ================== ttm_pool_alloc_basic  ===================
[14:00:11] [PASSED] One page
[14:00:11] [PASSED] More than one page
[14:00:11] [PASSED] Above the allocation limit
[14:00:11] [PASSED] One page, with coherent DMA mappings enabled
[14:00:11] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[14:00:11] ============== [PASSED] ttm_pool_alloc_basic ===============
[14:00:11] ============== ttm_pool_alloc_basic_dma_addr  ==============
[14:00:11] [PASSED] One page
[14:00:11] [PASSED] More than one page
[14:00:11] [PASSED] Above the allocation limit
[14:00:11] [PASSED] One page, with coherent DMA mappings enabled
[14:00:11] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[14:00:11] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[14:00:11] [PASSED] ttm_pool_alloc_order_caching_match
[14:00:11] [PASSED] ttm_pool_alloc_caching_mismatch
[14:00:11] [PASSED] ttm_pool_alloc_order_mismatch
[14:00:11] [PASSED] ttm_pool_free_dma_alloc
[14:00:11] [PASSED] ttm_pool_free_no_dma_alloc
[14:00:11] [PASSED] ttm_pool_fini_basic
[14:00:11] ==================== [PASSED] ttm_pool =====================
[14:00:11] ================ ttm_resource (8 subtests) =================
[14:00:11] ================= ttm_resource_init_basic  =================
[14:00:11] [PASSED] Init resource in TTM_PL_SYSTEM
[14:00:11] [PASSED] Init resource in TTM_PL_VRAM
[14:00:11] [PASSED] Init resource in a private placement
[14:00:11] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[14:00:11] ============= [PASSED] ttm_resource_init_basic =============
[14:00:11] [PASSED] ttm_resource_init_pinned
[14:00:11] [PASSED] ttm_resource_fini_basic
[14:00:11] [PASSED] ttm_resource_manager_init_basic
[14:00:11] [PASSED] ttm_resource_manager_usage_basic
[14:00:11] [PASSED] ttm_resource_manager_set_used_basic
[14:00:11] [PASSED] ttm_sys_man_alloc_basic
[14:00:11] [PASSED] ttm_sys_man_free_basic
[14:00:11] ================== [PASSED] ttm_resource ===================
[14:00:11] =================== ttm_tt (15 subtests) ===================
[14:00:11] ==================== ttm_tt_init_basic  ====================
[14:00:11] [PASSED] Page-aligned size
[14:00:11] [PASSED] Extra pages requested
[14:00:11] ================ [PASSED] ttm_tt_init_basic ================
[14:00:11] [PASSED] ttm_tt_init_misaligned
[14:00:11] [PASSED] ttm_tt_fini_basic
[14:00:11] [PASSED] ttm_tt_fini_sg
[14:00:11] [PASSED] ttm_tt_fini_shmem
[14:00:11] [PASSED] ttm_tt_create_basic
[14:00:11] [PASSED] ttm_tt_create_invalid_bo_type
[14:00:11] [PASSED] ttm_tt_create_ttm_exists
[14:00:11] [PASSED] ttm_tt_create_failed
[14:00:11] [PASSED] ttm_tt_destroy_basic
[14:00:11] [PASSED] ttm_tt_populate_null_ttm
[14:00:11] [PASSED] ttm_tt_populate_populated_ttm
[14:00:11] [PASSED] ttm_tt_unpopulate_basic
[14:00:11] [PASSED] ttm_tt_unpopulate_empty_ttm
[14:00:11] [PASSED] ttm_tt_swapin_basic
[14:00:11] ===================== [PASSED] ttm_tt ======================
[14:00:11] =================== ttm_bo (14 subtests) ===================
[14:00:11] =========== ttm_bo_reserve_optimistic_no_ticket  ===========
[14:00:11] [PASSED] Cannot be interrupted and sleeps
[14:00:11] [PASSED] Cannot be interrupted, locks straight away
[14:00:11] [PASSED] Can be interrupted, sleeps
[14:00:11] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[14:00:11] [PASSED] ttm_bo_reserve_locked_no_sleep
[14:00:11] [PASSED] ttm_bo_reserve_no_wait_ticket
[14:00:11] [PASSED] ttm_bo_reserve_double_resv
[14:00:11] [PASSED] ttm_bo_reserve_interrupted
[14:00:11] [PASSED] ttm_bo_reserve_deadlock
[14:00:11] [PASSED] ttm_bo_unreserve_basic
[14:00:11] [PASSED] ttm_bo_unreserve_pinned
[14:00:11] [PASSED] ttm_bo_unreserve_bulk
[14:00:11] [PASSED] ttm_bo_put_basic
[14:00:11] [PASSED] ttm_bo_put_shared_resv
[14:00:11] [PASSED] ttm_bo_pin_basic
[14:00:11] [PASSED] ttm_bo_pin_unpin_resource
[14:00:11] [PASSED] ttm_bo_multiple_pin_one_unpin
[14:00:11] ===================== [PASSED] ttm_bo ======================
[14:00:11] ============== ttm_bo_validate (21 subtests) ===============
[14:00:11] ============== ttm_bo_init_reserved_sys_man  ===============
[14:00:11] [PASSED] Buffer object for userspace
[14:00:11] [PASSED] Kernel buffer object
[14:00:11] [PASSED] Shared buffer object
[14:00:11] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[14:00:11] ============== ttm_bo_init_reserved_mock_man  ==============
[14:00:11] [PASSED] Buffer object for userspace
[14:00:11] [PASSED] Kernel buffer object
[14:00:11] [PASSED] Shared buffer object
[14:00:11] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[14:00:11] [PASSED] ttm_bo_init_reserved_resv
[14:00:11] ================== ttm_bo_validate_basic  ==================
[14:00:11] [PASSED] Buffer object for userspace
[14:00:11] [PASSED] Kernel buffer object
[14:00:11] [PASSED] Shared buffer object
[14:00:11] ============== [PASSED] ttm_bo_validate_basic ==============
[14:00:11] [PASSED] ttm_bo_validate_invalid_placement
[14:00:11] ============= ttm_bo_validate_same_placement  ==============
[14:00:11] [PASSED] System manager
[14:00:11] [PASSED] VRAM manager
[14:00:11] ========= [PASSED] ttm_bo_validate_same_placement ==========
[14:00:11] [PASSED] ttm_bo_validate_failed_alloc
[14:00:11] [PASSED] ttm_bo_validate_pinned
[14:00:11] [PASSED] ttm_bo_validate_busy_placement
[14:00:11] ================ ttm_bo_validate_multihop  =================
[14:00:11] [PASSED] Buffer object for userspace
[14:00:11] [PASSED] Kernel buffer object
[14:00:11] [PASSED] Shared buffer object
[14:00:11] ============ [PASSED] ttm_bo_validate_multihop =============
[14:00:11] ========== ttm_bo_validate_no_placement_signaled  ==========
[14:00:11] [PASSED] Buffer object in system domain, no page vector
[14:00:11] [PASSED] Buffer object in system domain with an existing page vector
[14:00:11] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[14:00:11] ======== ttm_bo_validate_no_placement_not_signaled  ========
[14:00:11] [PASSED] Buffer object for userspace
[14:00:11] [PASSED] Kernel buffer object
[14:00:11] [PASSED] Shared buffer object
[14:00:11] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[14:00:11] [PASSED] ttm_bo_validate_move_fence_signaled
[14:00:11] ========= ttm_bo_validate_move_fence_not_signaled  =========
[14:00:11] [PASSED] Waits for GPU
[14:00:11] [PASSED] Tries to lock straight away
[14:00:11] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[14:00:11] [PASSED] ttm_bo_validate_happy_evict
[14:00:11] [PASSED] ttm_bo_validate_all_pinned_evict
[14:00:11] [PASSED] ttm_bo_validate_allowed_only_evict
[14:00:11] [PASSED] ttm_bo_validate_deleted_evict
[14:00:11] [PASSED] ttm_bo_validate_busy_domain_evict
[14:00:11] [PASSED] ttm_bo_validate_evict_gutting
[14:00:11] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[14:00:11] ================= [PASSED] ttm_bo_validate =================
[14:00:11] ============================================================
[14:00:11] Testing complete. Ran 101 tests: passed: 101
[14:00:11] Elapsed time: 9.656s total, 1.642s configuring, 7.798s building, 0.180s running

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✗ CI.checksparse: warning for Multi-pass MMU interval notifiers

[Patchwork]

== Series Details ==

Series: Multi-pass MMU interval notifiers
URL   : https://patchwork.freedesktop.org/series/152725/
State : warning

== Summary ==

+ trap cleanup EXIT
+ KERNEL=/kernel
+ MT=/root/linux/maintainer-tools
+ git clone https://gitlab.freedesktop.org/drm/maintainer-tools /root/linux/maintainer-tools
Cloning into '/root/linux/maintainer-tools'...
warning: redirecting to https://gitlab.freedesktop.org/drm/maintainer-tools.git/
+ make -C /root/linux/maintainer-tools
make: Entering directory '/root/linux/maintainer-tools'
cc -O2 -g -Wextra -o remap-log remap-log.c
make: Leaving directory '/root/linux/maintainer-tools'
+ cd /kernel
+ git config --global --add safe.directory /kernel
+ /root/linux/maintainer-tools/dim sparse --fast 0a2be3731268a69a6452047c2fb6699ee19afe5b
Sparse version: 0.6.4 (Ubuntu: 0.6.4-4ubuntu3)
Fast mode used, each commit won't be checked separately.
-
+drivers/gpu/drm/drm_drv.c:449:6: warning: context imbalance in 'drm_dev_enter' - different lock contexts for basic block
+drivers/gpu/drm/drm_drv.c: note: in included file (through include/linux/notifier.h, arch/x86/include/asm/uprobes.h, include/linux/uprobes.h, include/linux/mm_types.h, include/linux/mmzone.h, include/linux/gfp.h, ...):
+drivers/gpu/drm/drm_plane.c:213:24: warning: Using plain integer as NULL pointer
+drivers/gpu/drm/i915/display/intel_alpm.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_cdclk.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_ddi.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_display_types.h:2018:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2018:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2018:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2018:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2018:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2018:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2018:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2018:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2018:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2018:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2018:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2018:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2018:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2018:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2018:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2018:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2031:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2031:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_display_types.h:2031:24: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/display/intel_hdcp.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_hotplug.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_pps.c: note: in included file:
+drivers/gpu/drm/i915/display/intel_psr.c: note: in included file:
+drivers/gpu/drm/i915/gt/intel_reset.c:1572:12: warning: context imbalance in '_intel_gt_reset_lock' - different lock contexts for basic block
+drivers/gpu/drm/i915/gt/intel_sseu.c:598:17: error: too long token expansion
+drivers/gpu/drm/i915/i915_active.c:1063:16: warning: context imbalance in '__i915_active_fence_set' - different lock contexts for basic block
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: error: incompatible types in comparison expression (different address spaces):
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: error: incompatible types in comparison expression (different address spaces):
+drivers/gpu/drm/i915/i915_drm_client.c:92:9:    expected struct list_head const *list
+drivers/gpu/drm/i915/i915_drm_client.c:92:9:    got struct list_head [noderef] __rcu *pos
+drivers/gpu/drm/i915/i915_drm_client.c:92:9:    struct list_head *
+drivers/gpu/drm/i915/i915_drm_client.c:92:9:    struct list_head *
+drivers/gpu/drm/i915/i915_drm_client.c:92:9:    struct list_head [noderef] __rcu *
+drivers/gpu/drm/i915/i915_drm_client.c:92:9:    struct list_head [noderef] __rcu *
+drivers/gpu/drm/i915/i915_drm_client.c:92:9: warning: incorrect type in argument 1 (different address spaces)
+drivers/gpu/drm/i915/i915_irq.c:492:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:492:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:500:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:500:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:505:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:505:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:505:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:543:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:543:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:551:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:551:16: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:556:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:556:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:556:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:600:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:600:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:603:15: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:603:15: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:607:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:607:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:614:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:614:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:614:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/i915_irq.c:614:9: warning: unreplaced symbol '<noident>'
+drivers/gpu/drm/i915/intel_uncore.c:1927:1: warning: context imbalance in 'fwtable_read8' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1928:1: warning: context imbalance in 'fwtable_read16' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1929:1: warning: context imbalance in 'fwtable_read32' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1930:1: warning: context imbalance in 'fwtable_read64' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1995:1: warning: context imbalance in 'gen6_write8' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1996:1: warning: context imbalance in 'gen6_write16' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:1997:1: warning: context imbalance in 'gen6_write32' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2017:1: warning: context imbalance in 'fwtable_write8' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2018:1: warning: context imbalance in 'fwtable_write16' - unexpected unlock
+drivers/gpu/drm/i915/intel_uncore.c:2019:1: warning: context imbalance in 'fwtable_write32' - unexpected unlock
+drivers/gpu/drm/i915/intel_wakeref.c:145:19: warning: context imbalance in 'wakeref_auto_timeout' - unexpected unlock
+drivers/gpu/drm/ttm/ttm_bo.c:1199:31: warning: symbol 'ttm_swap_ops' was not declared. Should it be static?
+drivers/gpu/drm/ttm/ttm_bo_util.c:329:38:    expected void *virtual
+drivers/gpu/drm/ttm/ttm_bo_util.c:329:38:    got void [noderef] __iomem *
+drivers/gpu/drm/ttm/ttm_bo_util.c:329:38: warning: incorrect type in assignment (different address spaces)
+drivers/gpu/drm/ttm/ttm_bo_util.c:332:38:    expected void *virtual
+drivers/gpu/drm/ttm/ttm_bo_util.c:332:38:    got void [noderef] __iomem *
+drivers/gpu/drm/ttm/ttm_bo_util.c:332:38: warning: incorrect type in assignment (different address spaces)
+drivers/gpu/drm/ttm/ttm_bo_util.c:335:38:    expected void *virtual
+drivers/gpu/drm/ttm/ttm_bo_util.c:335:38:    got void [noderef] __iomem *
+drivers/gpu/drm/ttm/ttm_bo_util.c:335:38: warning: incorrect type in assignment (different address spaces)
+drivers/gpu/drm/ttm/ttm_bo_util.c:467:28:    expected void volatile [noderef] __iomem *addr
+drivers/gpu/drm/ttm/ttm_bo_util.c:467:28:    got void *virtual
+drivers/gpu/drm/ttm/ttm_bo_util.c:467:28: warning: incorrect type in argument 1 (different address spaces)
+./include/linux/srcu.h:400:9: warning: context imbalance in 'drm_dev_exit' - unexpected unlock

+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel

✓ Xe.CI.BAT: success for Multi-pass MMU interval notifiers

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 1680 bytes --]

== Series Details ==

Series: Multi-pass MMU interval notifiers
URL   : https://patchwork.freedesktop.org/series/152725/
State : success

== Summary ==

CI Bug Log - changes from xe-3521-5e2776589ef98e25137723141a47efc3f977e406_BAT -> xe-pw-152725v1_BAT
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (11 -> 9)
------------------------------

  Missing    (2): bat-adlp-vm bat-ptl-vm 

Known issues
------------

  Here are the changes found in xe-pw-152725v1_BAT that come from known issues:

### IGT changes ###

#### Possible fixes ####

  * igt@xe_vm@bind-execqueues-independent:
    - {bat-ptl-1}:        [FAIL][1] ([Intel XE#5783]) -> [PASS][2]
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/bat-ptl-1/igt@xe_vm@bind-execqueues-independent.html
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/bat-ptl-1/igt@xe_vm@bind-execqueues-independent.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#5783]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5783


Build changes
-------------

  * Linux: xe-3521-5e2776589ef98e25137723141a47efc3f977e406 -> xe-pw-152725v1

  IGT_8489: 4972020ea0f3d0ac8a0d7dd4f5419119b1b30995 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-3521-5e2776589ef98e25137723141a47efc3f977e406: 5e2776589ef98e25137723141a47efc3f977e406
  xe-pw-152725v1: 152725v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/index.html

[-- Attachment #2: Type: text/html, Size: 2255 bytes --]

✓ Xe.CI.Full: success for Multi-pass MMU interval notifiers

[Patchwork]

[-- Attachment #1: Type: text/plain, Size: 36092 bytes --]

== Series Details ==

Series: Multi-pass MMU interval notifiers
URL   : https://patchwork.freedesktop.org/series/152725/
State : success

== Summary ==

CI Bug Log - changes from xe-3521-5e2776589ef98e25137723141a47efc3f977e406_FULL -> xe-pw-152725v1_FULL
====================================================

Summary
-------

  **SUCCESS**

  No regressions found.

  

Participating hosts (4 -> 4)
------------------------------

  No changes in participating hosts

Known issues
------------

  Here are the changes found in xe-pw-152725v1_FULL that come from known issues:

### IGT changes ###

#### Issues hit ####

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
    - shard-bmg:          NOTRUN -> [SKIP][1] ([Intel XE#2233])
   [1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-4/igt@kms_addfb_basic@addfb25-y-tiled-small-legacy.html

  * igt@kms_big_fb@4-tiled-16bpp-rotate-90:
    - shard-bmg:          NOTRUN -> [SKIP][2] ([Intel XE#2327])
   [2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-4/igt@kms_big_fb@4-tiled-16bpp-rotate-90.html

  * igt@kms_big_fb@4-tiled-64bpp-rotate-270:
    - shard-dg2-set2:     NOTRUN -> [SKIP][3] ([Intel XE#316])
   [3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-dg2-432/igt@kms_big_fb@4-tiled-64bpp-rotate-270.html

  * igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip:
    - shard-adlp:         [PASS][4] -> [DMESG-FAIL][5] ([Intel XE#4543])
   [4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-adlp-3/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html
   [5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-adlp-6/igt@kms_big_fb@x-tiled-max-hw-stride-64bpp-rotate-180-hflip-async-flip.html

  * igt@kms_big_fb@y-tiled-16bpp-rotate-180:
    - shard-bmg:          NOTRUN -> [SKIP][6] ([Intel XE#1124]) +1 other test skip
   [6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-3/igt@kms_big_fb@y-tiled-16bpp-rotate-180.html

  * igt@kms_big_fb@y-tiled-addfb-size-overflow:
    - shard-bmg:          NOTRUN -> [SKIP][7] ([Intel XE#610])
   [7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-4/igt@kms_big_fb@y-tiled-addfb-size-overflow.html

  * igt@kms_big_fb@yf-tiled-64bpp-rotate-180:
    - shard-dg2-set2:     NOTRUN -> [SKIP][8] ([Intel XE#1124]) +2 other tests skip
   [8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-dg2-432/igt@kms_big_fb@yf-tiled-64bpp-rotate-180.html

  * igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p:
    - shard-bmg:          [PASS][9] -> [SKIP][10] ([Intel XE#2314] / [Intel XE#2894])
   [9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-bmg-8/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html
   [10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-6/igt@kms_bw@connected-linear-tiling-2-displays-1920x1080p.html

  * igt@kms_bw@linear-tiling-1-displays-3840x2160p:
    - shard-bmg:          NOTRUN -> [SKIP][11] ([Intel XE#367])
   [11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-3/igt@kms_bw@linear-tiling-1-displays-3840x2160p.html

  * igt@kms_ccs@ccs-on-another-bo-y-tiled-ccs:
    - shard-bmg:          NOTRUN -> [SKIP][12] ([Intel XE#2887]) +1 other test skip
   [12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-4/igt@kms_ccs@ccs-on-another-bo-y-tiled-ccs.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs-cc@pipe-d-dp-2:
    - shard-dg2-set2:     NOTRUN -> [SKIP][13] ([Intel XE#455] / [Intel XE#787]) +26 other tests skip
   [13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-dg2-432/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs-cc@pipe-d-dp-2.html

  * igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-6:
    - shard-dg2-set2:     NOTRUN -> [SKIP][14] ([Intel XE#787]) +153 other tests skip
   [14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-dg2-435/igt@kms_ccs@crc-primary-basic-4-tiled-mtl-rc-ccs@pipe-b-hdmi-a-6.html

  * igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [SKIP][15] ([Intel XE#2652] / [Intel XE#787]) +7 other tests skip
   [15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-4/igt@kms_ccs@crc-primary-suspend-4-tiled-lnl-ccs@pipe-a-dp-2.html

  * igt@kms_chamelium_edid@dp-edid-resolution-list:
    - shard-dg2-set2:     NOTRUN -> [SKIP][16] ([Intel XE#373]) +1 other test skip
   [16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-dg2-432/igt@kms_chamelium_edid@dp-edid-resolution-list.html

  * igt@kms_chamelium_hpd@dp-hpd-storm:
    - shard-bmg:          NOTRUN -> [SKIP][17] ([Intel XE#2252])
   [17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-4/igt@kms_chamelium_hpd@dp-hpd-storm.html

  * igt@kms_content_protection@atomic-dpms@pipe-a-dp-4:
    - shard-dg2-set2:     NOTRUN -> [FAIL][18] ([Intel XE#1178])
   [18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-dg2-436/igt@kms_content_protection@atomic-dpms@pipe-a-dp-4.html

  * igt@kms_content_protection@uevent@pipe-a-dp-2:
    - shard-bmg:          NOTRUN -> [FAIL][19] ([Intel XE#1188])
   [19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-4/igt@kms_content_protection@uevent@pipe-a-dp-2.html

  * igt@kms_cursor_crc@cursor-rapid-movement-512x512:
    - shard-dg2-set2:     NOTRUN -> [SKIP][20] ([Intel XE#308])
   [20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-dg2-432/igt@kms_cursor_crc@cursor-rapid-movement-512x512.html

  * igt@kms_cursor_crc@cursor-sliding-max-size:
    - shard-bmg:          NOTRUN -> [SKIP][21] ([Intel XE#2320])
   [21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-4/igt@kms_cursor_crc@cursor-sliding-max-size.html

  * igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size:
    - shard-bmg:          [PASS][22] -> [DMESG-WARN][23] ([Intel XE#5354])
   [22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-bmg-4/igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size.html
   [23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-7/igt@kms_cursor_legacy@cursorb-vs-flipa-varying-size.html

  * igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size:
    - shard-bmg:          [PASS][24] -> [SKIP][25] ([Intel XE#2291]) +4 other tests skip
   [24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-bmg-2/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html
   [25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions-varying-size.html

  * igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-6:
    - shard-dg2-set2:     NOTRUN -> [SKIP][26] ([Intel XE#4494] / [i915#3804])
   [26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-dg2-436/igt@kms_dither@fb-8bpc-vs-panel-6bpc@pipe-a-hdmi-a-6.html

  * igt@kms_dp_link_training@non-uhbr-mst:
    - shard-dg2-set2:     NOTRUN -> [SKIP][27] ([Intel XE#4354])
   [27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-dg2-432/igt@kms_dp_link_training@non-uhbr-mst.html

  * igt@kms_feature_discovery@dp-mst:
    - shard-dg2-set2:     NOTRUN -> [SKIP][28] ([Intel XE#1137])
   [28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-dg2-432/igt@kms_feature_discovery@dp-mst.html

  * igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible:
    - shard-bmg:          [PASS][29] -> [SKIP][30] ([Intel XE#2316]) +7 other tests skip
   [29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-bmg-2/igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible.html
   [30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-6/igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible.html

  * igt@kms_flip@flip-vs-suspend-interruptible@d-hdmi-a1:
    - shard-adlp:         [PASS][31] -> [DMESG-WARN][32] ([Intel XE#4543]) +5 other tests dmesg-warn
   [31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-adlp-6/igt@kms_flip@flip-vs-suspend-interruptible@d-hdmi-a1.html
   [32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-adlp-1/igt@kms_flip@flip-vs-suspend-interruptible@d-hdmi-a1.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling:
    - shard-bmg:          NOTRUN -> [SKIP][33] ([Intel XE#2293] / [Intel XE#2380]) +2 other tests skip
   [33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-3/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling.html

  * igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode:
    - shard-bmg:          NOTRUN -> [SKIP][34] ([Intel XE#2293]) +2 other tests skip
   [34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-3/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-32bpp-yftile-upscaling@pipe-a-valid-mode.html

  * igt@kms_frontbuffer_tracking@drrs-1p-primscrn-shrfb-pgflip-blt:
    - shard-bmg:          NOTRUN -> [SKIP][35] ([Intel XE#2311]) +5 other tests skip
   [35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-3/igt@kms_frontbuffer_tracking@drrs-1p-primscrn-shrfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbc-rgb565-draw-render:
    - shard-bmg:          NOTRUN -> [SKIP][36] ([Intel XE#5390]) +2 other tests skip
   [36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-rgb565-draw-render.html

  * igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-spr-indfb-fullscreen:
    - shard-dg2-set2:     NOTRUN -> [SKIP][37] ([Intel XE#651]) +7 other tests skip
   [37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-dg2-432/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-spr-indfb-fullscreen.html

  * igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-wc:
    - shard-bmg:          NOTRUN -> [SKIP][38] ([Intel XE#2313]) +5 other tests skip
   [38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-spr-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc:
    - shard-dg2-set2:     NOTRUN -> [SKIP][39] ([Intel XE#653]) +6 other tests skip
   [39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-dg2-432/igt@kms_frontbuffer_tracking@psr-2p-primscrn-pri-shrfb-draw-mmap-wc.html

  * igt@kms_joiner@basic-big-joiner:
    - shard-dg2-set2:     NOTRUN -> [SKIP][40] ([Intel XE#346])
   [40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-dg2-432/igt@kms_joiner@basic-big-joiner.html

  * igt@kms_joiner@basic-force-big-joiner:
    - shard-bmg:          [PASS][41] -> [SKIP][42] ([Intel XE#3012])
   [41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-bmg-8/igt@kms_joiner@basic-force-big-joiner.html
   [42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-6/igt@kms_joiner@basic-force-big-joiner.html

  * igt@kms_plane_multiple@2x-tiling-4:
    - shard-bmg:          [PASS][43] -> [SKIP][44] ([Intel XE#4596]) +1 other test skip
   [43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-bmg-8/igt@kms_plane_multiple@2x-tiling-4.html
   [44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-4.html

  * igt@kms_pm_dc@dc5-psr:
    - shard-dg2-set2:     NOTRUN -> [SKIP][45] ([Intel XE#1129])
   [45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-dg2-432/igt@kms_pm_dc@dc5-psr.html

  * igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf:
    - shard-dg2-set2:     NOTRUN -> [SKIP][46] ([Intel XE#1489]) +1 other test skip
   [46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-dg2-432/igt@kms_psr2_sf@fbc-psr2-overlay-plane-update-continuous-sf.html

  * igt@kms_psr2_sf@psr2-overlay-plane-update-sf-dmg-area:
    - shard-bmg:          NOTRUN -> [SKIP][47] ([Intel XE#1489])
   [47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-3/igt@kms_psr2_sf@psr2-overlay-plane-update-sf-dmg-area.html

  * igt@kms_psr@fbc-psr-sprite-plane-move:
    - shard-dg2-set2:     NOTRUN -> [SKIP][48] ([Intel XE#2850] / [Intel XE#929]) +2 other tests skip
   [48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-dg2-432/igt@kms_psr@fbc-psr-sprite-plane-move.html

  * igt@kms_psr@psr-sprite-plane-onoff:
    - shard-bmg:          NOTRUN -> [SKIP][49] ([Intel XE#2234] / [Intel XE#2850]) +2 other tests skip
   [49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-4/igt@kms_psr@psr-sprite-plane-onoff.html

  * igt@kms_psr_stress_test@flip-primary-invalidate-overlay:
    - shard-dg2-set2:     NOTRUN -> [SKIP][50] ([Intel XE#2939])
   [50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-dg2-432/igt@kms_psr_stress_test@flip-primary-invalidate-overlay.html

  * igt@kms_rotation_crc@primary-y-tiled-reflect-x-0:
    - shard-dg2-set2:     NOTRUN -> [SKIP][51] ([Intel XE#1127])
   [51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-dg2-432/igt@kms_rotation_crc@primary-y-tiled-reflect-x-0.html

  * igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270:
    - shard-dg2-set2:     NOTRUN -> [SKIP][52] ([Intel XE#3414])
   [52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-dg2-432/igt@kms_rotation_crc@primary-yf-tiled-reflect-x-270.html

  * igt@kms_vrr@flip-suspend:
    - shard-dg2-set2:     NOTRUN -> [SKIP][53] ([Intel XE#455]) +2 other tests skip
   [53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-dg2-432/igt@kms_vrr@flip-suspend.html

  * igt@kms_vrr@max-min:
    - shard-bmg:          NOTRUN -> [SKIP][54] ([Intel XE#1499])
   [54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-4/igt@kms_vrr@max-min.html

  * igt@xe_create@create-execqueues-leak:
    - shard-adlp:         [PASS][55] -> [DMESG-WARN][56] ([Intel XE#2953] / [Intel XE#4173])
   [55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-adlp-4/igt@xe_create@create-execqueues-leak.html
   [56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-adlp-3/igt@xe_create@create-execqueues-leak.html

  * igt@xe_eudebug@basic-vm-bind-extended-discovery:
    - shard-dg2-set2:     NOTRUN -> [SKIP][57] ([Intel XE#4837]) +3 other tests skip
   [57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-dg2-432/igt@xe_eudebug@basic-vm-bind-extended-discovery.html

  * igt@xe_eudebug@discovery-race-sigint:
    - shard-bmg:          NOTRUN -> [SKIP][58] ([Intel XE#4837])
   [58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-3/igt@xe_eudebug@discovery-race-sigint.html

  * igt@xe_exec_basic@multigpu-no-exec-rebind:
    - shard-dg2-set2:     [PASS][59] -> [SKIP][60] ([Intel XE#1392]) +2 other tests skip
   [59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-dg2-463/igt@xe_exec_basic@multigpu-no-exec-rebind.html
   [60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-rebind.html

  * igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate:
    - shard-bmg:          NOTRUN -> [SKIP][61] ([Intel XE#2322]) +1 other test skip
   [61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-4/igt@xe_exec_basic@multigpu-once-bindexecqueue-userptr-invalidate.html

  * igt@xe_exec_basic@multigpu-once-userptr-invalidate-race:
    - shard-dg2-set2:     NOTRUN -> [SKIP][62] ([Intel XE#1392]) +2 other tests skip
   [62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-dg2-432/igt@xe_exec_basic@multigpu-once-userptr-invalidate-race.html

  * igt@xe_exec_fault_mode@many-userptr:
    - shard-dg2-set2:     NOTRUN -> [SKIP][63] ([Intel XE#288]) +5 other tests skip
   [63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-dg2-432/igt@xe_exec_fault_mode@many-userptr.html

  * igt@xe_exec_system_allocator@process-many-stride-mmap-new-huge-nomemset:
    - shard-bmg:          NOTRUN -> [SKIP][64] ([Intel XE#4943]) +1 other test skip
   [64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-4/igt@xe_exec_system_allocator@process-many-stride-mmap-new-huge-nomemset.html

  * igt@xe_exec_system_allocator@twice-mmap-free-race:
    - shard-dg2-set2:     NOTRUN -> [SKIP][65] ([Intel XE#4915]) +60 other tests skip
   [65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-dg2-432/igt@xe_exec_system_allocator@twice-mmap-free-race.html

  * igt@xe_exec_threads@threads-bal-userptr-rebind:
    - shard-adlp:         [PASS][66] -> [DMESG-FAIL][67] ([Intel XE#3876]) +1 other test dmesg-fail
   [66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-adlp-4/igt@xe_exec_threads@threads-bal-userptr-rebind.html
   [67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-adlp-3/igt@xe_exec_threads@threads-bal-userptr-rebind.html

  * igt@xe_exec_threads@threads-fd-userptr-rebind:
    - shard-adlp:         [PASS][68] -> [DMESG-FAIL][69] ([Intel XE#3868] / [Intel XE#3876])
   [68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-adlp-4/igt@xe_exec_threads@threads-fd-userptr-rebind.html
   [69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-adlp-3/igt@xe_exec_threads@threads-fd-userptr-rebind.html

  * igt@xe_oa@missing-sample-flags:
    - shard-dg2-set2:     NOTRUN -> [SKIP][70] ([Intel XE#3573]) +1 other test skip
   [70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-dg2-432/igt@xe_oa@missing-sample-flags.html

  * igt@xe_peer2peer@read@read-gpua-vram01-gpub-system-p2p:
    - shard-dg2-set2:     NOTRUN -> [FAIL][71] ([Intel XE#1173])
   [71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-dg2-436/igt@xe_peer2peer@read@read-gpua-vram01-gpub-system-p2p.html

  * igt@xe_pmu@gt-frequency:
    - shard-dg2-set2:     NOTRUN -> [FAIL][72] ([Intel XE#5166]) +1 other test fail
   [72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-dg2-432/igt@xe_pmu@gt-frequency.html

  * igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz:
    - shard-bmg:          NOTRUN -> [SKIP][73] ([Intel XE#944])
   [73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-4/igt@xe_query@multigpu-query-invalid-uc-fw-version-mbz.html

  
#### Possible fixes ####

  * igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-a-hdmi-a-1:
    - shard-adlp:         [FAIL][74] ([Intel XE#827]) -> [PASS][75] +1 other test pass
   [74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-adlp-1/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-a-hdmi-a-1.html
   [75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-adlp-6/igt@kms_async_flips@alternate-sync-async-flip-atomic@pipe-a-hdmi-a-1.html

  * igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-async-flip:
    - shard-adlp:         [DMESG-FAIL][76] ([Intel XE#4543]) -> [PASS][77]
   [76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-adlp-8/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html
   [77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-adlp-9/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-180-async-flip.html

  * igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic:
    - shard-bmg:          [SKIP][78] ([Intel XE#2291]) -> [PASS][79] +1 other test pass
   [78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-bmg-6/igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic.html
   [79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-4/igt@kms_cursor_legacy@2x-long-nonblocking-modeset-vs-cursor-atomic.html

  * igt@kms_cursor_legacy@flip-vs-cursor-atomic:
    - shard-bmg:          [FAIL][80] ([Intel XE#4633]) -> [PASS][81]
   [80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-bmg-5/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html
   [81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-5/igt@kms_cursor_legacy@flip-vs-cursor-atomic.html

  * igt@kms_dp_aux_dev:
    - shard-bmg:          [SKIP][82] ([Intel XE#3009]) -> [PASS][83]
   [82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-bmg-6/igt@kms_dp_aux_dev.html
   [83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-4/igt@kms_dp_aux_dev.html

  * igt@kms_dp_linktrain_fallback@dp-fallback:
    - shard-bmg:          [SKIP][84] ([Intel XE#4294]) -> [PASS][85]
   [84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-bmg-6/igt@kms_dp_linktrain_fallback@dp-fallback.html
   [85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-4/igt@kms_dp_linktrain_fallback@dp-fallback.html

  * igt@kms_flip@2x-plain-flip-ts-check-interruptible:
    - shard-bmg:          [SKIP][86] ([Intel XE#2316]) -> [PASS][87] +3 other tests pass
   [86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-bmg-6/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html
   [87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-8/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html

  * igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@c-hdmi-a1:
    - shard-adlp:         [DMESG-WARN][88] ([Intel XE#4543]) -> [PASS][89] +3 other tests pass
   [88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-adlp-3/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@c-hdmi-a1.html
   [89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-adlp-8/igt@kms_flip@flip-vs-absolute-wf_vblank-interruptible@c-hdmi-a1.html

  * igt@kms_flip@flip-vs-expired-vblank@c-edp1:
    - shard-lnl:          [FAIL][90] ([Intel XE#301] / [Intel XE#3149]) -> [PASS][91] +1 other test pass
   [90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
   [91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-lnl-3/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html

  * igt@kms_flip@flip-vs-rmfb:
    - shard-adlp:         [DMESG-WARN][92] ([Intel XE#4543] / [Intel XE#5208]) -> [PASS][93]
   [92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-adlp-6/igt@kms_flip@flip-vs-rmfb.html
   [93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-adlp-1/igt@kms_flip@flip-vs-rmfb.html

  * igt@kms_flip@flip-vs-suspend:
    - shard-bmg:          [INCOMPLETE][94] ([Intel XE#2049] / [Intel XE#2597]) -> [PASS][95] +1 other test pass
   [94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-bmg-2/igt@kms_flip@flip-vs-suspend.html
   [95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-3/igt@kms_flip@flip-vs-suspend.html

  * igt@kms_plane_multiple@tiling-none:
    - shard-adlp:         [DMESG-WARN][96] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][97] +8 other tests pass
   [96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-adlp-4/igt@kms_plane_multiple@tiling-none.html
   [97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-adlp-3/igt@kms_plane_multiple@tiling-none.html

  * igt@xe_exec_basic@multigpu-many-execqueues-many-vm-basic-defer-bind:
    - shard-dg2-set2:     [SKIP][98] ([Intel XE#1392]) -> [PASS][99] +5 other tests pass
   [98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-dg2-432/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-basic-defer-bind.html
   [99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-dg2-435/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-basic-defer-bind.html

  * {igt@xe_pmu@fn-engine-activity-sched-if-idle@engine-drm_xe_engine_class_video_enhance1}:
    - shard-bmg:          [ABORT][100] ([Intel XE#3970]) -> [PASS][101] +1 other test pass
   [100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-bmg-6/igt@xe_pmu@fn-engine-activity-sched-if-idle@engine-drm_xe_engine_class_video_enhance1.html
   [101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-4/igt@xe_pmu@fn-engine-activity-sched-if-idle@engine-drm_xe_engine_class_video_enhance1.html

  
#### Warnings ####

  * igt@kms_content_protection@srm:
    - shard-bmg:          [FAIL][102] ([Intel XE#1178]) -> [SKIP][103] ([Intel XE#2341])
   [102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-bmg-8/igt@kms_content_protection@srm.html
   [103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-6/igt@kms_content_protection@srm.html

  * igt@kms_content_protection@uevent:
    - shard-bmg:          [SKIP][104] ([Intel XE#2341]) -> [FAIL][105] ([Intel XE#1188])
   [104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-bmg-6/igt@kms_content_protection@uevent.html
   [105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-4/igt@kms_content_protection@uevent.html

  * igt@kms_frontbuffer_tracking@drrs-2p-primscrn-shrfb-msflip-blt:
    - shard-bmg:          [SKIP][106] ([Intel XE#2312]) -> [SKIP][107] ([Intel XE#2311]) +9 other tests skip
   [106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-shrfb-msflip-blt.html
   [107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-4/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-shrfb-msflip-blt.html

  * igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][108] ([Intel XE#2311]) -> [SKIP][109] ([Intel XE#2312]) +12 other tests skip
   [108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-bmg-7/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html
   [109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc:
    - shard-bmg:          [SKIP][110] ([Intel XE#2312]) -> [SKIP][111] ([Intel XE#5390]) +3 other tests skip
   [110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc.html
   [111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-4/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc.html

  * igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff:
    - shard-bmg:          [SKIP][112] ([Intel XE#5390]) -> [SKIP][113] ([Intel XE#2312]) +8 other tests skip
   [112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html
   [113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-onoff.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt:
    - shard-bmg:          [SKIP][114] ([Intel XE#2313]) -> [SKIP][115] ([Intel XE#2312]) +15 other tests skip
   [114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt.html
   [115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-pgflip-blt.html

  * igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-plflip-blt:
    - shard-bmg:          [SKIP][116] ([Intel XE#2312]) -> [SKIP][117] ([Intel XE#2313]) +7 other tests skip
   [116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-plflip-blt.html
   [117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-scndscrn-shrfb-plflip-blt.html

  * igt@kms_tiled_display@basic-test-pattern-with-chamelium:
    - shard-dg2-set2:     [SKIP][118] ([Intel XE#362]) -> [SKIP][119] ([Intel XE#1500])
   [118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-dg2-463/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html
   [119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-dg2-466/igt@kms_tiled_display@basic-test-pattern-with-chamelium.html

  * igt@xe_peer2peer@read:
    - shard-dg2-set2:     [SKIP][120] ([Intel XE#1061]) -> [FAIL][121] ([Intel XE#1173])
   [120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3521-5e2776589ef98e25137723141a47efc3f977e406/shard-dg2-432/igt@xe_peer2peer@read.html
   [121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/shard-dg2-436/igt@xe_peer2peer@read.html

  
  {name}: This element is suppressed. This means it is ignored when computing
          the status of the difference (SUCCESS, WARNING, or FAILURE).

  [Intel XE#1061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1061
  [Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
  [Intel XE#1127]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1127
  [Intel XE#1129]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1129
  [Intel XE#1137]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1137
  [Intel XE#1173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1173
  [Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
  [Intel XE#1188]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1188
  [Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
  [Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
  [Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
  [Intel XE#1500]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1500
  [Intel XE#2049]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2049
  [Intel XE#2233]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2233
  [Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
  [Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
  [Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
  [Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
  [Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
  [Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
  [Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
  [Intel XE#2314]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2314
  [Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
  [Intel XE#2320]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2320
  [Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
  [Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
  [Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
  [Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
  [Intel XE#2597]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2597
  [Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
  [Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
  [Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
  [Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
  [Intel XE#2894]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2894
  [Intel XE#2939]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2939
  [Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
  [Intel XE#3009]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3009
  [Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
  [Intel XE#3012]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3012
  [Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
  [Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
  [Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
  [Intel XE#3414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3414
  [Intel XE#346]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/346
  [Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
  [Intel XE#362]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/362
  [Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
  [Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
  [Intel XE#3868]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3868
  [Intel XE#3876]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3876
  [Intel XE#3970]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3970
  [Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
  [Intel XE#4294]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4294
  [Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
  [Intel XE#4494]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4494
  [Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
  [Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
  [Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
  [Intel XE#4633]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4633
  [Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
  [Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
  [Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
  [Intel XE#5166]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5166
  [Intel XE#5208]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5208
  [Intel XE#5354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5354
  [Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390
  [Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
  [Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
  [Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
  [Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
  [Intel XE#827]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/827
  [Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
  [Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
  [i915#3804]: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/3804


Build changes
-------------

  * Linux: xe-3521-5e2776589ef98e25137723141a47efc3f977e406 -> xe-pw-152725v1

  IGT_8489: 4972020ea0f3d0ac8a0d7dd4f5419119b1b30995 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
  xe-3521-5e2776589ef98e25137723141a47efc3f977e406: 5e2776589ef98e25137723141a47efc3f977e406
  xe-pw-152725v1: 152725v1

== Logs ==

For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-152725v1/index.html

[-- Attachment #2: Type: text/html, Size: 40911 bytes --]

Re: [RFC PATCH 6/6] drm/xe: Implement two pass MMU notifiers for SVM

[Matthew Brost]

On Sat, Aug 09, 2025 at 03:51:37PM +0200, Thomas Hellström wrote:
> From: Matthew Brost <matthew.brost@intel.com>
> 
> Implement two-pass MMU notifiers for SVM, enabling multiple VMs or
> devices with GPU mappings to pipeline costly TLB invalidations by
> issuing them in the first pass and waiting for completion in the second.
> 
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> ---
>  drivers/gpu/drm/drm_gpusvm.c |  2 +-
>  drivers/gpu/drm/xe/xe_svm.c  | 74 ++++++++++++++++++++++++++++++------
>  2 files changed, 63 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/gpu/drm/drm_gpusvm.c b/drivers/gpu/drm/drm_gpusvm.c
> index 92dc7d2bd6cf..f153df1bc862 100644
> --- a/drivers/gpu/drm/drm_gpusvm.c
> +++ b/drivers/gpu/drm/drm_gpusvm.c
> @@ -413,7 +413,7 @@ drm_gpusvm_notifier_invalidate_twopass(struct mmu_interval_notifier *mni,
>   * drm_gpusvm_notifier_ops - MMU interval notifier operations for GPU SVM
>   */
>  static const struct mmu_interval_notifier_ops drm_gpusvm_notifier_ops = {
> -	.invalidate_twopass = drm_gpusvm_notifier_invalidate_twopass,
> +	.invalidate_multipass = drm_gpusvm_notifier_invalidate_twopass,

This should be in patch #2.

Matt

>  };
>  
>  /**
> diff --git a/drivers/gpu/drm/xe/xe_svm.c b/drivers/gpu/drm/xe/xe_svm.c
> index 82a598c8d56e..5728394806ca 100644
> --- a/drivers/gpu/drm/xe/xe_svm.c
> +++ b/drivers/gpu/drm/xe/xe_svm.c
> @@ -144,15 +144,8 @@ xe_svm_range_notifier_event_begin(struct xe_vm *vm, struct drm_gpusvm_range *r,
>  	 * invalidations spanning multiple ranges.
>  	 */
>  	for_each_tile(tile, xe, id)
> -		if (xe_pt_zap_ptes_range(tile, vm, range)) {
> +		if (xe_pt_zap_ptes_range(tile, vm, range))
>  			tile_mask |= BIT(id);
> -			/*
> -			 * WRITE_ONCE pairs with READ_ONCE in
> -			 * xe_vm_has_valid_gpu_mapping()
> -			 */
> -			WRITE_ONCE(range->tile_invalidated,
> -				   range->tile_invalidated | BIT(id));
> -		}
>  
>  	return tile_mask;
>  }
> @@ -161,16 +154,60 @@ static void
>  xe_svm_range_notifier_event_end(struct xe_vm *vm, struct drm_gpusvm_range *r,
>  				const struct mmu_notifier_range *mmu_range)
>  {
> +	struct xe_svm_range *range = to_xe_range(r);
>  	struct drm_gpusvm_ctx ctx = { .in_notifier = true, };
>  
>  	xe_svm_assert_in_notifier(vm);
>  
> +	/*
> +	 * WRITE_ONCE pairs with READ_ONCE in xe_vm_has_valid_gpu_mapping()
> +	 */
> +	WRITE_ONCE(range->tile_invalidated, range->tile_present);
> +
>  	drm_gpusvm_range_unmap_pages(&vm->svm.gpusvm, r, &ctx);
>  	if (!xe_vm_is_closed(vm) && mmu_range->event == MMU_NOTIFY_UNMAP)
>  		xe_svm_garbage_collector_add_range(vm, to_xe_range(r),
>  						   mmu_range);
>  }
>  
> +struct xe_svm_invalidate_pass {
> +	struct drm_gpusvm *gpusvm;
> +	struct drm_gpusvm_notifier *notifier;
> +#define XE_SVM_INVALIDATE_FENCE_COUNT	\
> +	(XE_MAX_TILES_PER_DEVICE * XE_MAX_GT_PER_TILE)
> +	struct xe_gt_tlb_invalidation_fence fences[XE_SVM_INVALIDATE_FENCE_COUNT];
> +	struct mmu_interval_notifier_pass p;
> +};
> +
> +static struct mmu_interval_notifier_pass *
> +xe_svm_invalidate_second(struct mmu_interval_notifier_pass *p,
> +			 const struct mmu_notifier_range *mmu_range,
> +			 unsigned long cur_seq)
> +{
> +	struct xe_svm_invalidate_pass *pass = container_of(p, typeof(*pass), p);
> +	struct drm_gpusvm *gpusvm = pass->gpusvm;
> +	struct drm_gpusvm_notifier *notifier = pass->notifier;
> +	struct drm_gpusvm_range *r = NULL;
> +	struct xe_vm *vm = gpusvm_to_vm(gpusvm);
> +	u64 adj_start = mmu_range->start, adj_end = mmu_range->end;
> +	int id;
> +
> +	/* Adjust invalidation to notifier boundaries */
> +	adj_start = max(drm_gpusvm_notifier_start(notifier), adj_start);
> +	adj_end = min(drm_gpusvm_notifier_end(notifier), adj_end);
> +
> +	for (id = 0; id < XE_SVM_INVALIDATE_FENCE_COUNT; ++id)
> +		xe_gt_tlb_invalidation_fence_wait(&pass->fences[id]);
> +
> +	drm_gpusvm_in_notifier_lock(gpusvm);
> +	drm_gpusvm_for_each_range(r, notifier, adj_start, adj_end)
> +		xe_svm_range_notifier_event_end(vm, r, mmu_range);
> +	drm_gpusvm_in_notifier_unlock(gpusvm);
> +
> +	kfree(pass);
> +	return NULL;
> +}
> +
>  static void xe_svm_invalidate_twopass(struct drm_gpusvm *gpusvm,
>  				      struct drm_gpusvm_notifier *notifier,
>  				      const struct mmu_notifier_range *mmu_range,
> @@ -179,6 +216,8 @@ static void xe_svm_invalidate_twopass(struct drm_gpusvm *gpusvm,
>  	struct xe_vm *vm = gpusvm_to_vm(gpusvm);
>  	struct xe_device *xe = vm->xe;
>  	struct drm_gpusvm_range *r, *first;
> +	struct xe_svm_invalidate_pass *pass = NULL;
> +	struct xe_gt_tlb_invalidation_fence *fences = NULL;
>  	u64 adj_start = mmu_range->start, adj_end = mmu_range->end;
>  	u8 tile_mask = 0;
>  	long err;
> @@ -226,14 +265,25 @@ static void xe_svm_invalidate_twopass(struct drm_gpusvm *gpusvm,
>  
>  	xe_device_wmb(xe);
>  
> -	err = xe_vm_range_tilemask_tlb_invalidation(vm, NULL, adj_start,
> +	pass = kzalloc(sizeof(*pass), GFP_NOWAIT);
> +	if (pass) {
> +		pass->gpusvm = gpusvm;
> +		pass->notifier = notifier;
> +		pass->p.pass = xe_svm_invalidate_second;
> +		fences = pass->fences;
> +		*p = &pass->p;
> +	}
> +
> +	err = xe_vm_range_tilemask_tlb_invalidation(vm, fences, adj_start,
>  						    adj_end, tile_mask);
>  	WARN_ON_ONCE(err);
>  
>  range_notifier_event_end:
> -	r = first;
> -	drm_gpusvm_for_each_range(r, notifier, adj_start, adj_end)
> -		xe_svm_range_notifier_event_end(vm, r, mmu_range);
> +	if (!pass) {
> +		r = first;
> +		drm_gpusvm_for_each_range(r, notifier, adj_start, adj_end)
> +			xe_svm_range_notifier_event_end(vm, r, mmu_range);
> +	}
>  }
>  
>  static int __xe_svm_garbage_collector(struct xe_vm *vm,
> -- 
> 2.50.1
> 

Re: [RFC PATCH 6/6] drm/xe: Implement two pass MMU notifiers for SVM

[Thomas Hellström]

On Mon, 2025-08-11 at 13:46 -0700, Matthew Brost wrote:
> On Sat, Aug 09, 2025 at 03:51:37PM +0200, Thomas Hellström wrote:
> > From: Matthew Brost <matthew.brost@intel.com>
> > 
> > Implement two-pass MMU notifiers for SVM, enabling multiple VMs or
> > devices with GPU mappings to pipeline costly TLB invalidations by
> > issuing them in the first pass and waiting for completion in the
> > second.
> > 
> > Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> > ---
> >  drivers/gpu/drm/drm_gpusvm.c |  2 +-
> >  drivers/gpu/drm/xe/xe_svm.c  | 74 ++++++++++++++++++++++++++++++--
> > ----
> >  2 files changed, 63 insertions(+), 13 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/drm_gpusvm.c
> > b/drivers/gpu/drm/drm_gpusvm.c
> > index 92dc7d2bd6cf..f153df1bc862 100644
> > --- a/drivers/gpu/drm/drm_gpusvm.c
> > +++ b/drivers/gpu/drm/drm_gpusvm.c
> > @@ -413,7 +413,7 @@ drm_gpusvm_notifier_invalidate_twopass(struct
> > mmu_interval_notifier *mni,
> >   * drm_gpusvm_notifier_ops - MMU interval notifier operations for
> > GPU SVM
> >   */
> >  static const struct mmu_interval_notifier_ops
> > drm_gpusvm_notifier_ops = {
> > -	.invalidate_twopass =
> > drm_gpusvm_notifier_invalidate_twopass,
> > +	.invalidate_multipass =
> > drm_gpusvm_notifier_invalidate_twopass,
> 
> This should be in patch #2.

Yup. My bad fixing up for the interface change in patch 1. Sorry for
that.
/Thomas


> 
> Matt
> 
> >  };
> >  
> >  /**
> > diff --git a/drivers/gpu/drm/xe/xe_svm.c
> > b/drivers/gpu/drm/xe/xe_svm.c
> > index 82a598c8d56e..5728394806ca 100644
> > --- a/drivers/gpu/drm/xe/xe_svm.c
> > +++ b/drivers/gpu/drm/xe/xe_svm.c
> > @@ -144,15 +144,8 @@ xe_svm_range_notifier_event_begin(struct xe_vm
> > *vm, struct drm_gpusvm_range *r,
> >  	 * invalidations spanning multiple ranges.
> >  	 */
> >  	for_each_tile(tile, xe, id)
> > -		if (xe_pt_zap_ptes_range(tile, vm, range)) {
> > +		if (xe_pt_zap_ptes_range(tile, vm, range))
> >  			tile_mask |= BIT(id);
> > -			/*
> > -			 * WRITE_ONCE pairs with READ_ONCE in
> > -			 * xe_vm_has_valid_gpu_mapping()
> > -			 */
> > -			WRITE_ONCE(range->tile_invalidated,
> > -				   range->tile_invalidated |
> > BIT(id));
> > -		}
> >  
> >  	return tile_mask;
> >  }
> > @@ -161,16 +154,60 @@ static void
> >  xe_svm_range_notifier_event_end(struct xe_vm *vm, struct
> > drm_gpusvm_range *r,
> >  				const struct mmu_notifier_range
> > *mmu_range)
> >  {
> > +	struct xe_svm_range *range = to_xe_range(r);
> >  	struct drm_gpusvm_ctx ctx = { .in_notifier = true, };
> >  
> >  	xe_svm_assert_in_notifier(vm);
> >  
> > +	/*
> > +	 * WRITE_ONCE pairs with READ_ONCE in
> > xe_vm_has_valid_gpu_mapping()
> > +	 */
> > +	WRITE_ONCE(range->tile_invalidated, range->tile_present);
> > +
> >  	drm_gpusvm_range_unmap_pages(&vm->svm.gpusvm, r, &ctx);
> >  	if (!xe_vm_is_closed(vm) && mmu_range->event ==
> > MMU_NOTIFY_UNMAP)
> >  		xe_svm_garbage_collector_add_range(vm,
> > to_xe_range(r),
> >  						   mmu_range);
> >  }
> >  
> > +struct xe_svm_invalidate_pass {
> > +	struct drm_gpusvm *gpusvm;
> > +	struct drm_gpusvm_notifier *notifier;
> > +#define XE_SVM_INVALIDATE_FENCE_COUNT	\
> > +	(XE_MAX_TILES_PER_DEVICE * XE_MAX_GT_PER_TILE)
> > +	struct xe_gt_tlb_invalidation_fence
> > fences[XE_SVM_INVALIDATE_FENCE_COUNT];
> > +	struct mmu_interval_notifier_pass p;
> > +};
> > +
> > +static struct mmu_interval_notifier_pass *
> > +xe_svm_invalidate_second(struct mmu_interval_notifier_pass *p,
> > +			 const struct mmu_notifier_range
> > *mmu_range,
> > +			 unsigned long cur_seq)
> > +{
> > +	struct xe_svm_invalidate_pass *pass = container_of(p,
> > typeof(*pass), p);
> > +	struct drm_gpusvm *gpusvm = pass->gpusvm;
> > +	struct drm_gpusvm_notifier *notifier = pass->notifier;
> > +	struct drm_gpusvm_range *r = NULL;
> > +	struct xe_vm *vm = gpusvm_to_vm(gpusvm);
> > +	u64 adj_start = mmu_range->start, adj_end = mmu_range-
> > >end;
> > +	int id;
> > +
> > +	/* Adjust invalidation to notifier boundaries */
> > +	adj_start = max(drm_gpusvm_notifier_start(notifier),
> > adj_start);
> > +	adj_end = min(drm_gpusvm_notifier_end(notifier), adj_end);
> > +
> > +	for (id = 0; id < XE_SVM_INVALIDATE_FENCE_COUNT; ++id)
> > +		xe_gt_tlb_invalidation_fence_wait(&pass-
> > >fences[id]);
> > +
> > +	drm_gpusvm_in_notifier_lock(gpusvm);
> > +	drm_gpusvm_for_each_range(r, notifier, adj_start, adj_end)
> > +		xe_svm_range_notifier_event_end(vm, r, mmu_range);
> > +	drm_gpusvm_in_notifier_unlock(gpusvm);
> > +
> > +	kfree(pass);
> > +	return NULL;
> > +}
> > +
> >  static void xe_svm_invalidate_twopass(struct drm_gpusvm *gpusvm,
> >  				      struct drm_gpusvm_notifier
> > *notifier,
> >  				      const struct
> > mmu_notifier_range *mmu_range,
> > @@ -179,6 +216,8 @@ static void xe_svm_invalidate_twopass(struct
> > drm_gpusvm *gpusvm,
> >  	struct xe_vm *vm = gpusvm_to_vm(gpusvm);
> >  	struct xe_device *xe = vm->xe;
> >  	struct drm_gpusvm_range *r, *first;
> > +	struct xe_svm_invalidate_pass *pass = NULL;
> > +	struct xe_gt_tlb_invalidation_fence *fences = NULL;
> >  	u64 adj_start = mmu_range->start, adj_end = mmu_range-
> > >end;
> >  	u8 tile_mask = 0;
> >  	long err;
> > @@ -226,14 +265,25 @@ static void xe_svm_invalidate_twopass(struct
> > drm_gpusvm *gpusvm,
> >  
> >  	xe_device_wmb(xe);
> >  
> > -	err = xe_vm_range_tilemask_tlb_invalidation(vm, NULL,
> > adj_start,
> > +	pass = kzalloc(sizeof(*pass), GFP_NOWAIT);
> > +	if (pass) {
> > +		pass->gpusvm = gpusvm;
> > +		pass->notifier = notifier;
> > +		pass->p.pass = xe_svm_invalidate_second;
> > +		fences = pass->fences;
> > +		*p = &pass->p;
> > +	}
> > +
> > +	err = xe_vm_range_tilemask_tlb_invalidation(vm, fences,
> > adj_start,
> >  						    adj_end,
> > tile_mask);
> >  	WARN_ON_ONCE(err);
> >  
> >  range_notifier_event_end:
> > -	r = first;
> > -	drm_gpusvm_for_each_range(r, notifier, adj_start, adj_end)
> > -		xe_svm_range_notifier_event_end(vm, r, mmu_range);
> > +	if (!pass) {
> > +		r = first;
> > +		drm_gpusvm_for_each_range(r, notifier, adj_start,
> > adj_end)
> > +			xe_svm_range_notifier_event_end(vm, r,
> > mmu_range);
> > +	}
> >  }
> >  
> >  static int __xe_svm_garbage_collector(struct xe_vm *vm,
> > -- 
> > 2.50.1
> > 

Re: [RFC PATCH 1/6] mm/mmu_notifier: Allow multiple struct mmu_interval_notifier passes

[Matthew Brost]

On Mon, Aug 18, 2025 at 01:07:26PM -0300, Jason Gunthorpe wrote:
> On Sat, Aug 09, 2025 at 03:51:32PM +0200, Thomas Hellström wrote:
> > GPU use-cases for mmu_interval_notifiers with hmm often involve
> > starting a gpu operation and then waiting for it to complete.
> > These operations are typically context preemption or TLB flushing.
> > 
> > With single-pass notifiers per GPU this doesn't scale in
> > multi-gpu scenarios. In those scenarios we'd want to first start
> > preemption- or TLB flushing on all GPUs and as a second pass wait
> > for them to complete on all gpus.
> 
> The idea seems reasonable but I'm not sure I like the naming of
> 'multipass' or necessarily the complexity.
> 
> This is sort of a co-operative multithreading thing.
> 
> Do you really need a linked list here? At least justify the design
> choices in the commit message..
> 

I think this choice makes sense: it allows embedding the wait state from
the initial notifier call into the pass structure. Patch [6] shows this
by attaching the issued TLB invalidation fences to the pass. Since a
single notifier may be invoked multiple times with different ranges but
the same seqno, I think this is the correct design choice—otherwise
there’s no unambiguous way to track per-invocation wait state. I agree
this should be documented in both the commit message and kernel-doc.

Matt

[6] https://patchwork.freedesktop.org/patch/667844/?series=152725&rev=1

> > +struct mmu_interval_notifier_pass {
> > +	struct list_head link;
> > +	/**
> > +	 * @pass: Driver callback for additionall pass.
> > +	 * @additional_pass: Pointer to the mmu_interval_notifier_pass structure.
> > +	 * @range: The mmu_notifier_range.
> > +	 * @cur_seq: The current sequence set by the first pass.
> > +	 *
> > +	 * Return: Either a pointer to a valid mmu_interval_notifier_pass for
> > +	 * another pass to be called, or %NULL if processing is complete for this
> > +	 * notifier. There is no error reporting mechanism for additional passes.
> > +	 */
> > +	struct mmu_interval_notifier_pass *
> > +	(*pass) (struct mmu_interval_notifier_pass *additional_pass,
> > +		 const struct mmu_notifier_range *range,
> > +		 unsigned long cur_seq);
> > +};
> > +
> >  /**
> >   * struct mmu_interval_notifier_ops
> >   * @invalidate: Upon return the caller must stop using any SPTEs within this
> > @@ -243,6 +269,10 @@ struct mmu_interval_notifier_ops {
> >  	bool (*invalidate)(struct mmu_interval_notifier *interval_sub,
> >  			   const struct mmu_notifier_range *range,
> >  			   unsigned long cur_seq);
> > +	bool (*invalidate_multipass)(struct mmu_interval_notifier *interval_sub,
> > +				     const struct mmu_notifier_range *range,
> > +				     unsigned long cur_seq,
> > +				     struct mmu_interval_notifier_pass **pass);
> 
> Couldn't this just have a pass number counter and some return code to
> indicate this notifier is done?
> 
> Or do you really need more than 2 passes? Start/finish make sense
> too. Otherwise you may have issues overlapping the backgroundable
> operations between different driver types?
> 
> > +static void mn_itree_additional_passes(struct list_head *additional_passes,
> > +				       const struct mmu_notifier_range *range,
> > +				       unsigned long cur_seq)
> > +{
> > +	struct mmu_interval_notifier_pass *p, *next;
> > +
> > +	while (!list_empty(additional_passes)) {
> > +		list_for_each_entry_safe(p, next, additional_passes, link) {
> > +			list_del_init(&p->link);
> > +			p = p->pass(p, range, cur_seq);
> > +			if (p)
> > +				list_add_tail(&p->link, additional_passes);
> > +		}
> > +	}
> 
> Like this is very naive, if one driver has only 'prepare' and 'wait
> for device ack' passes, then it will immediately stop being concurrent
> while another device may be still working on its 3rd pass.
> 
> So either this should be more complicated to properly support
> different numbers of passes per registration or we should just support
> two passes and be done with it?
> 
> Jason

Re: [RFC PATCH 1/6] mm/mmu_notifier: Allow multiple struct mmu_interval_notifier passes

[Thomas Hellström]

On Mon, 2025-08-18 at 13:36 -0300, Jason Gunthorpe wrote:
> On Mon, Aug 18, 2025 at 09:25:20AM -0700, Matthew Brost wrote:
> > I think this choice makes sense: it allows embedding the wait state
> > from
> > the initial notifier call into the pass structure. Patch [6] shows
> > this
> > by attaching the issued TLB invalidation fences to the pass. Since
> > a
> > single notifier may be invoked multiple times with different ranges
> > but
> > the same seqno,
> 
> That should be explained, but also seems to be a bit of a different
> issue..
> 
> If the design is really to only have two passes and this linked list
> is about retaining state then there should not be so much freedom to
> have more passes.

Actually the initial suggestion was two passes only. Then I thought I
saw a use-case for even three passes and added the multi-pass thing,
but I think it turned out we didn't have such a use-case. IMO we could
restrict it to two-pass. Matthew, that should be completely OK for the
SVM use-case, right?

/Thomas


> 
> Jason

Re: [RFC PATCH 1/6] mm/mmu_notifier: Allow multiple struct mmu_interval_notifier passes

[Matthew Brost]

On Mon, Aug 18, 2025 at 01:36:17PM -0300, Jason Gunthorpe wrote:
> On Mon, Aug 18, 2025 at 09:25:20AM -0700, Matthew Brost wrote:
> > I think this choice makes sense: it allows embedding the wait state from
> > the initial notifier call into the pass structure. Patch [6] shows this
> > by attaching the issued TLB invalidation fences to the pass. Since a
> > single notifier may be invoked multiple times with different ranges but
> > the same seqno,
> 
> That should be explained, but also seems to be a bit of a different
> issue..
> 
> If the design is really to only have two passes and this linked list
> is about retaining state then there should not be so much freedom to
> have more passes.

I’ll let Thomas weigh in on whether we really need more than two passes;
my feeling is that two passes are likely sufficient. It’s also worth
noting that the linked list has an added benefit: the notifier tree only
needs to be walked once (a small time-complexity win).

Matt

> 
> Jason

Re: [RFC PATCH 1/6] mm/mmu_notifier: Allow multiple struct mmu_interval_notifier passes

[Matthew Brost]

On Mon, Aug 18, 2025 at 06:42:36PM +0200, Thomas Hellström wrote:
> On Mon, 2025-08-18 at 13:36 -0300, Jason Gunthorpe wrote:
> > On Mon, Aug 18, 2025 at 09:25:20AM -0700, Matthew Brost wrote:
> > > I think this choice makes sense: it allows embedding the wait state
> > > from
> > > the initial notifier call into the pass structure. Patch [6] shows
> > > this
> > > by attaching the issued TLB invalidation fences to the pass. Since
> > > a
> > > single notifier may be invoked multiple times with different ranges
> > > but
> > > the same seqno,
> > 
> > That should be explained, but also seems to be a bit of a different
> > issue..
> > 
> > If the design is really to only have two passes and this linked list
> > is about retaining state then there should not be so much freedom to
> > have more passes.
> 
> Actually the initial suggestion was two passes only. Then I thought I
> saw a use-case for even three passes and added the multi-pass thing,
> but I think it turned out we didn't have such a use-case. IMO we could
> restrict it to two-pass. Matthew, that should be completely OK for the
> SVM use-case, right?
> 

Yea, I just replied that 2 passes should be sufficient.

Matt

> /Thomas
> 
> 
> > 
> > Jason
> 

Re: [RFC PATCH 1/6] mm/mmu_notifier: Allow multiple struct mmu_interval_notifier passes

[Alistair Popple]

On Mon, Aug 18, 2025 at 01:46:55PM -0300, Jason Gunthorpe wrote:
> On Mon, Aug 18, 2025 at 09:44:01AM -0700, Matthew Brost wrote:
> > On Mon, Aug 18, 2025 at 01:36:17PM -0300, Jason Gunthorpe wrote:
> > > On Mon, Aug 18, 2025 at 09:25:20AM -0700, Matthew Brost wrote:
> > > > I think this choice makes sense: it allows embedding the wait state from
> > > > the initial notifier call into the pass structure. Patch [6] shows this
> > > > by attaching the issued TLB invalidation fences to the pass. Since a
> > > > single notifier may be invoked multiple times with different ranges but
> > > > the same seqno,
> > > 
> > > That should be explained, but also seems to be a bit of a different
> > > issue..
> > > 
> > > If the design is really to only have two passes and this linked list
> > > is about retaining state then there should not be so much freedom to
> > > have more passes.
> > 
> > I’ll let Thomas weigh in on whether we really need more than two passes;
> > my feeling is that two passes are likely sufficient. It’s also worth
> > noting that the linked list has an added benefit: the notifier tree only
> > needs to be walked once (a small time-complexity win).
> 
> You may end up keeping the linked list just with no way to add a third
> pass.

It seems to me though that linked list still adds unnecessary complexity. I
think this would all be much easier to follow if we just added two new callbacks
- invalidate_start() and invalidate_end() say.

Admitedly that would still require the linked list (or something similar) to
retain the ability to hold/pass a context between the start and end callbacks.
Which is bit annoying, it's a pity we need to allocate memory in a performance
sensitive path to effectively pass (at least in this case) a single pointer. I
can't think of any obvious solutions to that though.

> Jason
> 

Re: [RFC PATCH 1/6] mm/mmu_notifier: Allow multiple struct mmu_interval_notifier passes

[Alistair Popple]

On Sat, Aug 09, 2025 at 03:51:32PM +0200, Thomas Hellström wrote:
> GPU use-cases for mmu_interval_notifiers with hmm often involve
> starting a gpu operation and then waiting for it to complete.
> These operations are typically context preemption or TLB flushing.
> 
> With single-pass notifiers per GPU this doesn't scale in
> multi-gpu scenarios. In those scenarios we'd want to first start
> preemption- or TLB flushing on all GPUs and as a second pass wait
> for them to complete on all gpus.
> 
> One can do this on per-driver basis multiplexing per-driver
> notifiers but that would mean sharing the notifier "user" lock
> across all GPUs and that doesn't scale well either, so adding support
> for multi-pass in the core appears like the right choice.
> 
> Implement multi-pass capability in the mmu_interval_notifier. Use a
> linked list for the additional passes to minimize the impact for
> use-cases that don't need the multi-pass functionality.
> 
> Cc: Jason Gunthorpe <jgg@ziepe.ca>
> Cc: Andrew Morton <akpm@linux-foundation.org>
> Cc: Simona Vetter <simona.vetter@ffwll.ch>
> Cc: Dave Airlie <airlied@gmail.com>
> Cc: <dri-devel@lists.freedesktop.org>
> Cc: <linux-mm@kvack.org>
> Cc: <linux-kernel@vger.kernel.org>
> 
> Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> ---
>  include/linux/mmu_notifier.h | 30 ++++++++++++++++
>  mm/mmu_notifier.c            | 67 +++++++++++++++++++++++++++++++-----
>  2 files changed, 88 insertions(+), 9 deletions(-)
> 
> diff --git a/include/linux/mmu_notifier.h b/include/linux/mmu_notifier.h
> index d1094c2d5fb6..1107a8eafd8a 100644
> --- a/include/linux/mmu_notifier.h
> +++ b/include/linux/mmu_notifier.h
> @@ -233,6 +233,32 @@ struct mmu_notifier {
>  	unsigned int users;
>  };
>  
> +/**
> + * struct mmu_interval_notifier_pass - mmu_interval_notifier multi-pass abstraction
> + * @link: List link for the notifiers pending pass list
> + *
> + * Allocate, typically using GFP_NOWAIT in the interval notifier's first pass.
> + * If allocation fails (which is not unlikely under memory pressure), fall back
> + * to single-pass operation.
> + */
> +struct mmu_interval_notifier_pass {

If we limit the number of passes to two maybe call this
`mmu_interval_notifier_finish()`? ...

> +	struct list_head link;
> +	/**
> +	 * @pass: Driver callback for additionall pass.
> +	 * @additional_pass: Pointer to the mmu_interval_notifier_pass structure.
> +	 * @range: The mmu_notifier_range.
> +	 * @cur_seq: The current sequence set by the first pass.
> +	 *
> +	 * Return: Either a pointer to a valid mmu_interval_notifier_pass for
> +	 * another pass to be called, or %NULL if processing is complete for this
> +	 * notifier. There is no error reporting mechanism for additional passes.
> +	 */
> +	struct mmu_interval_notifier_pass *
> +	(*pass) (struct mmu_interval_notifier_pass *additional_pass,

... and call this `finish()` ...

> +		 const struct mmu_notifier_range *range,
> +		 unsigned long cur_seq);
> +};
> +
>  /**
>   * struct mmu_interval_notifier_ops
>   * @invalidate: Upon return the caller must stop using any SPTEs within this
> @@ -243,6 +269,10 @@ struct mmu_interval_notifier_ops {
>  	bool (*invalidate)(struct mmu_interval_notifier *interval_sub,
>  			   const struct mmu_notifier_range *range,
>  			   unsigned long cur_seq);
> +	bool (*invalidate_multipass)(struct mmu_interval_notifier *interval_sub,

... and then this could be called `invalidate_start()`. That might address some
of the concerns with naming.

> +				     const struct mmu_notifier_range *range,
> +				     unsigned long cur_seq,
> +				     struct mmu_interval_notifier_pass **pass);
>  };
>  
>  struct mmu_interval_notifier {
> diff --git a/mm/mmu_notifier.c b/mm/mmu_notifier.c
> index 8e0125dc0522..dd6af87db103 100644
> --- a/mm/mmu_notifier.c
> +++ b/mm/mmu_notifier.c
> @@ -260,6 +260,22 @@ mmu_interval_read_begin(struct mmu_interval_notifier *interval_sub)
>  }
>  EXPORT_SYMBOL_GPL(mmu_interval_read_begin);
>  
> +static void mn_itree_additional_passes(struct list_head *additional_passes,
> +				       const struct mmu_notifier_range *range,
> +				       unsigned long cur_seq)
> +{
> +	struct mmu_interval_notifier_pass *p, *next;
> +
> +	while (!list_empty(additional_passes)) {
> +		list_for_each_entry_safe(p, next, additional_passes, link) {
> +			list_del_init(&p->link);
> +			p = p->pass(p, range, cur_seq);
> +			if (p)
> +				list_add_tail(&p->link, additional_passes);
> +		}
> +	}
> +}
> +
>  static void mn_itree_release(struct mmu_notifier_subscriptions *subscriptions,
>  			     struct mm_struct *mm)
>  {
> @@ -272,17 +288,32 @@ static void mn_itree_release(struct mmu_notifier_subscriptions *subscriptions,
>  	};
>  	struct mmu_interval_notifier *interval_sub;
>  	unsigned long cur_seq;
> +	LIST_HEAD(additional_passes);
>  	bool ret;
>  
>  	for (interval_sub =
>  		     mn_itree_inv_start_range(subscriptions, &range, &cur_seq);
>  	     interval_sub;
>  	     interval_sub = mn_itree_inv_next(interval_sub, &range)) {
> -		ret = interval_sub->ops->invalidate(interval_sub, &range,
> -						    cur_seq);
> +		if (interval_sub->ops->invalidate_multipass) {
> +			struct mmu_interval_notifier_pass *second = NULL;
> +
> +			ret = interval_sub->ops->invalidate_multipass(interval_sub,
> +								      &range,
> +								      cur_seq,
> +								      &second);
> +			if (ret && second)
> +				list_add_tail(&second->link, &additional_passes);
> +
> +		} else {
> +			ret = interval_sub->ops->invalidate(interval_sub,
> +							    &range,
> +							    cur_seq);
> +		}
>  		WARN_ON(!ret);
>  	}
>  
> +	mn_itree_additional_passes(&additional_passes, &range, cur_seq);
>  	mn_itree_inv_end(subscriptions);
>  }
>  
> @@ -431,6 +462,8 @@ static int mn_itree_invalidate(struct mmu_notifier_subscriptions *subscriptions,
>  {
>  	struct mmu_interval_notifier *interval_sub;
>  	unsigned long cur_seq;
> +	LIST_HEAD(additional_passes);
> +	int err = 0;
>  
>  	for (interval_sub =
>  		     mn_itree_inv_start_range(subscriptions, range, &cur_seq);
> @@ -438,23 +471,39 @@ static int mn_itree_invalidate(struct mmu_notifier_subscriptions *subscriptions,
>  	     interval_sub = mn_itree_inv_next(interval_sub, range)) {
>  		bool ret;
>  
> -		ret = interval_sub->ops->invalidate(interval_sub, range,
> -						    cur_seq);
> +		if (interval_sub->ops->invalidate_multipass) {
> +			struct mmu_interval_notifier_pass *second = NULL;
> +
> +			ret = interval_sub->ops->invalidate_multipass(interval_sub,
> +								      range,
> +								      cur_seq,
> +								      &second);
> +			if (ret && second)
> +				list_add_tail(&second->link, &additional_passes);
> +
> +		} else {
> +			ret = interval_sub->ops->invalidate(interval_sub,
> +							    range,
> +							    cur_seq);
> +		}
>  		if (!ret) {
>  			if (WARN_ON(mmu_notifier_range_blockable(range)))
>  				continue;
> -			goto out_would_block;
> +			err = -EAGAIN;
> +			break;
>  		}
>  	}
> -	return 0;
>  
> -out_would_block:
> +	mn_itree_additional_passes(&additional_passes, range, cur_seq);
> +
>  	/*
>  	 * On -EAGAIN the non-blocking caller is not allowed to call
>  	 * invalidate_range_end()
>  	 */
> -	mn_itree_inv_end(subscriptions);
> -	return -EAGAIN;
> +	if (err)
> +		mn_itree_inv_end(subscriptions);
> +
> +	return err;
>  }
>  
>  static int mn_hlist_invalidate_range_start(
> -- 
> 2.50.1
> 
> 

Re: [RFC PATCH 1/6] mm/mmu_notifier: Allow multiple struct mmu_interval_notifier passes

[Thomas Hellström]

On Tue, 2025-08-19 at 19:55 +1000, Alistair Popple wrote:
> On Mon, Aug 18, 2025 at 01:46:55PM -0300, Jason Gunthorpe wrote:
> > On Mon, Aug 18, 2025 at 09:44:01AM -0700, Matthew Brost wrote:
> > > On Mon, Aug 18, 2025 at 01:36:17PM -0300, Jason Gunthorpe wrote:
> > > > On Mon, Aug 18, 2025 at 09:25:20AM -0700, Matthew Brost wrote:
> > > > > I think this choice makes sense: it allows embedding the wait
> > > > > state from
> > > > > the initial notifier call into the pass structure. Patch [6]
> > > > > shows this
> > > > > by attaching the issued TLB invalidation fences to the pass.
> > > > > Since a
> > > > > single notifier may be invoked multiple times with different
> > > > > ranges but
> > > > > the same seqno,
> > > > 
> > > > That should be explained, but also seems to be a bit of a
> > > > different
> > > > issue..
> > > > 
> > > > If the design is really to only have two passes and this linked
> > > > list
> > > > is about retaining state then there should not be so much
> > > > freedom to
> > > > have more passes.
> > > 
> > > I’ll let Thomas weigh in on whether we really need more than two
> > > passes;
> > > my feeling is that two passes are likely sufficient. It’s also
> > > worth
> > > noting that the linked list has an added benefit: the notifier
> > > tree only
> > > needs to be walked once (a small time-complexity win).
> > 
> > You may end up keeping the linked list just with no way to add a
> > third
> > pass.
> 
> It seems to me though that linked list still adds unnecessary
> complexity. I
> think this would all be much easier to follow if we just added two
> new callbacks
> - invalidate_start() and invalidate_end() say.

One thing that the linked list avoids, though, is traversing the
interval tree two times. It has O(n*log(n)) whereas the linked list
overhead is just O(n_2pass).

> 
> Admitedly that would still require the linked list (or something
> similar) to
> retain the ability to hold/pass a context between the start and end
> callbacks.
> Which is bit annoying, it's a pity we need to allocate memory in a
> performance
> sensitive path to effectively pass (at least in this case) a single
> pointer. I
> can't think of any obvious solutions to that though.

One idea is for any two-pass notifier implementation to use a small
pool. That would also to some extent mitigate the risk of out-of-memory
with GFP_NOWAIT.

/Thomas


> 
> > Jason
> > 

Re: [RFC PATCH 1/6] mm/mmu_notifier: Allow multiple struct mmu_interval_notifier passes

[Thomas Hellström]

On Tue, 2025-08-19 at 20:03 +1000, Alistair Popple wrote:
> On Sat, Aug 09, 2025 at 03:51:32PM +0200, Thomas Hellström wrote:
> > GPU use-cases for mmu_interval_notifiers with hmm often involve
> > starting a gpu operation and then waiting for it to complete.
> > These operations are typically context preemption or TLB flushing.
> > 
> > With single-pass notifiers per GPU this doesn't scale in
> > multi-gpu scenarios. In those scenarios we'd want to first start
> > preemption- or TLB flushing on all GPUs and as a second pass wait
> > for them to complete on all gpus.
> > 
> > One can do this on per-driver basis multiplexing per-driver
> > notifiers but that would mean sharing the notifier "user" lock
> > across all GPUs and that doesn't scale well either, so adding
> > support
> > for multi-pass in the core appears like the right choice.
> > 
> > Implement multi-pass capability in the mmu_interval_notifier. Use a
> > linked list for the additional passes to minimize the impact for
> > use-cases that don't need the multi-pass functionality.
> > 
> > Cc: Jason Gunthorpe <jgg@ziepe.ca>
> > Cc: Andrew Morton <akpm@linux-foundation.org>
> > Cc: Simona Vetter <simona.vetter@ffwll.ch>
> > Cc: Dave Airlie <airlied@gmail.com>
> > Cc: <dri-devel@lists.freedesktop.org>
> > Cc: <linux-mm@kvack.org>
> > Cc: <linux-kernel@vger.kernel.org>
> > 
> > Signed-off-by: Thomas Hellström <thomas.hellstrom@linux.intel.com>
> > ---
> >  include/linux/mmu_notifier.h | 30 ++++++++++++++++
> >  mm/mmu_notifier.c            | 67 +++++++++++++++++++++++++++++++-
> > ----
> >  2 files changed, 88 insertions(+), 9 deletions(-)
> > 
> > diff --git a/include/linux/mmu_notifier.h
> > b/include/linux/mmu_notifier.h
> > index d1094c2d5fb6..1107a8eafd8a 100644
> > --- a/include/linux/mmu_notifier.h
> > +++ b/include/linux/mmu_notifier.h
> > @@ -233,6 +233,32 @@ struct mmu_notifier {
> >  	unsigned int users;
> >  };
> >  
> > +/**
> > + * struct mmu_interval_notifier_pass - mmu_interval_notifier
> > multi-pass abstraction
> > + * @link: List link for the notifiers pending pass list
> > + *
> > + * Allocate, typically using GFP_NOWAIT in the interval notifier's
> > first pass.
> > + * If allocation fails (which is not unlikely under memory
> > pressure), fall back
> > + * to single-pass operation.
> > + */
> > +struct mmu_interval_notifier_pass {
> 
> If we limit the number of passes to two maybe call this
> `mmu_interval_notifier_finish()`? ...
> 
> > +	struct list_head link;
> > +	/**
> > +	 * @pass: Driver callback for additionall pass.
> > +	 * @additional_pass: Pointer to the
> > mmu_interval_notifier_pass structure.
> > +	 * @range: The mmu_notifier_range.
> > +	 * @cur_seq: The current sequence set by the first pass.
> > +	 *
> > +	 * Return: Either a pointer to a valid
> > mmu_interval_notifier_pass for
> > +	 * another pass to be called, or %NULL if processing is
> > complete for this
> > +	 * notifier. There is no error reporting mechanism for
> > additional passes.
> > +	 */
> > +	struct mmu_interval_notifier_pass *
> > +	(*pass) (struct mmu_interval_notifier_pass
> > *additional_pass,
> 

> 
> > +		 const struct mmu_notifier_range *range,
> > +		 unsigned long cur_seq);
> > +};
> > +
> >  /**
> >   * struct mmu_interval_notifier_ops
> >   * @invalidate: Upon return the caller must stop using any SPTEs
> > within this
> > @@ -243,6 +269,10 @@ struct mmu_interval_notifier_ops {
> >  	bool (*invalidate)(struct mmu_interval_notifier
> > *interval_sub,
> >  			   const struct mmu_notifier_range *range,
> >  			   unsigned long cur_seq);
> > +	bool (*invalidate_multipass)(struct mmu_interval_notifier
> > *interval_sub,
> 
> ... and then this could be called `invalidate_start()`. That might
> address some
> of the concerns with naming.

Makes sense. I'll have a look at that.

/Thomas


> 
> > +				     const struct
> > mmu_notifier_range *range,
> > +				     unsigned long cur_seq,
> > +				     struct
> > mmu_interval_notifier_pass **pass);
> >  };
> >  
> >  struct mmu_interval_notifier {
> > diff --git a/mm/mmu_notifier.c b/mm/mmu_notifier.c
> > index 8e0125dc0522..dd6af87db103 100644
> > --- a/mm/mmu_notifier.c
> > +++ b/mm/mmu_notifier.c
> > @@ -260,6 +260,22 @@ mmu_interval_read_begin(struct
> > mmu_interval_notifier *interval_sub)
> >  }
> >  EXPORT_SYMBOL_GPL(mmu_interval_read_begin);
> >  
> > +static void mn_itree_additional_passes(struct list_head
> > *additional_passes,
> > +				       const struct
> > mmu_notifier_range *range,
> > +				       unsigned long cur_seq)
> > +{
> > +	struct mmu_interval_notifier_pass *p, *next;
> > +
> > +	while (!list_empty(additional_passes)) {
> > +		list_for_each_entry_safe(p, next,
> > additional_passes, link) {
> > +			list_del_init(&p->link);
> > +			p = p->pass(p, range, cur_seq);
> > +			if (p)
> > +				list_add_tail(&p->link,
> > additional_passes);
> > +		}
> > +	}
> > +}
> > +
> >  static void mn_itree_release(struct mmu_notifier_subscriptions
> > *subscriptions,
> >  			     struct mm_struct *mm)
> >  {
> > @@ -272,17 +288,32 @@ static void mn_itree_release(struct
> > mmu_notifier_subscriptions *subscriptions,
> >  	};
> >  	struct mmu_interval_notifier *interval_sub;
> >  	unsigned long cur_seq;
> > +	LIST_HEAD(additional_passes);
> >  	bool ret;
> >  
> >  	for (interval_sub =
> >  		     mn_itree_inv_start_range(subscriptions,
> > &range, &cur_seq);
> >  	     interval_sub;
> >  	     interval_sub = mn_itree_inv_next(interval_sub,
> > &range)) {
> > -		ret = interval_sub->ops->invalidate(interval_sub,
> > &range,
> > -						    cur_seq);
> > +		if (interval_sub->ops->invalidate_multipass) {
> > +			struct mmu_interval_notifier_pass *second
> > = NULL;
> > +
> > +			ret = interval_sub->ops-
> > >invalidate_multipass(interval_sub,
> > +								  
> >     &range,
> > +								  
> >     cur_seq,
> > +								  
> >     &second);
> > +			if (ret && second)
> > +				list_add_tail(&second->link,
> > &additional_passes);
> > +
> > +		} else {
> > +			ret = interval_sub->ops-
> > >invalidate(interval_sub,
> > +							   
> > &range,
> > +							   
> > cur_seq);
> > +		}
> >  		WARN_ON(!ret);
> >  	}
> >  
> > +	mn_itree_additional_passes(&additional_passes, &range,
> > cur_seq);
> >  	mn_itree_inv_end(subscriptions);
> >  }
> >  
> > @@ -431,6 +462,8 @@ static int mn_itree_invalidate(struct
> > mmu_notifier_subscriptions *subscriptions,
> >  {
> >  	struct mmu_interval_notifier *interval_sub;
> >  	unsigned long cur_seq;
> > +	LIST_HEAD(additional_passes);
> > +	int err = 0;
> >  
> >  	for (interval_sub =
> >  		     mn_itree_inv_start_range(subscriptions,
> > range, &cur_seq);
> > @@ -438,23 +471,39 @@ static int mn_itree_invalidate(struct
> > mmu_notifier_subscriptions *subscriptions,
> >  	     interval_sub = mn_itree_inv_next(interval_sub,
> > range)) {
> >  		bool ret;
> >  
> > -		ret = interval_sub->ops->invalidate(interval_sub,
> > range,
> > -						    cur_seq);
> > +		if (interval_sub->ops->invalidate_multipass) {
> > +			struct mmu_interval_notifier_pass *second
> > = NULL;
> > +
> > +			ret = interval_sub->ops-
> > >invalidate_multipass(interval_sub,
> > +								  
> >     range,
> > +								  
> >     cur_seq,
> > +								  
> >     &second);
> > +			if (ret && second)
> > +				list_add_tail(&second->link,
> > &additional_passes);
> > +
> > +		} else {
> > +			ret = interval_sub->ops-
> > >invalidate(interval_sub,
> > +							    range,
> > +							   
> > cur_seq);
> > +		}
> >  		if (!ret) {
> >  			if
> > (WARN_ON(mmu_notifier_range_blockable(range)))
> >  				continue;
> > -			goto out_would_block;
> > +			err = -EAGAIN;
> > +			break;
> >  		}
> >  	}
> > -	return 0;
> >  
> > -out_would_block:
> > +	mn_itree_additional_passes(&additional_passes, range,
> > cur_seq);
> > +
> >  	/*
> >  	 * On -EAGAIN the non-blocking caller is not allowed to
> > call
> >  	 * invalidate_range_end()
> >  	 */
> > -	mn_itree_inv_end(subscriptions);
> > -	return -EAGAIN;
> > +	if (err)
> > +		mn_itree_inv_end(subscriptions);
> > +
> > +	return err;
> >  }
> >  
> >  static int mn_hlist_invalidate_range_start(
> > -- 
> > 2.50.1
> > 
> > 

Re: [RFC PATCH 1/6] mm/mmu_notifier: Allow multiple struct mmu_interval_notifier passes

[Matthew Brost]

On Tue, Aug 19, 2025 at 01:33:40PM +0200, Thomas Hellström wrote:
> On Tue, 2025-08-19 at 19:55 +1000, Alistair Popple wrote:
> > On Mon, Aug 18, 2025 at 01:46:55PM -0300, Jason Gunthorpe wrote:
> > > On Mon, Aug 18, 2025 at 09:44:01AM -0700, Matthew Brost wrote:
> > > > On Mon, Aug 18, 2025 at 01:36:17PM -0300, Jason Gunthorpe wrote:
> > > > > On Mon, Aug 18, 2025 at 09:25:20AM -0700, Matthew Brost wrote:
> > > > > > I think this choice makes sense: it allows embedding the wait
> > > > > > state from
> > > > > > the initial notifier call into the pass structure. Patch [6]
> > > > > > shows this
> > > > > > by attaching the issued TLB invalidation fences to the pass.
> > > > > > Since a
> > > > > > single notifier may be invoked multiple times with different
> > > > > > ranges but
> > > > > > the same seqno,
> > > > > 
> > > > > That should be explained, but also seems to be a bit of a
> > > > > different
> > > > > issue..
> > > > > 
> > > > > If the design is really to only have two passes and this linked
> > > > > list
> > > > > is about retaining state then there should not be so much
> > > > > freedom to
> > > > > have more passes.
> > > > 
> > > > I’ll let Thomas weigh in on whether we really need more than two
> > > > passes;
> > > > my feeling is that two passes are likely sufficient. It’s also
> > > > worth
> > > > noting that the linked list has an added benefit: the notifier
> > > > tree only
> > > > needs to be walked once (a small time-complexity win).
> > > 
> > > You may end up keeping the linked list just with no way to add a
> > > third
> > > pass.
> > 
> > It seems to me though that linked list still adds unnecessary
> > complexity. I
> > think this would all be much easier to follow if we just added two
> > new callbacks
> > - invalidate_start() and invalidate_end() say.
> 
> One thing that the linked list avoids, though, is traversing the
> interval tree two times. It has O(n*log(n)) whereas the linked list
> overhead is just O(n_2pass).
> 
> > 
> > Admitedly that would still require the linked list (or something
> > similar) to
> > retain the ability to hold/pass a context between the start and end
> > callbacks.
> > Which is bit annoying, it's a pity we need to allocate memory in a
> > performance
> > sensitive path to effectively pass (at least in this case) a single
> > pointer. I
> > can't think of any obvious solutions to that though.
> 
> One idea is for any two-pass notifier implementation to use a small
> pool. That would also to some extent mitigate the risk of out-of-memory
> with GFP_NOWAIT.
> 

I think we can attach a preallocated list entry to the driver-side
notifier state; then you’d only need to allocate (or block) if that
notifier is invoked more than once while a wait action (e.g., a TLB
invalidation) is outstanding. Multiple invocations are technically
possible, but in practice I’d expect them to be rare.

I’m not sure how much of a win this is, though. On Intel hardware, TLB
invalidations are several orders of magnitude slower than the software
steps our notifiers perform. Ultimately, whether to allocate or
preallocate is a driver-side choice.

Matt

> /Thomas
> 
> 
> > 
> > > Jason
> > > 
> 

Re: [RFC PATCH 1/6] mm/mmu_notifier: Allow multiple struct mmu_interval_notifier passes

[Thomas Hellström]

On Tue, 2025-08-19 at 08:35 -0700, Matthew Brost wrote:
> On Tue, Aug 19, 2025 at 01:33:40PM +0200, Thomas Hellström wrote:
> > On Tue, 2025-08-19 at 19:55 +1000, Alistair Popple wrote:
> > > On Mon, Aug 18, 2025 at 01:46:55PM -0300, Jason Gunthorpe wrote:
> > > > On Mon, Aug 18, 2025 at 09:44:01AM -0700, Matthew Brost wrote:
> > > > > On Mon, Aug 18, 2025 at 01:36:17PM -0300, Jason Gunthorpe
> > > > > wrote:
> > > > > > On Mon, Aug 18, 2025 at 09:25:20AM -0700, Matthew Brost
> > > > > > wrote:
> > > > > > > I think this choice makes sense: it allows embedding the
> > > > > > > wait
> > > > > > > state from
> > > > > > > the initial notifier call into the pass structure. Patch
> > > > > > > [6]
> > > > > > > shows this
> > > > > > > by attaching the issued TLB invalidation fences to the
> > > > > > > pass.
> > > > > > > Since a
> > > > > > > single notifier may be invoked multiple times with
> > > > > > > different
> > > > > > > ranges but
> > > > > > > the same seqno,
> > > > > > 
> > > > > > That should be explained, but also seems to be a bit of a
> > > > > > different
> > > > > > issue..
> > > > > > 
> > > > > > If the design is really to only have two passes and this
> > > > > > linked
> > > > > > list
> > > > > > is about retaining state then there should not be so much
> > > > > > freedom to
> > > > > > have more passes.
> > > > > 
> > > > > I’ll let Thomas weigh in on whether we really need more than
> > > > > two
> > > > > passes;
> > > > > my feeling is that two passes are likely sufficient. It’s
> > > > > also
> > > > > worth
> > > > > noting that the linked list has an added benefit: the
> > > > > notifier
> > > > > tree only
> > > > > needs to be walked once (a small time-complexity win).
> > > > 
> > > > You may end up keeping the linked list just with no way to add
> > > > a
> > > > third
> > > > pass.
> > > 
> > > It seems to me though that linked list still adds unnecessary
> > > complexity. I
> > > think this would all be much easier to follow if we just added
> > > two
> > > new callbacks
> > > - invalidate_start() and invalidate_end() say.
> > 
> > One thing that the linked list avoids, though, is traversing the
> > interval tree two times. It has O(n*log(n)) whereas the linked list
> > overhead is just O(n_2pass).
> > 
> > > 
> > > Admitedly that would still require the linked list (or something
> > > similar) to
> > > retain the ability to hold/pass a context between the start and
> > > end
> > > callbacks.
> > > Which is bit annoying, it's a pity we need to allocate memory in
> > > a
> > > performance
> > > sensitive path to effectively pass (at least in this case) a
> > > single
> > > pointer. I
> > > can't think of any obvious solutions to that though.
> > 
> > One idea is for any two-pass notifier implementation to use a small
> > pool. That would also to some extent mitigate the risk of out-of-
> > memory
> > with GFP_NOWAIT.
> > 
> 
> I think we can attach a preallocated list entry to the driver-side
> notifier state; then you’d only need to allocate (or block) if that
> notifier is invoked more than once while a wait action (e.g., a TLB
> invalidation) is outstanding. Multiple invocations are technically
> possible, but in practice I’d expect them to be rare.
> 
> I’m not sure how much of a win this is, though. On Intel hardware,
> TLB
> invalidations are several orders of magnitude slower than the
> software
> steps our notifiers perform. Ultimately, whether to allocate or
> preallocate is a driver-side choice.

I agree we shouldn't enforce anything at this point. But if we envision
a situation where multiple subsystem two-pass notifiers subscribe, the
GFP_NOWAIT memory might be exhausted by the notifiers called first. A
greedy behavior that might eventually cause serialization anyway.

So to behave nicely towards other notifier subscriptions, an
implementation should ideally have something pre-allocated.

/Thomas


> 
> Matt
> 
> > /Thomas
> > 
> > 
> > > 
> > > > Jason
> > > > 
> >