* [PATCH v3 0/3] Core Xe changes preparing for VF resume
@ 2025-08-18 17:22 Matthew Brost
2025-08-18 17:22 ` [PATCH v3 1/3] drm/xe: Save off position in ring in which a job was programmed Matthew Brost
` (5 more replies)
0 siblings, 6 replies; 16+ messages in thread
From: Matthew Brost @ 2025-08-18 17:22 UTC (permalink / raw)
To: intel-xe
Fixup a few known issues in Xe core code ahead of VF resume feature.
Small behavior changes in LR jobs, these now can be resubmitted. LR
queue's now have DRM scheduler flow control too which renders
xe_exec_compute_mode.non-blocking invalid.
Test-with: 20250818165742.2648473-1-matthew.brost@intel.com
v2:
- Fixup CI failures by ensuring DRM sched TDR never fires for LR jobs
v3:
- Don't adjust ring head on GT resets, this could break kernel queues
- Resend for CI with test with tag
Matt
Matthew Brost (3):
drm/xe: Save off position in ring in which a job was programmed
drm/xe/guc: Track pending-enable source in submission state
drm/xe: Track LR jobs in DRM scheduler pending list
drivers/gpu/drm/xe/xe_exec.c | 12 +---
drivers/gpu/drm/xe/xe_exec_queue.c | 19 ------
drivers/gpu/drm/xe/xe_exec_queue.h | 2 -
drivers/gpu/drm/xe/xe_guc_submit.c | 79 ++++++++++++++++++++-----
drivers/gpu/drm/xe/xe_ring_ops.c | 23 +++++--
drivers/gpu/drm/xe/xe_sched_job_types.h | 5 ++
6 files changed, 91 insertions(+), 49 deletions(-)
--
2.34.1
^ permalink raw reply [flat|nested] 16+ messages in thread
* [PATCH v3 1/3] drm/xe: Save off position in ring in which a job was programmed
2025-08-18 17:22 [PATCH v3 0/3] Core Xe changes preparing for VF resume Matthew Brost
@ 2025-08-18 17:22 ` Matthew Brost
2025-08-27 13:30 ` Lis, Tomasz
2025-08-18 17:22 ` [PATCH v3 2/3] drm/xe/guc: Track pending-enable source in submission state Matthew Brost
` (4 subsequent siblings)
5 siblings, 1 reply; 16+ messages in thread
From: Matthew Brost @ 2025-08-18 17:22 UTC (permalink / raw)
To: intel-xe
VF resume needs to modify the ring with updated GGTT addresses for
pending jobs. Save off position in ring in which a job was programmed to
facilitate.
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_ring_ops.c | 23 +++++++++++++++++++----
drivers/gpu/drm/xe/xe_sched_job_types.h | 5 +++++
2 files changed, 24 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
index 5f15360d14bf..4dad28f0614d 100644
--- a/drivers/gpu/drm/xe/xe_ring_ops.c
+++ b/drivers/gpu/drm/xe/xe_ring_ops.c
@@ -245,12 +245,14 @@ static int emit_copy_timestamp(struct xe_lrc *lrc, u32 *dw, int i)
/* for engines that don't require any special HW handling (no EUs, no aux inval, etc) */
static void __emit_job_gen12_simple(struct xe_sched_job *job, struct xe_lrc *lrc,
- u64 batch_addr, u32 seqno)
+ u64 batch_addr, u32 *head, u32 seqno)
{
u32 dw[MAX_JOB_SIZE_DW], i = 0;
u32 ppgtt_flag = get_ppgtt_flag(job);
struct xe_gt *gt = job->q->gt;
+ *head = lrc->ring.tail;
+
i = emit_copy_timestamp(lrc, dw, i);
if (job->ring_ops_flush_tlb) {
@@ -296,7 +298,7 @@ static bool has_aux_ccs(struct xe_device *xe)
}
static void __emit_job_gen12_video(struct xe_sched_job *job, struct xe_lrc *lrc,
- u64 batch_addr, u32 seqno)
+ u64 batch_addr, u32 *head, u32 seqno)
{
u32 dw[MAX_JOB_SIZE_DW], i = 0;
u32 ppgtt_flag = get_ppgtt_flag(job);
@@ -304,6 +306,8 @@ static void __emit_job_gen12_video(struct xe_sched_job *job, struct xe_lrc *lrc,
struct xe_device *xe = gt_to_xe(gt);
bool decode = job->q->class == XE_ENGINE_CLASS_VIDEO_DECODE;
+ *head = lrc->ring.tail;
+
i = emit_copy_timestamp(lrc, dw, i);
dw[i++] = preparser_disable(true);
@@ -346,7 +350,8 @@ static void __emit_job_gen12_video(struct xe_sched_job *job, struct xe_lrc *lrc,
static void __emit_job_gen12_render_compute(struct xe_sched_job *job,
struct xe_lrc *lrc,
- u64 batch_addr, u32 seqno)
+ u64 batch_addr, u32 *head,
+ u32 seqno)
{
u32 dw[MAX_JOB_SIZE_DW], i = 0;
u32 ppgtt_flag = get_ppgtt_flag(job);
@@ -355,6 +360,8 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job,
bool lacks_render = !(gt->info.engine_mask & XE_HW_ENGINE_RCS_MASK);
u32 mask_flags = 0;
+ *head = lrc->ring.tail;
+
i = emit_copy_timestamp(lrc, dw, i);
dw[i++] = preparser_disable(true);
@@ -396,11 +403,14 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job,
}
static void emit_migration_job_gen12(struct xe_sched_job *job,
- struct xe_lrc *lrc, u32 seqno)
+ struct xe_lrc *lrc, u32 *head,
+ u32 seqno)
{
u32 saddr = xe_lrc_start_seqno_ggtt_addr(lrc);
u32 dw[MAX_JOB_SIZE_DW], i = 0;
+ *head = lrc->ring.tail;
+
i = emit_copy_timestamp(lrc, dw, i);
i = emit_store_imm_ggtt(saddr, seqno, dw, i);
@@ -434,6 +444,7 @@ static void emit_job_gen12_gsc(struct xe_sched_job *job)
__emit_job_gen12_simple(job, job->q->lrc[0],
job->ptrs[0].batch_addr,
+ &job->ptrs[0].head,
xe_sched_job_lrc_seqno(job));
}
@@ -443,6 +454,7 @@ static void emit_job_gen12_copy(struct xe_sched_job *job)
if (xe_sched_job_is_migration(job->q)) {
emit_migration_job_gen12(job, job->q->lrc[0],
+ &job->ptrs[0].head,
xe_sched_job_lrc_seqno(job));
return;
}
@@ -450,6 +462,7 @@ static void emit_job_gen12_copy(struct xe_sched_job *job)
for (i = 0; i < job->q->width; ++i)
__emit_job_gen12_simple(job, job->q->lrc[i],
job->ptrs[i].batch_addr,
+ &job->ptrs[i].head,
xe_sched_job_lrc_seqno(job));
}
@@ -461,6 +474,7 @@ static void emit_job_gen12_video(struct xe_sched_job *job)
for (i = 0; i < job->q->width; ++i)
__emit_job_gen12_video(job, job->q->lrc[i],
job->ptrs[i].batch_addr,
+ &job->ptrs[i].head,
xe_sched_job_lrc_seqno(job));
}
@@ -471,6 +485,7 @@ static void emit_job_gen12_render_compute(struct xe_sched_job *job)
for (i = 0; i < job->q->width; ++i)
__emit_job_gen12_render_compute(job, job->q->lrc[i],
job->ptrs[i].batch_addr,
+ &job->ptrs[i].head,
xe_sched_job_lrc_seqno(job));
}
diff --git a/drivers/gpu/drm/xe/xe_sched_job_types.h b/drivers/gpu/drm/xe/xe_sched_job_types.h
index dbf260dded8d..7ce58765a34a 100644
--- a/drivers/gpu/drm/xe/xe_sched_job_types.h
+++ b/drivers/gpu/drm/xe/xe_sched_job_types.h
@@ -24,6 +24,11 @@ struct xe_job_ptrs {
struct dma_fence_chain *chain_fence;
/** @batch_addr: Batch buffer address. */
u64 batch_addr;
+ /**
+ * @head: The tail pointer of the LRC (so head pointer of job) when the
+ * job was submitted
+ */
+ u32 head;
};
/**
--
2.34.1
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v3 2/3] drm/xe/guc: Track pending-enable source in submission state
2025-08-18 17:22 [PATCH v3 0/3] Core Xe changes preparing for VF resume Matthew Brost
2025-08-18 17:22 ` [PATCH v3 1/3] drm/xe: Save off position in ring in which a job was programmed Matthew Brost
@ 2025-08-18 17:22 ` Matthew Brost
2025-08-27 13:56 ` Lis, Tomasz
2025-08-18 17:22 ` [PATCH v3 3/3] drm/xe: Track LR jobs in DRM scheduler pending list Matthew Brost
` (3 subsequent siblings)
5 siblings, 1 reply; 16+ messages in thread
From: Matthew Brost @ 2025-08-18 17:22 UTC (permalink / raw)
To: intel-xe
Add explicit tracking in the GuC submission state to record the source
of a pending enable (TDR vs. resume path vs. submission). Disambiguating
the origin lets the GuC submission state machine apply the correct
recovery/replay behavior.
This helps VF resume: when the device comes back, the state machine knows
whether the pending enable stems from timeout recovery, from a resume
sequence, or submission and can gate sequencing and fixups accordingly.
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_guc_submit.c | 36 ++++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index 1185b23b1384..9e4118126ef9 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -68,6 +68,8 @@ exec_queue_to_guc(struct xe_exec_queue *q)
#define EXEC_QUEUE_STATE_BANNED (1 << 9)
#define EXEC_QUEUE_STATE_CHECK_TIMEOUT (1 << 10)
#define EXEC_QUEUE_STATE_EXTRA_REF (1 << 11)
+#define EXEC_QUEUE_STATE_PENDING_RESUME (1 << 12)
+#define EXEC_QUEUE_STATE_PENDING_TDR_EXIT (1 << 13)
static bool exec_queue_registered(struct xe_exec_queue *q)
{
@@ -219,6 +221,36 @@ static void set_exec_queue_extra_ref(struct xe_exec_queue *q)
atomic_or(EXEC_QUEUE_STATE_EXTRA_REF, &q->guc->state);
}
+static bool __maybe_unused exec_queue_pending_resume(struct xe_exec_queue *q)
+{
+ return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_PENDING_RESUME;
+}
+
+static void set_exec_queue_pending_resume(struct xe_exec_queue *q)
+{
+ atomic_or(EXEC_QUEUE_STATE_PENDING_RESUME, &q->guc->state);
+}
+
+static void clear_exec_queue_pending_resume(struct xe_exec_queue *q)
+{
+ atomic_and(~EXEC_QUEUE_STATE_PENDING_RESUME, &q->guc->state);
+}
+
+static bool __maybe_unused exec_queue_pending_tdr_exit(struct xe_exec_queue *q)
+{
+ return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_PENDING_TDR_EXIT;
+}
+
+static void set_exec_queue_pending_tdr_exit(struct xe_exec_queue *q)
+{
+ atomic_or(EXEC_QUEUE_STATE_PENDING_TDR_EXIT, &q->guc->state);
+}
+
+static void clear_exec_queue_pending_tdr_exit(struct xe_exec_queue *q)
+{
+ atomic_and(~EXEC_QUEUE_STATE_PENDING_TDR_EXIT, &q->guc->state);
+}
+
static bool exec_queue_killed_or_banned_or_wedged(struct xe_exec_queue *q)
{
return (atomic_read(&q->guc->state) &
@@ -1344,6 +1376,7 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
return DRM_GPU_SCHED_STAT_RESET;
sched_enable:
+ set_exec_queue_pending_tdr_exit(q);
enable_scheduling(q);
rearm:
/*
@@ -1494,6 +1527,7 @@ static void __guc_exec_queue_process_msg_resume(struct xe_sched_msg *msg)
clear_exec_queue_suspended(q);
if (!exec_queue_enabled(q)) {
q->guc->resume_time = RESUME_PENDING;
+ set_exec_queue_pending_resume(q);
enable_scheduling(q);
}
} else {
@@ -2065,6 +2099,8 @@ static void handle_sched_done(struct xe_guc *guc, struct xe_exec_queue *q,
xe_gt_assert(guc_to_gt(guc), exec_queue_pending_enable(q));
q->guc->resume_time = ktime_get();
+ clear_exec_queue_pending_resume(q);
+ clear_exec_queue_pending_tdr_exit(q);
clear_exec_queue_pending_enable(q);
smp_wmb();
wake_up_all(&guc->ct.wq);
--
2.34.1
^ permalink raw reply related [flat|nested] 16+ messages in thread
* [PATCH v3 3/3] drm/xe: Track LR jobs in DRM scheduler pending list
2025-08-18 17:22 [PATCH v3 0/3] Core Xe changes preparing for VF resume Matthew Brost
2025-08-18 17:22 ` [PATCH v3 1/3] drm/xe: Save off position in ring in which a job was programmed Matthew Brost
2025-08-18 17:22 ` [PATCH v3 2/3] drm/xe/guc: Track pending-enable source in submission state Matthew Brost
@ 2025-08-18 17:22 ` Matthew Brost
2025-08-27 14:46 ` Lis, Tomasz
2025-08-18 18:17 ` ✓ CI.KUnit: success for Core Xe changes preparing for VF resume Patchwork
` (2 subsequent siblings)
5 siblings, 1 reply; 16+ messages in thread
From: Matthew Brost @ 2025-08-18 17:22 UTC (permalink / raw)
To: intel-xe
VF resume requires jobs to remain pending so they can be replayed after
the VF comes back. Previously, LR job fences were intentionally signaled
immediately after submission to avoid the risk of exporting them, as
these fences do not naturally signal in a timely manner and could break
dma-fence contracts. A side effect of this approach was that LR jobs
were never added to the DRM scheduler’s pending list, preventing them
from being tracked for later resubmission.
We now avoid signaling LR job fences and ensure they are never exported;
Xe already guards against exporting these internal fences. With that
guarantee in place, we can safely track LR jobs in the scheduler’s
pending list so they are eligible for resubmission during VF resume (and
similar recovery paths).
An added benefit is that LR queues now gain the DRM scheduler’s built-in
flow control over ring usage rather than rejecting new jobs in the exec
IOCTL if the ring is full.
v2:
- Ensure DRM scheduler TDR doesn't run for LR jobs
- Stack variable for killed_or_banned_or_wedged
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
---
drivers/gpu/drm/xe/xe_exec.c | 12 ++-------
drivers/gpu/drm/xe/xe_exec_queue.c | 19 -------------
drivers/gpu/drm/xe/xe_exec_queue.h | 2 --
drivers/gpu/drm/xe/xe_guc_submit.c | 43 ++++++++++++++++++++----------
4 files changed, 31 insertions(+), 45 deletions(-)
diff --git a/drivers/gpu/drm/xe/xe_exec.c b/drivers/gpu/drm/xe/xe_exec.c
index 44364c042ad7..b29b6edd59e0 100644
--- a/drivers/gpu/drm/xe/xe_exec.c
+++ b/drivers/gpu/drm/xe/xe_exec.c
@@ -117,7 +117,7 @@ int xe_exec_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
u32 i, num_syncs, num_ufence = 0;
struct xe_sched_job *job;
struct xe_vm *vm;
- bool write_locked, skip_retry = false;
+ bool write_locked;
ktime_t end = 0;
int err = 0;
struct xe_hw_engine_group *group;
@@ -256,12 +256,6 @@ int xe_exec_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
goto err_exec;
}
- if (xe_exec_queue_is_lr(q) && xe_exec_queue_ring_full(q)) {
- err = -EWOULDBLOCK; /* Aliased to -EAGAIN */
- skip_retry = true;
- goto err_exec;
- }
-
if (xe_exec_queue_uses_pxp(q)) {
err = xe_vm_validate_protected(q->vm);
if (err)
@@ -318,8 +312,6 @@ int xe_exec_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
xe_sched_job_init_user_fence(job, &syncs[i]);
}
- if (xe_exec_queue_is_lr(q))
- q->ring_ops->emit_job(job);
if (!xe_vm_in_lr_mode(vm))
xe_exec_queue_last_fence_set(q, vm, &job->drm.s_fence->finished);
xe_sched_job_push(job);
@@ -344,7 +336,7 @@ int xe_exec_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
drm_exec_fini(exec);
err_unlock_list:
up_read(&vm->lock);
- if (err == -EAGAIN && !skip_retry)
+ if (err == -EAGAIN)
goto retry;
err_hw_exec_mode:
if (mode == EXEC_MODE_DMA_FENCE)
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
index 2d10a53f701d..6f901139e06e 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.c
+++ b/drivers/gpu/drm/xe/xe_exec_queue.c
@@ -816,25 +816,6 @@ bool xe_exec_queue_is_lr(struct xe_exec_queue *q)
!(q->flags & EXEC_QUEUE_FLAG_VM);
}
-static s32 xe_exec_queue_num_job_inflight(struct xe_exec_queue *q)
-{
- return q->lrc[0]->fence_ctx.next_seqno - xe_lrc_seqno(q->lrc[0]) - 1;
-}
-
-/**
- * xe_exec_queue_ring_full() - Whether an exec_queue's ring is full
- * @q: The exec_queue
- *
- * Return: True if the exec_queue's ring is full, false otherwise.
- */
-bool xe_exec_queue_ring_full(struct xe_exec_queue *q)
-{
- struct xe_lrc *lrc = q->lrc[0];
- s32 max_job = lrc->ring.size / MAX_JOB_SIZE_BYTES;
-
- return xe_exec_queue_num_job_inflight(q) >= max_job;
-}
-
/**
* xe_exec_queue_is_idle() - Whether an exec_queue is idle.
* @q: The exec_queue
diff --git a/drivers/gpu/drm/xe/xe_exec_queue.h b/drivers/gpu/drm/xe/xe_exec_queue.h
index 15ec852e7f7e..6ae11a1c7404 100644
--- a/drivers/gpu/drm/xe/xe_exec_queue.h
+++ b/drivers/gpu/drm/xe/xe_exec_queue.h
@@ -64,8 +64,6 @@ static inline bool xe_exec_queue_uses_pxp(struct xe_exec_queue *q)
bool xe_exec_queue_is_lr(struct xe_exec_queue *q);
-bool xe_exec_queue_ring_full(struct xe_exec_queue *q);
-
bool xe_exec_queue_is_idle(struct xe_exec_queue *q);
void xe_exec_queue_kill(struct xe_exec_queue *q);
diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
index 9e4118126ef9..69ed3c159d10 100644
--- a/drivers/gpu/drm/xe/xe_guc_submit.c
+++ b/drivers/gpu/drm/xe/xe_guc_submit.c
@@ -837,30 +837,31 @@ guc_exec_queue_run_job(struct drm_sched_job *drm_job)
struct xe_sched_job *job = to_xe_sched_job(drm_job);
struct xe_exec_queue *q = job->q;
struct xe_guc *guc = exec_queue_to_guc(q);
- struct dma_fence *fence = NULL;
- bool lr = xe_exec_queue_is_lr(q);
+ bool lr = xe_exec_queue_is_lr(q), killed_or_banned_or_wedged =
+ exec_queue_killed_or_banned_or_wedged(q);
xe_gt_assert(guc_to_gt(guc), !(exec_queue_destroyed(q) || exec_queue_pending_disable(q)) ||
exec_queue_banned(q) || exec_queue_suspended(q));
trace_xe_sched_job_run(job);
- if (!exec_queue_killed_or_banned_or_wedged(q) && !xe_sched_job_is_error(job)) {
+ if (!killed_or_banned_or_wedged && !xe_sched_job_is_error(job)) {
if (!exec_queue_registered(q))
register_exec_queue(q, GUC_CONTEXT_NORMAL);
- if (!lr) /* LR jobs are emitted in the exec IOCTL */
- q->ring_ops->emit_job(job);
+ q->ring_ops->emit_job(job);
submit_exec_queue(q);
}
- if (lr) {
- xe_sched_job_set_error(job, -EOPNOTSUPP);
- dma_fence_put(job->fence); /* Drop ref from xe_sched_job_arm */
- } else {
- fence = job->fence;
- }
+ /*
+ * We don't care about job-fence ordering in LR VMs because these fences
+ * are never exported; they are used solely to keep jobs on the pending
+ * list. Once a queue enters an error state, there's no need to track
+ * them.
+ */
+ if (killed_or_banned_or_wedged && lr)
+ xe_sched_job_set_error(job, -ECANCELED);
- return fence;
+ return job->fence;
}
/**
@@ -926,7 +927,8 @@ static void disable_scheduling_deregister(struct xe_guc *guc,
xe_gt_warn(q->gt, "Pending enable/disable failed to respond\n");
xe_sched_submission_start(sched);
xe_gt_reset_async(q->gt);
- xe_sched_tdr_queue_imm(sched);
+ if (!xe_exec_queue_is_lr(q))
+ xe_sched_tdr_queue_imm(sched);
return;
}
@@ -1018,6 +1020,7 @@ static void xe_guc_exec_queue_lr_cleanup(struct work_struct *w)
struct xe_exec_queue *q = ge->q;
struct xe_guc *guc = exec_queue_to_guc(q);
struct xe_gpu_scheduler *sched = &ge->sched;
+ struct xe_sched_job *job;
bool wedged = false;
xe_gt_assert(guc_to_gt(guc), xe_exec_queue_is_lr(q));
@@ -1068,7 +1071,16 @@ static void xe_guc_exec_queue_lr_cleanup(struct work_struct *w)
if (!exec_queue_killed(q) && !xe_lrc_ring_is_idle(q->lrc[0]))
xe_devcoredump(q, NULL, "LR job cleanup, guc_id=%d", q->guc->id);
+ xe_hw_fence_irq_stop(q->fence_irq);
+
xe_sched_submission_start(sched);
+
+ spin_lock(&sched->base.job_list_lock);
+ list_for_each_entry(job, &sched->base.pending_list, drm.list)
+ xe_sched_job_set_error(job, -ECANCELED);
+ spin_unlock(&sched->base.job_list_lock);
+
+ xe_hw_fence_irq_start(q->fence_irq);
}
#define ADJUST_FIVE_PERCENT(__t) mul_u64_u32_div(__t, 105, 100)
@@ -1139,7 +1151,8 @@ static void enable_scheduling(struct xe_exec_queue *q)
xe_gt_warn(guc_to_gt(guc), "Schedule enable failed to respond");
set_exec_queue_banned(q);
xe_gt_reset_async(q->gt);
- xe_sched_tdr_queue_imm(&q->guc->sched);
+ if (!xe_exec_queue_is_lr(q))
+ xe_sched_tdr_queue_imm(&q->guc->sched);
}
}
@@ -1197,6 +1210,8 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
int i = 0;
bool wedged = false, skip_timeout_check;
+ xe_gt_assert(guc_to_gt(guc), !xe_exec_queue_is_lr(q));
+
/*
* TDR has fired before free job worker. Common if exec queue
* immediately closed after last fence signaled. Add back to pending
--
2.34.1
^ permalink raw reply related [flat|nested] 16+ messages in thread
* ✓ CI.KUnit: success for Core Xe changes preparing for VF resume
2025-08-18 17:22 [PATCH v3 0/3] Core Xe changes preparing for VF resume Matthew Brost
` (2 preceding siblings ...)
2025-08-18 17:22 ` [PATCH v3 3/3] drm/xe: Track LR jobs in DRM scheduler pending list Matthew Brost
@ 2025-08-18 18:17 ` Patchwork
2025-08-18 19:36 ` ✓ Xe.CI.BAT: " Patchwork
2025-08-19 12:52 ` ✗ Xe.CI.Full: failure " Patchwork
5 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2025-08-18 18:17 UTC (permalink / raw)
To: Matthew Brost; +Cc: intel-xe
== Series Details ==
Series: Core Xe changes preparing for VF resume
URL : https://patchwork.freedesktop.org/series/153083/
State : success
== Summary ==
+ trap cleanup EXIT
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/xe/.kunitconfig
[18:15:48] Configuring KUnit Kernel ...
Generating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:15:52] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[18:16:27] Starting KUnit Kernel (1/1)...
[18:16:27] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:16:27] ================== guc_buf (11 subtests) ===================
[18:16:27] [PASSED] test_smallest
[18:16:27] [PASSED] test_largest
[18:16:27] [PASSED] test_granular
[18:16:27] [PASSED] test_unique
[18:16:27] [PASSED] test_overlap
[18:16:27] [PASSED] test_reusable
[18:16:27] [PASSED] test_too_big
[18:16:27] [PASSED] test_flush
[18:16:27] [PASSED] test_lookup
[18:16:27] [PASSED] test_data
[18:16:27] [PASSED] test_class
[18:16:27] ===================== [PASSED] guc_buf =====================
[18:16:27] =================== guc_dbm (7 subtests) ===================
[18:16:27] [PASSED] test_empty
[18:16:27] [PASSED] test_default
[18:16:27] ======================== test_size ========================
[18:16:27] [PASSED] 4
[18:16:27] [PASSED] 8
[18:16:27] [PASSED] 32
[18:16:27] [PASSED] 256
[18:16:27] ==================== [PASSED] test_size ====================
[18:16:27] ======================= test_reuse ========================
[18:16:27] [PASSED] 4
[18:16:27] [PASSED] 8
[18:16:27] [PASSED] 32
[18:16:27] [PASSED] 256
[18:16:27] =================== [PASSED] test_reuse ====================
[18:16:27] =================== test_range_overlap ====================
[18:16:27] [PASSED] 4
[18:16:27] [PASSED] 8
[18:16:27] [PASSED] 32
[18:16:27] [PASSED] 256
[18:16:27] =============== [PASSED] test_range_overlap ================
[18:16:27] =================== test_range_compact ====================
[18:16:27] [PASSED] 4
[18:16:27] [PASSED] 8
[18:16:27] [PASSED] 32
[18:16:27] [PASSED] 256
[18:16:27] =============== [PASSED] test_range_compact ================
[18:16:27] ==================== test_range_spare =====================
[18:16:27] [PASSED] 4
[18:16:27] [PASSED] 8
[18:16:27] [PASSED] 32
[18:16:27] [PASSED] 256
[18:16:27] ================ [PASSED] test_range_spare =================
[18:16:27] ===================== [PASSED] guc_dbm =====================
[18:16:27] =================== guc_idm (6 subtests) ===================
[18:16:27] [PASSED] bad_init
[18:16:27] [PASSED] no_init
[18:16:27] [PASSED] init_fini
[18:16:27] [PASSED] check_used
[18:16:28] [PASSED] check_quota
[18:16:28] [PASSED] check_all
[18:16:28] ===================== [PASSED] guc_idm =====================
[18:16:28] ================== no_relay (3 subtests) ===================
[18:16:28] [PASSED] xe_drops_guc2pf_if_not_ready
[18:16:28] [PASSED] xe_drops_guc2vf_if_not_ready
[18:16:28] [PASSED] xe_rejects_send_if_not_ready
[18:16:28] ==================== [PASSED] no_relay =====================
[18:16:28] ================== pf_relay (14 subtests) ==================
[18:16:28] [PASSED] pf_rejects_guc2pf_too_short
[18:16:28] [PASSED] pf_rejects_guc2pf_too_long
[18:16:28] [PASSED] pf_rejects_guc2pf_no_payload
[18:16:28] [PASSED] pf_fails_no_payload
[18:16:28] [PASSED] pf_fails_bad_origin
[18:16:28] [PASSED] pf_fails_bad_type
[18:16:28] [PASSED] pf_txn_reports_error
[18:16:28] [PASSED] pf_txn_sends_pf2guc
[18:16:28] [PASSED] pf_sends_pf2guc
[18:16:28] [SKIPPED] pf_loopback_nop
[18:16:28] [SKIPPED] pf_loopback_echo
[18:16:28] [SKIPPED] pf_loopback_fail
[18:16:28] [SKIPPED] pf_loopback_busy
[18:16:28] [SKIPPED] pf_loopback_retry
[18:16:28] ==================== [PASSED] pf_relay =====================
[18:16:28] ================== vf_relay (3 subtests) ===================
[18:16:28] [PASSED] vf_rejects_guc2vf_too_short
[18:16:28] [PASSED] vf_rejects_guc2vf_too_long
[18:16:28] [PASSED] vf_rejects_guc2vf_no_payload
[18:16:28] ==================== [PASSED] vf_relay =====================
[18:16:28] ===================== lmtt (1 subtest) =====================
[18:16:28] ======================== test_ops =========================
[18:16:28] [PASSED] 2-level
[18:16:28] [PASSED] multi-level
[18:16:28] ==================== [PASSED] test_ops =====================
[18:16:28] ====================== [PASSED] lmtt =======================
[18:16:28] ================= pf_service (11 subtests) =================
[18:16:28] [PASSED] pf_negotiate_any
[18:16:28] [PASSED] pf_negotiate_base_match
[18:16:28] [PASSED] pf_negotiate_base_newer
[18:16:28] [PASSED] pf_negotiate_base_next
[18:16:28] [SKIPPED] pf_negotiate_base_older
[18:16:28] [PASSED] pf_negotiate_base_prev
[18:16:28] [PASSED] pf_negotiate_latest_match
[18:16:28] [PASSED] pf_negotiate_latest_newer
[18:16:28] [PASSED] pf_negotiate_latest_next
[18:16:28] [SKIPPED] pf_negotiate_latest_older
[18:16:28] [SKIPPED] pf_negotiate_latest_prev
[18:16:28] =================== [PASSED] pf_service ====================
[18:16:28] =================== xe_mocs (2 subtests) ===================
[18:16:28] ================ xe_live_mocs_kernel_kunit ================
[18:16:28] =========== [SKIPPED] xe_live_mocs_kernel_kunit ============
[18:16:28] ================ xe_live_mocs_reset_kunit =================
[18:16:28] ============ [SKIPPED] xe_live_mocs_reset_kunit ============
[18:16:28] ==================== [SKIPPED] xe_mocs =====================
[18:16:28] ================= xe_migrate (2 subtests) ==================
[18:16:28] ================= xe_migrate_sanity_kunit =================
[18:16:28] ============ [SKIPPED] xe_migrate_sanity_kunit =============
[18:16:28] ================== xe_validate_ccs_kunit ==================
[18:16:28] ============= [SKIPPED] xe_validate_ccs_kunit ==============
[18:16:28] =================== [SKIPPED] xe_migrate ===================
[18:16:28] ================== xe_dma_buf (1 subtest) ==================
[18:16:28] ==================== xe_dma_buf_kunit =====================
[18:16:28] ================ [SKIPPED] xe_dma_buf_kunit ================
[18:16:28] =================== [SKIPPED] xe_dma_buf ===================
[18:16:28] ================= xe_bo_shrink (1 subtest) =================
[18:16:28] =================== xe_bo_shrink_kunit ====================
[18:16:28] =============== [SKIPPED] xe_bo_shrink_kunit ===============
[18:16:28] ================== [SKIPPED] xe_bo_shrink ==================
[18:16:28] ==================== xe_bo (2 subtests) ====================
[18:16:28] ================== xe_ccs_migrate_kunit ===================
[18:16:28] ============== [SKIPPED] xe_ccs_migrate_kunit ==============
[18:16:28] ==================== xe_bo_evict_kunit ====================
[18:16:28] =============== [SKIPPED] xe_bo_evict_kunit ================
[18:16:28] ===================== [SKIPPED] xe_bo ======================
[18:16:28] ==================== args (11 subtests) ====================
[18:16:28] [PASSED] count_args_test
[18:16:28] [PASSED] call_args_example
[18:16:28] [PASSED] call_args_test
[18:16:28] [PASSED] drop_first_arg_example
[18:16:28] [PASSED] drop_first_arg_test
[18:16:28] [PASSED] first_arg_example
[18:16:28] [PASSED] first_arg_test
[18:16:28] [PASSED] last_arg_example
[18:16:28] [PASSED] last_arg_test
[18:16:28] [PASSED] pick_arg_example
[18:16:28] [PASSED] sep_comma_example
[18:16:28] ====================== [PASSED] args =======================
[18:16:28] =================== xe_pci (3 subtests) ====================
[18:16:28] ==================== check_graphics_ip ====================
[18:16:28] [PASSED] 12.70 Xe_LPG
[18:16:28] [PASSED] 12.71 Xe_LPG
[18:16:28] [PASSED] 12.74 Xe_LPG+
[18:16:28] [PASSED] 20.01 Xe2_HPG
[18:16:28] [PASSED] 20.02 Xe2_HPG
[18:16:28] [PASSED] 20.04 Xe2_LPG
[18:16:28] [PASSED] 30.00 Xe3_LPG
[18:16:28] [PASSED] 30.01 Xe3_LPG
[18:16:28] [PASSED] 30.03 Xe3_LPG
[18:16:28] ================ [PASSED] check_graphics_ip ================
[18:16:28] ===================== check_media_ip ======================
[18:16:28] [PASSED] 13.00 Xe_LPM+
[18:16:28] [PASSED] 13.01 Xe2_HPM
[18:16:28] [PASSED] 20.00 Xe2_LPM
[18:16:28] [PASSED] 30.00 Xe3_LPM
[18:16:28] [PASSED] 30.02 Xe3_LPM
[18:16:28] ================= [PASSED] check_media_ip ==================
[18:16:28] ================= check_platform_gt_count =================
[18:16:28] [PASSED] 0x9A60 (TIGERLAKE)
[18:16:28] [PASSED] 0x9A68 (TIGERLAKE)
[18:16:28] [PASSED] 0x9A70 (TIGERLAKE)
[18:16:28] [PASSED] 0x9A40 (TIGERLAKE)
[18:16:28] [PASSED] 0x9A49 (TIGERLAKE)
[18:16:28] [PASSED] 0x9A59 (TIGERLAKE)
[18:16:28] [PASSED] 0x9A78 (TIGERLAKE)
[18:16:28] [PASSED] 0x9AC0 (TIGERLAKE)
[18:16:28] [PASSED] 0x9AC9 (TIGERLAKE)
[18:16:28] [PASSED] 0x9AD9 (TIGERLAKE)
[18:16:28] [PASSED] 0x9AF8 (TIGERLAKE)
[18:16:28] [PASSED] 0x4C80 (ROCKETLAKE)
[18:16:28] [PASSED] 0x4C8A (ROCKETLAKE)
[18:16:28] [PASSED] 0x4C8B (ROCKETLAKE)
[18:16:28] [PASSED] 0x4C8C (ROCKETLAKE)
[18:16:28] [PASSED] 0x4C90 (ROCKETLAKE)
[18:16:28] [PASSED] 0x4C9A (ROCKETLAKE)
[18:16:28] [PASSED] 0x4680 (ALDERLAKE_S)
[18:16:28] [PASSED] 0x4682 (ALDERLAKE_S)
[18:16:28] [PASSED] 0x4688 (ALDERLAKE_S)
[18:16:28] [PASSED] 0x468A (ALDERLAKE_S)
[18:16:28] [PASSED] 0x468B (ALDERLAKE_S)
[18:16:28] [PASSED] 0x4690 (ALDERLAKE_S)
[18:16:28] [PASSED] 0x4692 (ALDERLAKE_S)
[18:16:28] [PASSED] 0x4693 (ALDERLAKE_S)
[18:16:28] [PASSED] 0x46A0 (ALDERLAKE_P)
[18:16:28] [PASSED] 0x46A1 (ALDERLAKE_P)
[18:16:28] [PASSED] 0x46A2 (ALDERLAKE_P)
[18:16:28] [PASSED] 0x46A3 (ALDERLAKE_P)
[18:16:28] [PASSED] 0x46A6 (ALDERLAKE_P)
[18:16:28] [PASSED] 0x46A8 (ALDERLAKE_P)
[18:16:28] [PASSED] 0x46AA (ALDERLAKE_P)
[18:16:28] [PASSED] 0x462A (ALDERLAKE_P)
[18:16:28] [PASSED] 0x4626 (ALDERLAKE_P)
[18:16:28] [PASSED] 0x4628 (ALDERLAKE_P)
[18:16:28] [PASSED] 0x46B0 (ALDERLAKE_P)
[18:16:28] [PASSED] 0x46B1 (ALDERLAKE_P)
[18:16:28] [PASSED] 0x46B2 (ALDERLAKE_P)
[18:16:28] [PASSED] 0x46B3 (ALDERLAKE_P)
[18:16:28] [PASSED] 0x46C0 (ALDERLAKE_P)
[18:16:28] [PASSED] 0x46C1 (ALDERLAKE_P)
[18:16:28] [PASSED] 0x46C2 (ALDERLAKE_P)
[18:16:28] [PASSED] 0x46C3 (ALDERLAKE_P)
[18:16:28] [PASSED] 0x46D0 (ALDERLAKE_N)
[18:16:28] [PASSED] 0x46D1 (ALDERLAKE_N)
[18:16:28] [PASSED] 0x46D2 (ALDERLAKE_N)
[18:16:28] [PASSED] 0x46D3 (ALDERLAKE_N)
[18:16:28] [PASSED] 0x46D4 (ALDERLAKE_N)
[18:16:28] [PASSED] 0xA721 (ALDERLAKE_P)
[18:16:28] [PASSED] 0xA7A1 (ALDERLAKE_P)
[18:16:28] [PASSED] 0xA7A9 (ALDERLAKE_P)
[18:16:28] [PASSED] 0xA7AC (ALDERLAKE_P)
[18:16:28] [PASSED] 0xA7AD (ALDERLAKE_P)
[18:16:28] [PASSED] 0xA720 (ALDERLAKE_P)
[18:16:28] [PASSED] 0xA7A0 (ALDERLAKE_P)
[18:16:28] [PASSED] 0xA7A8 (ALDERLAKE_P)
[18:16:28] [PASSED] 0xA7AA (ALDERLAKE_P)
[18:16:28] [PASSED] 0xA7AB (ALDERLAKE_P)
[18:16:28] [PASSED] 0xA780 (ALDERLAKE_S)
[18:16:28] [PASSED] 0xA781 (ALDERLAKE_S)
[18:16:28] [PASSED] 0xA782 (ALDERLAKE_S)
[18:16:28] [PASSED] 0xA783 (ALDERLAKE_S)
[18:16:28] [PASSED] 0xA788 (ALDERLAKE_S)
[18:16:28] [PASSED] 0xA789 (ALDERLAKE_S)
[18:16:28] [PASSED] 0xA78A (ALDERLAKE_S)
[18:16:28] [PASSED] 0xA78B (ALDERLAKE_S)
[18:16:28] [PASSED] 0x4905 (DG1)
[18:16:28] [PASSED] 0x4906 (DG1)
[18:16:28] [PASSED] 0x4907 (DG1)
[18:16:28] [PASSED] 0x4908 (DG1)
[18:16:28] [PASSED] 0x4909 (DG1)
[18:16:28] [PASSED] 0x56C0 (DG2)
[18:16:28] [PASSED] 0x56C2 (DG2)
[18:16:28] [PASSED] 0x56C1 (DG2)
[18:16:28] [PASSED] 0x7D51 (METEORLAKE)
[18:16:28] [PASSED] 0x7DD1 (METEORLAKE)
[18:16:28] [PASSED] 0x7D41 (METEORLAKE)
[18:16:28] [PASSED] 0x7D67 (METEORLAKE)
[18:16:28] [PASSED] 0xB640 (METEORLAKE)
[18:16:28] [PASSED] 0x56A0 (DG2)
[18:16:28] [PASSED] 0x56A1 (DG2)
[18:16:28] [PASSED] 0x56A2 (DG2)
[18:16:28] [PASSED] 0x56BE (DG2)
[18:16:28] [PASSED] 0x56BF (DG2)
[18:16:28] [PASSED] 0x5690 (DG2)
[18:16:28] [PASSED] 0x5691 (DG2)
[18:16:28] [PASSED] 0x5692 (DG2)
[18:16:28] [PASSED] 0x56A5 (DG2)
[18:16:28] [PASSED] 0x56A6 (DG2)
[18:16:28] [PASSED] 0x56B0 (DG2)
[18:16:28] [PASSED] 0x56B1 (DG2)
[18:16:28] [PASSED] 0x56BA (DG2)
[18:16:28] [PASSED] 0x56BB (DG2)
[18:16:28] [PASSED] 0x56BC (DG2)
[18:16:28] [PASSED] 0x56BD (DG2)
[18:16:28] [PASSED] 0x5693 (DG2)
[18:16:28] [PASSED] 0x5694 (DG2)
[18:16:28] [PASSED] 0x5695 (DG2)
[18:16:28] [PASSED] 0x56A3 (DG2)
[18:16:28] [PASSED] 0x56A4 (DG2)
[18:16:28] [PASSED] 0x56B2 (DG2)
[18:16:28] [PASSED] 0x56B3 (DG2)
[18:16:28] [PASSED] 0x5696 (DG2)
[18:16:28] [PASSED] 0x5697 (DG2)
[18:16:28] [PASSED] 0xB69 (PVC)
[18:16:28] [PASSED] 0xB6E (PVC)
[18:16:28] [PASSED] 0xBD4 (PVC)
[18:16:28] [PASSED] 0xBD5 (PVC)
[18:16:28] [PASSED] 0xBD6 (PVC)
[18:16:28] [PASSED] 0xBD7 (PVC)
[18:16:28] [PASSED] 0xBD8 (PVC)
[18:16:28] [PASSED] 0xBD9 (PVC)
[18:16:28] [PASSED] 0xBDA (PVC)
[18:16:28] [PASSED] 0xBDB (PVC)
[18:16:28] [PASSED] 0xBE0 (PVC)
[18:16:28] [PASSED] 0xBE1 (PVC)
[18:16:28] [PASSED] 0xBE5 (PVC)
[18:16:28] [PASSED] 0x7D40 (METEORLAKE)
[18:16:28] [PASSED] 0x7D45 (METEORLAKE)
[18:16:28] [PASSED] 0x7D55 (METEORLAKE)
[18:16:28] [PASSED] 0x7D60 (METEORLAKE)
[18:16:28] [PASSED] 0x7DD5 (METEORLAKE)
[18:16:28] [PASSED] 0x6420 (LUNARLAKE)
[18:16:28] [PASSED] 0x64A0 (LUNARLAKE)
[18:16:28] [PASSED] 0x64B0 (LUNARLAKE)
[18:16:28] [PASSED] 0xE202 (BATTLEMAGE)
[18:16:28] [PASSED] 0xE209 (BATTLEMAGE)
[18:16:28] [PASSED] 0xE20B (BATTLEMAGE)
[18:16:28] [PASSED] 0xE20C (BATTLEMAGE)
[18:16:28] [PASSED] 0xE20D (BATTLEMAGE)
[18:16:28] [PASSED] 0xE210 (BATTLEMAGE)
[18:16:28] [PASSED] 0xE211 (BATTLEMAGE)
[18:16:28] [PASSED] 0xE212 (BATTLEMAGE)
[18:16:28] [PASSED] 0xE216 (BATTLEMAGE)
[18:16:28] [PASSED] 0xE220 (BATTLEMAGE)
[18:16:28] [PASSED] 0xE221 (BATTLEMAGE)
[18:16:28] [PASSED] 0xE222 (BATTLEMAGE)
[18:16:28] [PASSED] 0xE223 (BATTLEMAGE)
[18:16:28] [PASSED] 0xB080 (PANTHERLAKE)
[18:16:28] [PASSED] 0xB081 (PANTHERLAKE)
[18:16:28] [PASSED] 0xB082 (PANTHERLAKE)
[18:16:28] [PASSED] 0xB083 (PANTHERLAKE)
[18:16:28] [PASSED] 0xB084 (PANTHERLAKE)
[18:16:28] [PASSED] 0xB085 (PANTHERLAKE)
[18:16:28] [PASSED] 0xB086 (PANTHERLAKE)
[18:16:28] [PASSED] 0xB087 (PANTHERLAKE)
[18:16:28] [PASSED] 0xB08F (PANTHERLAKE)
[18:16:28] [PASSED] 0xB090 (PANTHERLAKE)
[18:16:28] [PASSED] 0xB0A0 (PANTHERLAKE)
[18:16:28] [PASSED] 0xB0B0 (PANTHERLAKE)
[18:16:28] [PASSED] 0xFD80 (PANTHERLAKE)
[18:16:28] [PASSED] 0xFD81 (PANTHERLAKE)
[18:16:28] ============= [PASSED] check_platform_gt_count =============
[18:16:28] ===================== [PASSED] xe_pci ======================
[18:16:28] =================== xe_rtp (2 subtests) ====================
[18:16:28] =============== xe_rtp_process_to_sr_tests ================
[18:16:28] [PASSED] coalesce-same-reg
[18:16:28] [PASSED] no-match-no-add
[18:16:28] [PASSED] match-or
[18:16:28] [PASSED] match-or-xfail
[18:16:28] [PASSED] no-match-no-add-multiple-rules
[18:16:28] [PASSED] two-regs-two-entries
[18:16:28] [PASSED] clr-one-set-other
[18:16:28] [PASSED] set-field
[18:16:28] [PASSED] conflict-duplicate
[18:16:28] [PASSED] conflict-not-disjoint
[18:16:28] [PASSED] conflict-reg-type
[18:16:28] =========== [PASSED] xe_rtp_process_to_sr_tests ============
[18:16:28] ================== xe_rtp_process_tests ===================
[18:16:28] [PASSED] active1
[18:16:28] [PASSED] active2
[18:16:28] [PASSED] active-inactive
[18:16:28] [PASSED] inactive-active
[18:16:28] [PASSED] inactive-1st_or_active-inactive
[18:16:28] [PASSED] inactive-2nd_or_active-inactive
[18:16:28] [PASSED] inactive-last_or_active-inactive
[18:16:28] [PASSED] inactive-no_or_active-inactive
[18:16:28] ============== [PASSED] xe_rtp_process_tests ===============
[18:16:28] ===================== [PASSED] xe_rtp ======================
[18:16:28] ==================== xe_wa (1 subtest) =====================
[18:16:28] ======================== xe_wa_gt =========================
[18:16:28] [PASSED] TIGERLAKE (B0)
[18:16:28] [PASSED] DG1 (A0)
[18:16:28] [PASSED] DG1 (B0)
[18:16:28] [PASSED] ALDERLAKE_S (A0)
[18:16:28] [PASSED] ALDERLAKE_S (B0)
[18:16:28] [PASSED] ALDERLAKE_S (C0)
[18:16:28] [PASSED] ALDERLAKE_S (D0)
[18:16:28] [PASSED] ALDERLAKE_P (A0)
[18:16:28] [PASSED] ALDERLAKE_P (B0)
[18:16:28] [PASSED] ALDERLAKE_P (C0)
[18:16:28] [PASSED] ALDERLAKE_S_RPLS (D0)
[18:16:28] [PASSED] ALDERLAKE_P_RPLU (E0)
[18:16:28] [PASSED] DG2_G10 (C0)
[18:16:28] [PASSED] DG2_G11 (B1)
[18:16:28] [PASSED] DG2_G12 (A1)
[18:16:28] [PASSED] METEORLAKE (g:A0, m:A0)
[18:16:28] [PASSED] METEORLAKE (g:A0, m:A0)
[18:16:28] [PASSED] METEORLAKE (g:A0, m:A0)
[18:16:28] [PASSED] LUNARLAKE (g:A0, m:A0)
[18:16:28] [PASSED] LUNARLAKE (g:B0, m:A0)
stty: 'standard input': Inappropriate ioctl for device
[18:16:28] [PASSED] BATTLEMAGE (g:A0, m:A1)
[18:16:28] ==================== [PASSED] xe_wa_gt =====================
[18:16:28] ====================== [PASSED] xe_wa ======================
[18:16:28] ============================================================
[18:16:28] Testing complete. Ran 297 tests: passed: 281, skipped: 16
[18:16:28] Elapsed time: 39.930s total, 4.280s configuring, 35.283s building, 0.328s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/tests/.kunitconfig
[18:16:28] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:16:29] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[18:16:57] Starting KUnit Kernel (1/1)...
[18:16:57] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:16:57] == drm_test_atomic_get_connector_for_encoder (1 subtest) ===
[18:16:57] [PASSED] drm_test_drm_atomic_get_connector_for_encoder
[18:16:57] ==== [PASSED] drm_test_atomic_get_connector_for_encoder ====
[18:16:57] =========== drm_validate_clone_mode (2 subtests) ===========
[18:16:57] ============== drm_test_check_in_clone_mode ===============
[18:16:57] [PASSED] in_clone_mode
[18:16:57] [PASSED] not_in_clone_mode
[18:16:57] ========== [PASSED] drm_test_check_in_clone_mode ===========
[18:16:57] =============== drm_test_check_valid_clones ===============
[18:16:57] [PASSED] not_in_clone_mode
[18:16:57] [PASSED] valid_clone
[18:16:57] [PASSED] invalid_clone
[18:16:57] =========== [PASSED] drm_test_check_valid_clones ===========
[18:16:57] ============= [PASSED] drm_validate_clone_mode =============
[18:16:57] ============= drm_validate_modeset (1 subtest) =============
[18:16:57] [PASSED] drm_test_check_connector_changed_modeset
[18:16:57] ============== [PASSED] drm_validate_modeset ===============
[18:16:57] ====== drm_test_bridge_get_current_state (2 subtests) ======
[18:16:57] [PASSED] drm_test_drm_bridge_get_current_state_atomic
[18:16:57] [PASSED] drm_test_drm_bridge_get_current_state_legacy
[18:16:57] ======== [PASSED] drm_test_bridge_get_current_state ========
[18:16:57] ====== drm_test_bridge_helper_reset_crtc (3 subtests) ======
[18:16:57] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic
[18:16:57] [PASSED] drm_test_drm_bridge_helper_reset_crtc_atomic_disabled
[18:16:57] [PASSED] drm_test_drm_bridge_helper_reset_crtc_legacy
[18:16:57] ======== [PASSED] drm_test_bridge_helper_reset_crtc ========
[18:16:57] ============== drm_bridge_alloc (2 subtests) ===============
[18:16:57] [PASSED] drm_test_drm_bridge_alloc_basic
[18:16:57] [PASSED] drm_test_drm_bridge_alloc_get_put
[18:16:57] ================ [PASSED] drm_bridge_alloc =================
[18:16:57] ================== drm_buddy (7 subtests) ==================
[18:16:57] [PASSED] drm_test_buddy_alloc_limit
[18:16:57] [PASSED] drm_test_buddy_alloc_optimistic
[18:16:57] [PASSED] drm_test_buddy_alloc_pessimistic
[18:16:57] [PASSED] drm_test_buddy_alloc_pathological
[18:16:57] [PASSED] drm_test_buddy_alloc_contiguous
[18:16:57] [PASSED] drm_test_buddy_alloc_clear
[18:16:57] [PASSED] drm_test_buddy_alloc_range_bias
[18:16:57] ==================== [PASSED] drm_buddy ====================
[18:16:57] ============= drm_cmdline_parser (40 subtests) =============
[18:16:57] [PASSED] drm_test_cmdline_force_d_only
[18:16:57] [PASSED] drm_test_cmdline_force_D_only_dvi
[18:16:57] [PASSED] drm_test_cmdline_force_D_only_hdmi
[18:16:57] [PASSED] drm_test_cmdline_force_D_only_not_digital
[18:16:57] [PASSED] drm_test_cmdline_force_e_only
[18:16:57] [PASSED] drm_test_cmdline_res
[18:16:57] [PASSED] drm_test_cmdline_res_vesa
[18:16:57] [PASSED] drm_test_cmdline_res_vesa_rblank
[18:16:57] [PASSED] drm_test_cmdline_res_rblank
[18:16:57] [PASSED] drm_test_cmdline_res_bpp
[18:16:57] [PASSED] drm_test_cmdline_res_refresh
[18:16:57] [PASSED] drm_test_cmdline_res_bpp_refresh
[18:16:57] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced
[18:16:57] [PASSED] drm_test_cmdline_res_bpp_refresh_margins
[18:16:57] [PASSED] drm_test_cmdline_res_bpp_refresh_force_off
[18:16:57] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on
[18:16:57] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_analog
[18:16:57] [PASSED] drm_test_cmdline_res_bpp_refresh_force_on_digital
[18:16:57] [PASSED] drm_test_cmdline_res_bpp_refresh_interlaced_margins_force_on
[18:16:57] [PASSED] drm_test_cmdline_res_margins_force_on
[18:16:57] [PASSED] drm_test_cmdline_res_vesa_margins
[18:16:57] [PASSED] drm_test_cmdline_name
[18:16:57] [PASSED] drm_test_cmdline_name_bpp
[18:16:57] [PASSED] drm_test_cmdline_name_option
[18:16:57] [PASSED] drm_test_cmdline_name_bpp_option
[18:16:57] [PASSED] drm_test_cmdline_rotate_0
[18:16:57] [PASSED] drm_test_cmdline_rotate_90
[18:16:57] [PASSED] drm_test_cmdline_rotate_180
[18:16:57] [PASSED] drm_test_cmdline_rotate_270
[18:16:57] [PASSED] drm_test_cmdline_hmirror
[18:16:57] [PASSED] drm_test_cmdline_vmirror
[18:16:57] [PASSED] drm_test_cmdline_margin_options
[18:16:57] [PASSED] drm_test_cmdline_multiple_options
[18:16:57] [PASSED] drm_test_cmdline_bpp_extra_and_option
[18:16:57] [PASSED] drm_test_cmdline_extra_and_option
[18:16:57] [PASSED] drm_test_cmdline_freestanding_options
[18:16:57] [PASSED] drm_test_cmdline_freestanding_force_e_and_options
[18:16:57] [PASSED] drm_test_cmdline_panel_orientation
[18:16:57] ================ drm_test_cmdline_invalid =================
[18:16:57] [PASSED] margin_only
[18:16:57] [PASSED] interlace_only
[18:16:57] [PASSED] res_missing_x
[18:16:57] [PASSED] res_missing_y
[18:16:57] [PASSED] res_bad_y
[18:16:57] [PASSED] res_missing_y_bpp
[18:16:57] [PASSED] res_bad_bpp
[18:16:57] [PASSED] res_bad_refresh
[18:16:57] [PASSED] res_bpp_refresh_force_on_off
[18:16:57] [PASSED] res_invalid_mode
[18:16:57] [PASSED] res_bpp_wrong_place_mode
[18:16:57] [PASSED] name_bpp_refresh
[18:16:57] [PASSED] name_refresh
[18:16:57] [PASSED] name_refresh_wrong_mode
[18:16:57] [PASSED] name_refresh_invalid_mode
[18:16:57] [PASSED] rotate_multiple
[18:16:57] [PASSED] rotate_invalid_val
[18:16:57] [PASSED] rotate_truncated
[18:16:57] [PASSED] invalid_option
[18:16:57] [PASSED] invalid_tv_option
[18:16:57] [PASSED] truncated_tv_option
[18:16:57] ============ [PASSED] drm_test_cmdline_invalid =============
[18:16:57] =============== drm_test_cmdline_tv_options ===============
[18:16:57] [PASSED] NTSC
[18:16:57] [PASSED] NTSC_443
[18:16:57] [PASSED] NTSC_J
[18:16:57] [PASSED] PAL
[18:16:57] [PASSED] PAL_M
[18:16:57] [PASSED] PAL_N
[18:16:57] [PASSED] SECAM
[18:16:57] [PASSED] MONO_525
[18:16:57] [PASSED] MONO_625
[18:16:57] =========== [PASSED] drm_test_cmdline_tv_options ===========
[18:16:57] =============== [PASSED] drm_cmdline_parser ================
[18:16:57] ========== drmm_connector_hdmi_init (20 subtests) ==========
[18:16:57] [PASSED] drm_test_connector_hdmi_init_valid
[18:16:57] [PASSED] drm_test_connector_hdmi_init_bpc_8
[18:16:57] [PASSED] drm_test_connector_hdmi_init_bpc_10
[18:16:57] [PASSED] drm_test_connector_hdmi_init_bpc_12
[18:16:57] [PASSED] drm_test_connector_hdmi_init_bpc_invalid
[18:16:57] [PASSED] drm_test_connector_hdmi_init_bpc_null
[18:16:57] [PASSED] drm_test_connector_hdmi_init_formats_empty
[18:16:57] [PASSED] drm_test_connector_hdmi_init_formats_no_rgb
[18:16:57] === drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[18:16:57] [PASSED] supported_formats=0x9 yuv420_allowed=1
[18:16:57] [PASSED] supported_formats=0x9 yuv420_allowed=0
[18:16:57] [PASSED] supported_formats=0x3 yuv420_allowed=1
[18:16:57] [PASSED] supported_formats=0x3 yuv420_allowed=0
[18:16:57] === [PASSED] drm_test_connector_hdmi_init_formats_yuv420_allowed ===
[18:16:57] [PASSED] drm_test_connector_hdmi_init_null_ddc
[18:16:57] [PASSED] drm_test_connector_hdmi_init_null_product
[18:16:57] [PASSED] drm_test_connector_hdmi_init_null_vendor
[18:16:57] [PASSED] drm_test_connector_hdmi_init_product_length_exact
[18:16:57] [PASSED] drm_test_connector_hdmi_init_product_length_too_long
[18:16:57] [PASSED] drm_test_connector_hdmi_init_product_valid
[18:16:57] [PASSED] drm_test_connector_hdmi_init_vendor_length_exact
[18:16:57] [PASSED] drm_test_connector_hdmi_init_vendor_length_too_long
[18:16:57] [PASSED] drm_test_connector_hdmi_init_vendor_valid
[18:16:57] ========= drm_test_connector_hdmi_init_type_valid =========
[18:16:57] [PASSED] HDMI-A
[18:16:57] [PASSED] HDMI-B
[18:16:57] ===== [PASSED] drm_test_connector_hdmi_init_type_valid =====
[18:16:57] ======== drm_test_connector_hdmi_init_type_invalid ========
[18:16:57] [PASSED] Unknown
[18:16:57] [PASSED] VGA
[18:16:57] [PASSED] DVI-I
[18:16:57] [PASSED] DVI-D
[18:16:57] [PASSED] DVI-A
[18:16:57] [PASSED] Composite
[18:16:57] [PASSED] SVIDEO
[18:16:57] [PASSED] LVDS
[18:16:57] [PASSED] Component
[18:16:57] [PASSED] DIN
[18:16:57] [PASSED] DP
[18:16:57] [PASSED] TV
[18:16:57] [PASSED] eDP
[18:16:57] [PASSED] Virtual
[18:16:57] [PASSED] DSI
[18:16:57] [PASSED] DPI
[18:16:57] [PASSED] Writeback
[18:16:57] [PASSED] SPI
[18:16:57] [PASSED] USB
[18:16:57] ==== [PASSED] drm_test_connector_hdmi_init_type_invalid ====
[18:16:57] ============ [PASSED] drmm_connector_hdmi_init =============
[18:16:57] ============= drmm_connector_init (3 subtests) =============
[18:16:57] [PASSED] drm_test_drmm_connector_init
[18:16:57] [PASSED] drm_test_drmm_connector_init_null_ddc
[18:16:57] ========= drm_test_drmm_connector_init_type_valid =========
[18:16:57] [PASSED] Unknown
[18:16:57] [PASSED] VGA
[18:16:57] [PASSED] DVI-I
[18:16:57] [PASSED] DVI-D
[18:16:57] [PASSED] DVI-A
[18:16:57] [PASSED] Composite
[18:16:57] [PASSED] SVIDEO
[18:16:57] [PASSED] LVDS
[18:16:57] [PASSED] Component
[18:16:57] [PASSED] DIN
[18:16:57] [PASSED] DP
[18:16:57] [PASSED] HDMI-A
[18:16:57] [PASSED] HDMI-B
[18:16:57] [PASSED] TV
[18:16:57] [PASSED] eDP
[18:16:57] [PASSED] Virtual
[18:16:57] [PASSED] DSI
[18:16:57] [PASSED] DPI
[18:16:57] [PASSED] Writeback
[18:16:57] [PASSED] SPI
[18:16:57] [PASSED] USB
[18:16:57] ===== [PASSED] drm_test_drmm_connector_init_type_valid =====
[18:16:57] =============== [PASSED] drmm_connector_init ===============
[18:16:57] ========= drm_connector_dynamic_init (6 subtests) ==========
[18:16:57] [PASSED] drm_test_drm_connector_dynamic_init
[18:16:57] [PASSED] drm_test_drm_connector_dynamic_init_null_ddc
[18:16:57] [PASSED] drm_test_drm_connector_dynamic_init_not_added
[18:16:57] [PASSED] drm_test_drm_connector_dynamic_init_properties
[18:16:57] ===== drm_test_drm_connector_dynamic_init_type_valid ======
[18:16:57] [PASSED] Unknown
[18:16:57] [PASSED] VGA
[18:16:57] [PASSED] DVI-I
[18:16:57] [PASSED] DVI-D
[18:16:57] [PASSED] DVI-A
[18:16:57] [PASSED] Composite
[18:16:57] [PASSED] SVIDEO
[18:16:57] [PASSED] LVDS
[18:16:57] [PASSED] Component
[18:16:57] [PASSED] DIN
[18:16:57] [PASSED] DP
[18:16:57] [PASSED] HDMI-A
[18:16:57] [PASSED] HDMI-B
[18:16:57] [PASSED] TV
[18:16:57] [PASSED] eDP
[18:16:57] [PASSED] Virtual
[18:16:57] [PASSED] DSI
[18:16:57] [PASSED] DPI
[18:16:57] [PASSED] Writeback
[18:16:57] [PASSED] SPI
[18:16:57] [PASSED] USB
[18:16:57] = [PASSED] drm_test_drm_connector_dynamic_init_type_valid ==
[18:16:57] ======== drm_test_drm_connector_dynamic_init_name =========
[18:16:57] [PASSED] Unknown
[18:16:57] [PASSED] VGA
[18:16:57] [PASSED] DVI-I
[18:16:57] [PASSED] DVI-D
[18:16:57] [PASSED] DVI-A
[18:16:57] [PASSED] Composite
[18:16:57] [PASSED] SVIDEO
[18:16:57] [PASSED] LVDS
[18:16:57] [PASSED] Component
[18:16:57] [PASSED] DIN
[18:16:57] [PASSED] DP
[18:16:57] [PASSED] HDMI-A
[18:16:57] [PASSED] HDMI-B
[18:16:57] [PASSED] TV
[18:16:57] [PASSED] eDP
[18:16:57] [PASSED] Virtual
[18:16:57] [PASSED] DSI
[18:16:57] [PASSED] DPI
[18:16:57] [PASSED] Writeback
[18:16:57] [PASSED] SPI
[18:16:57] [PASSED] USB
[18:16:57] ==== [PASSED] drm_test_drm_connector_dynamic_init_name =====
[18:16:57] =========== [PASSED] drm_connector_dynamic_init ============
[18:16:57] ==== drm_connector_dynamic_register_early (4 subtests) =====
[18:16:57] [PASSED] drm_test_drm_connector_dynamic_register_early_on_list
[18:16:57] [PASSED] drm_test_drm_connector_dynamic_register_early_defer
[18:16:57] [PASSED] drm_test_drm_connector_dynamic_register_early_no_init
[18:16:57] [PASSED] drm_test_drm_connector_dynamic_register_early_no_mode_object
[18:16:57] ====== [PASSED] drm_connector_dynamic_register_early =======
[18:16:57] ======= drm_connector_dynamic_register (7 subtests) ========
[18:16:57] [PASSED] drm_test_drm_connector_dynamic_register_on_list
[18:16:57] [PASSED] drm_test_drm_connector_dynamic_register_no_defer
[18:16:57] [PASSED] drm_test_drm_connector_dynamic_register_no_init
[18:16:57] [PASSED] drm_test_drm_connector_dynamic_register_mode_object
[18:16:57] [PASSED] drm_test_drm_connector_dynamic_register_sysfs
[18:16:57] [PASSED] drm_test_drm_connector_dynamic_register_sysfs_name
[18:16:57] [PASSED] drm_test_drm_connector_dynamic_register_debugfs
[18:16:57] ========= [PASSED] drm_connector_dynamic_register ==========
[18:16:57] = drm_connector_attach_broadcast_rgb_property (2 subtests) =
[18:16:57] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property
[18:16:57] [PASSED] drm_test_drm_connector_attach_broadcast_rgb_property_hdmi_connector
[18:16:57] === [PASSED] drm_connector_attach_broadcast_rgb_property ===
[18:16:57] ========== drm_get_tv_mode_from_name (2 subtests) ==========
[18:16:57] ========== drm_test_get_tv_mode_from_name_valid ===========
[18:16:57] [PASSED] NTSC
[18:16:57] [PASSED] NTSC-443
[18:16:57] [PASSED] NTSC-J
[18:16:57] [PASSED] PAL
[18:16:57] [PASSED] PAL-M
[18:16:57] [PASSED] PAL-N
[18:16:57] [PASSED] SECAM
[18:16:57] [PASSED] Mono
[18:16:57] ====== [PASSED] drm_test_get_tv_mode_from_name_valid =======
[18:16:57] [PASSED] drm_test_get_tv_mode_from_name_truncated
[18:16:57] ============ [PASSED] drm_get_tv_mode_from_name ============
[18:16:57] = drm_test_connector_hdmi_compute_mode_clock (12 subtests) =
[18:16:57] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb
[18:16:57] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc
[18:16:57] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_10bpc_vic_1
[18:16:57] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc
[18:16:57] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_12bpc_vic_1
[18:16:57] [PASSED] drm_test_drm_hdmi_compute_mode_clock_rgb_double
[18:16:57] = drm_test_connector_hdmi_compute_mode_clock_yuv420_valid =
[18:16:57] [PASSED] VIC 96
[18:16:57] [PASSED] VIC 97
[18:16:57] [PASSED] VIC 101
[18:16:57] [PASSED] VIC 102
[18:16:57] [PASSED] VIC 106
[18:16:57] [PASSED] VIC 107
[18:16:57] === [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_valid ===
[18:16:57] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_10_bpc
[18:16:57] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv420_12_bpc
[18:16:57] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_8_bpc
[18:16:57] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_10_bpc
[18:16:57] [PASSED] drm_test_connector_hdmi_compute_mode_clock_yuv422_12_bpc
[18:16:57] === [PASSED] drm_test_connector_hdmi_compute_mode_clock ====
[18:16:57] == drm_hdmi_connector_get_broadcast_rgb_name (2 subtests) ==
[18:16:57] === drm_test_drm_hdmi_connector_get_broadcast_rgb_name ====
[18:16:57] [PASSED] Automatic
[18:16:57] [PASSED] Full
[18:16:57] [PASSED] Limited 16:235
[18:16:57] === [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name ===
[18:16:57] [PASSED] drm_test_drm_hdmi_connector_get_broadcast_rgb_name_invalid
[18:16:57] ==== [PASSED] drm_hdmi_connector_get_broadcast_rgb_name ====
[18:16:57] == drm_hdmi_connector_get_output_format_name (2 subtests) ==
[18:16:57] === drm_test_drm_hdmi_connector_get_output_format_name ====
[18:16:57] [PASSED] RGB
[18:16:57] [PASSED] YUV 4:2:0
[18:16:57] [PASSED] YUV 4:2:2
[18:16:57] [PASSED] YUV 4:4:4
[18:16:57] === [PASSED] drm_test_drm_hdmi_connector_get_output_format_name ===
[18:16:57] [PASSED] drm_test_drm_hdmi_connector_get_output_format_name_invalid
[18:16:57] ==== [PASSED] drm_hdmi_connector_get_output_format_name ====
[18:16:57] ============= drm_damage_helper (21 subtests) ==============
[18:16:57] [PASSED] drm_test_damage_iter_no_damage
[18:16:57] [PASSED] drm_test_damage_iter_no_damage_fractional_src
[18:16:57] [PASSED] drm_test_damage_iter_no_damage_src_moved
[18:16:57] [PASSED] drm_test_damage_iter_no_damage_fractional_src_moved
[18:16:57] [PASSED] drm_test_damage_iter_no_damage_not_visible
[18:16:57] [PASSED] drm_test_damage_iter_no_damage_no_crtc
[18:16:57] [PASSED] drm_test_damage_iter_no_damage_no_fb
[18:16:57] [PASSED] drm_test_damage_iter_simple_damage
[18:16:57] [PASSED] drm_test_damage_iter_single_damage
[18:16:57] [PASSED] drm_test_damage_iter_single_damage_intersect_src
[18:16:57] [PASSED] drm_test_damage_iter_single_damage_outside_src
[18:16:57] [PASSED] drm_test_damage_iter_single_damage_fractional_src
[18:16:57] [PASSED] drm_test_damage_iter_single_damage_intersect_fractional_src
[18:16:57] [PASSED] drm_test_damage_iter_single_damage_outside_fractional_src
[18:16:57] [PASSED] drm_test_damage_iter_single_damage_src_moved
[18:16:57] [PASSED] drm_test_damage_iter_single_damage_fractional_src_moved
[18:16:57] [PASSED] drm_test_damage_iter_damage
[18:16:57] [PASSED] drm_test_damage_iter_damage_one_intersect
[18:16:57] [PASSED] drm_test_damage_iter_damage_one_outside
[18:16:57] [PASSED] drm_test_damage_iter_damage_src_moved
[18:16:57] [PASSED] drm_test_damage_iter_damage_not_visible
[18:16:57] ================ [PASSED] drm_damage_helper ================
[18:16:57] ============== drm_dp_mst_helper (3 subtests) ==============
[18:16:57] ============== drm_test_dp_mst_calc_pbn_mode ==============
[18:16:57] [PASSED] Clock 154000 BPP 30 DSC disabled
[18:16:57] [PASSED] Clock 234000 BPP 30 DSC disabled
[18:16:57] [PASSED] Clock 297000 BPP 24 DSC disabled
[18:16:57] [PASSED] Clock 332880 BPP 24 DSC enabled
[18:16:57] [PASSED] Clock 324540 BPP 24 DSC enabled
[18:16:57] ========== [PASSED] drm_test_dp_mst_calc_pbn_mode ==========
[18:16:57] ============== drm_test_dp_mst_calc_pbn_div ===============
[18:16:57] [PASSED] Link rate 2000000 lane count 4
[18:16:57] [PASSED] Link rate 2000000 lane count 2
[18:16:57] [PASSED] Link rate 2000000 lane count 1
[18:16:57] [PASSED] Link rate 1350000 lane count 4
[18:16:57] [PASSED] Link rate 1350000 lane count 2
[18:16:57] [PASSED] Link rate 1350000 lane count 1
[18:16:57] [PASSED] Link rate 1000000 lane count 4
[18:16:57] [PASSED] Link rate 1000000 lane count 2
[18:16:57] [PASSED] Link rate 1000000 lane count 1
[18:16:57] [PASSED] Link rate 810000 lane count 4
[18:16:57] [PASSED] Link rate 810000 lane count 2
[18:16:57] [PASSED] Link rate 810000 lane count 1
[18:16:57] [PASSED] Link rate 540000 lane count 4
[18:16:57] [PASSED] Link rate 540000 lane count 2
[18:16:57] [PASSED] Link rate 540000 lane count 1
[18:16:57] [PASSED] Link rate 270000 lane count 4
[18:16:57] [PASSED] Link rate 270000 lane count 2
[18:16:57] [PASSED] Link rate 270000 lane count 1
[18:16:57] [PASSED] Link rate 162000 lane count 4
[18:16:57] [PASSED] Link rate 162000 lane count 2
[18:16:57] [PASSED] Link rate 162000 lane count 1
[18:16:57] ========== [PASSED] drm_test_dp_mst_calc_pbn_div ===========
[18:16:57] ========= drm_test_dp_mst_sideband_msg_req_decode =========
[18:16:57] [PASSED] DP_ENUM_PATH_RESOURCES with port number
[18:16:57] [PASSED] DP_POWER_UP_PHY with port number
[18:16:57] [PASSED] DP_POWER_DOWN_PHY with port number
[18:16:57] [PASSED] DP_ALLOCATE_PAYLOAD with SDP stream sinks
[18:16:57] [PASSED] DP_ALLOCATE_PAYLOAD with port number
[18:16:57] [PASSED] DP_ALLOCATE_PAYLOAD with VCPI
[18:16:57] [PASSED] DP_ALLOCATE_PAYLOAD with PBN
[18:16:57] [PASSED] DP_QUERY_PAYLOAD with port number
[18:16:57] [PASSED] DP_QUERY_PAYLOAD with VCPI
[18:16:57] [PASSED] DP_REMOTE_DPCD_READ with port number
[18:16:57] [PASSED] DP_REMOTE_DPCD_READ with DPCD address
[18:16:57] [PASSED] DP_REMOTE_DPCD_READ with max number of bytes
[18:16:57] [PASSED] DP_REMOTE_DPCD_WRITE with port number
[18:16:57] [PASSED] DP_REMOTE_DPCD_WRITE with DPCD address
[18:16:57] [PASSED] DP_REMOTE_DPCD_WRITE with data array
[18:16:57] [PASSED] DP_REMOTE_I2C_READ with port number
[18:16:57] [PASSED] DP_REMOTE_I2C_READ with I2C device ID
[18:16:57] [PASSED] DP_REMOTE_I2C_READ with transactions array
[18:16:57] [PASSED] DP_REMOTE_I2C_WRITE with port number
[18:16:57] [PASSED] DP_REMOTE_I2C_WRITE with I2C device ID
[18:16:57] [PASSED] DP_REMOTE_I2C_WRITE with data array
[18:16:57] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream ID
[18:16:57] [PASSED] DP_QUERY_STREAM_ENC_STATUS with client ID
[18:16:57] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream event
[18:16:57] [PASSED] DP_QUERY_STREAM_ENC_STATUS with valid stream event
[18:16:57] [PASSED] DP_QUERY_STREAM_ENC_STATUS with stream behavior
[18:16:57] [PASSED] DP_QUERY_STREAM_ENC_STATUS with a valid stream behavior
[18:16:57] ===== [PASSED] drm_test_dp_mst_sideband_msg_req_decode =====
[18:16:57] ================ [PASSED] drm_dp_mst_helper ================
[18:16:57] ================== drm_exec (7 subtests) ===================
[18:16:57] [PASSED] sanitycheck
[18:16:57] [PASSED] test_lock
[18:16:57] [PASSED] test_lock_unlock
[18:16:57] [PASSED] test_duplicates
[18:16:57] [PASSED] test_prepare
[18:16:57] [PASSED] test_prepare_array
[18:16:57] [PASSED] test_multiple_loops
[18:16:57] ==================== [PASSED] drm_exec =====================
[18:16:57] =========== drm_format_helper_test (17 subtests) ===========
[18:16:57] ============== drm_test_fb_xrgb8888_to_gray8 ==============
[18:16:57] [PASSED] single_pixel_source_buffer
[18:16:57] [PASSED] single_pixel_clip_rectangle
[18:16:57] [PASSED] well_known_colors
[18:16:57] [PASSED] destination_pitch
[18:16:57] ========== [PASSED] drm_test_fb_xrgb8888_to_gray8 ==========
[18:16:57] ============= drm_test_fb_xrgb8888_to_rgb332 ==============
[18:16:57] [PASSED] single_pixel_source_buffer
[18:16:57] [PASSED] single_pixel_clip_rectangle
[18:16:57] [PASSED] well_known_colors
[18:16:57] [PASSED] destination_pitch
[18:16:57] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb332 ==========
[18:16:57] ============= drm_test_fb_xrgb8888_to_rgb565 ==============
[18:16:57] [PASSED] single_pixel_source_buffer
[18:16:57] [PASSED] single_pixel_clip_rectangle
[18:16:57] [PASSED] well_known_colors
[18:16:57] [PASSED] destination_pitch
[18:16:57] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb565 ==========
[18:16:57] ============ drm_test_fb_xrgb8888_to_xrgb1555 =============
[18:16:57] [PASSED] single_pixel_source_buffer
[18:16:57] [PASSED] single_pixel_clip_rectangle
[18:16:57] [PASSED] well_known_colors
[18:16:57] [PASSED] destination_pitch
[18:16:57] ======== [PASSED] drm_test_fb_xrgb8888_to_xrgb1555 =========
[18:16:57] ============ drm_test_fb_xrgb8888_to_argb1555 =============
[18:16:57] [PASSED] single_pixel_source_buffer
[18:16:57] [PASSED] single_pixel_clip_rectangle
[18:16:57] [PASSED] well_known_colors
[18:16:57] [PASSED] destination_pitch
[18:16:57] ======== [PASSED] drm_test_fb_xrgb8888_to_argb1555 =========
[18:16:57] ============ drm_test_fb_xrgb8888_to_rgba5551 =============
[18:16:57] [PASSED] single_pixel_source_buffer
[18:16:57] [PASSED] single_pixel_clip_rectangle
[18:16:57] [PASSED] well_known_colors
[18:16:57] [PASSED] destination_pitch
[18:16:57] ======== [PASSED] drm_test_fb_xrgb8888_to_rgba5551 =========
[18:16:57] ============= drm_test_fb_xrgb8888_to_rgb888 ==============
[18:16:57] [PASSED] single_pixel_source_buffer
[18:16:57] [PASSED] single_pixel_clip_rectangle
[18:16:57] [PASSED] well_known_colors
[18:16:57] [PASSED] destination_pitch
[18:16:57] ========= [PASSED] drm_test_fb_xrgb8888_to_rgb888 ==========
[18:16:57] ============= drm_test_fb_xrgb8888_to_bgr888 ==============
[18:16:57] [PASSED] single_pixel_source_buffer
[18:16:57] [PASSED] single_pixel_clip_rectangle
[18:16:57] [PASSED] well_known_colors
[18:16:57] [PASSED] destination_pitch
[18:16:57] ========= [PASSED] drm_test_fb_xrgb8888_to_bgr888 ==========
[18:16:57] ============ drm_test_fb_xrgb8888_to_argb8888 =============
[18:16:57] [PASSED] single_pixel_source_buffer
[18:16:57] [PASSED] single_pixel_clip_rectangle
[18:16:57] [PASSED] well_known_colors
[18:16:57] [PASSED] destination_pitch
[18:16:57] ======== [PASSED] drm_test_fb_xrgb8888_to_argb8888 =========
[18:16:57] =========== drm_test_fb_xrgb8888_to_xrgb2101010 ===========
[18:16:57] [PASSED] single_pixel_source_buffer
[18:16:57] [PASSED] single_pixel_clip_rectangle
[18:16:57] [PASSED] well_known_colors
[18:16:57] [PASSED] destination_pitch
[18:16:57] ======= [PASSED] drm_test_fb_xrgb8888_to_xrgb2101010 =======
[18:16:57] =========== drm_test_fb_xrgb8888_to_argb2101010 ===========
[18:16:57] [PASSED] single_pixel_source_buffer
[18:16:57] [PASSED] single_pixel_clip_rectangle
[18:16:57] [PASSED] well_known_colors
[18:16:57] [PASSED] destination_pitch
[18:16:57] ======= [PASSED] drm_test_fb_xrgb8888_to_argb2101010 =======
[18:16:57] ============== drm_test_fb_xrgb8888_to_mono ===============
[18:16:57] [PASSED] single_pixel_source_buffer
[18:16:57] [PASSED] single_pixel_clip_rectangle
[18:16:57] [PASSED] well_known_colors
[18:16:57] [PASSED] destination_pitch
[18:16:57] ========== [PASSED] drm_test_fb_xrgb8888_to_mono ===========
[18:16:57] ==================== drm_test_fb_swab =====================
[18:16:57] [PASSED] single_pixel_source_buffer
[18:16:57] [PASSED] single_pixel_clip_rectangle
[18:16:57] [PASSED] well_known_colors
[18:16:57] [PASSED] destination_pitch
[18:16:57] ================ [PASSED] drm_test_fb_swab =================
[18:16:57] ============ drm_test_fb_xrgb8888_to_xbgr8888 =============
[18:16:57] [PASSED] single_pixel_source_buffer
[18:16:57] [PASSED] single_pixel_clip_rectangle
[18:16:57] [PASSED] well_known_colors
[18:16:57] [PASSED] destination_pitch
[18:16:57] ======== [PASSED] drm_test_fb_xrgb8888_to_xbgr8888 =========
[18:16:57] ============ drm_test_fb_xrgb8888_to_abgr8888 =============
[18:16:57] [PASSED] single_pixel_source_buffer
[18:16:57] [PASSED] single_pixel_clip_rectangle
[18:16:57] [PASSED] well_known_colors
[18:16:57] [PASSED] destination_pitch
[18:16:57] ======== [PASSED] drm_test_fb_xrgb8888_to_abgr8888 =========
[18:16:57] ================= drm_test_fb_clip_offset =================
[18:16:57] [PASSED] pass through
[18:16:57] [PASSED] horizontal offset
[18:16:57] [PASSED] vertical offset
[18:16:57] [PASSED] horizontal and vertical offset
[18:16:57] [PASSED] horizontal offset (custom pitch)
[18:16:57] [PASSED] vertical offset (custom pitch)
[18:16:57] [PASSED] horizontal and vertical offset (custom pitch)
[18:16:57] ============= [PASSED] drm_test_fb_clip_offset =============
[18:16:57] =================== drm_test_fb_memcpy ====================
[18:16:57] [PASSED] single_pixel_source_buffer: XR24 little-endian (0x34325258)
[18:16:57] [PASSED] single_pixel_source_buffer: XRA8 little-endian (0x38415258)
[18:16:57] [PASSED] single_pixel_source_buffer: YU24 little-endian (0x34325559)
[18:16:57] [PASSED] single_pixel_clip_rectangle: XB24 little-endian (0x34324258)
[18:16:57] [PASSED] single_pixel_clip_rectangle: XRA8 little-endian (0x38415258)
[18:16:57] [PASSED] single_pixel_clip_rectangle: YU24 little-endian (0x34325559)
[18:16:57] [PASSED] well_known_colors: XB24 little-endian (0x34324258)
[18:16:57] [PASSED] well_known_colors: XRA8 little-endian (0x38415258)
[18:16:57] [PASSED] well_known_colors: YU24 little-endian (0x34325559)
[18:16:57] [PASSED] destination_pitch: XB24 little-endian (0x34324258)
[18:16:57] [PASSED] destination_pitch: XRA8 little-endian (0x38415258)
[18:16:57] [PASSED] destination_pitch: YU24 little-endian (0x34325559)
[18:16:57] =============== [PASSED] drm_test_fb_memcpy ================
[18:16:57] ============= [PASSED] drm_format_helper_test ==============
[18:16:57] ================= drm_format (18 subtests) =================
[18:16:57] [PASSED] drm_test_format_block_width_invalid
[18:16:57] [PASSED] drm_test_format_block_width_one_plane
[18:16:57] [PASSED] drm_test_format_block_width_two_plane
[18:16:57] [PASSED] drm_test_format_block_width_three_plane
[18:16:57] [PASSED] drm_test_format_block_width_tiled
[18:16:57] [PASSED] drm_test_format_block_height_invalid
[18:16:57] [PASSED] drm_test_format_block_height_one_plane
[18:16:57] [PASSED] drm_test_format_block_height_two_plane
[18:16:57] [PASSED] drm_test_format_block_height_three_plane
[18:16:57] [PASSED] drm_test_format_block_height_tiled
[18:16:57] [PASSED] drm_test_format_min_pitch_invalid
[18:16:57] [PASSED] drm_test_format_min_pitch_one_plane_8bpp
[18:16:57] [PASSED] drm_test_format_min_pitch_one_plane_16bpp
[18:16:57] [PASSED] drm_test_format_min_pitch_one_plane_24bpp
[18:16:57] [PASSED] drm_test_format_min_pitch_one_plane_32bpp
[18:16:57] [PASSED] drm_test_format_min_pitch_two_plane
[18:16:57] [PASSED] drm_test_format_min_pitch_three_plane_8bpp
[18:16:57] [PASSED] drm_test_format_min_pitch_tiled
[18:16:57] =================== [PASSED] drm_format ====================
[18:16:57] ============== drm_framebuffer (10 subtests) ===============
[18:16:57] ========== drm_test_framebuffer_check_src_coords ==========
[18:16:57] [PASSED] Success: source fits into fb
[18:16:57] [PASSED] Fail: overflowing fb with x-axis coordinate
[18:16:57] [PASSED] Fail: overflowing fb with y-axis coordinate
[18:16:57] [PASSED] Fail: overflowing fb with source width
[18:16:57] [PASSED] Fail: overflowing fb with source height
[18:16:57] ====== [PASSED] drm_test_framebuffer_check_src_coords ======
[18:16:57] [PASSED] drm_test_framebuffer_cleanup
[18:16:57] =============== drm_test_framebuffer_create ===============
[18:16:57] [PASSED] ABGR8888 normal sizes
[18:16:57] [PASSED] ABGR8888 max sizes
[18:16:57] [PASSED] ABGR8888 pitch greater than min required
[18:16:57] [PASSED] ABGR8888 pitch less than min required
[18:16:57] [PASSED] ABGR8888 Invalid width
[18:16:57] [PASSED] ABGR8888 Invalid buffer handle
[18:16:57] [PASSED] No pixel format
[18:16:57] [PASSED] ABGR8888 Width 0
[18:16:57] [PASSED] ABGR8888 Height 0
[18:16:57] [PASSED] ABGR8888 Out of bound height * pitch combination
[18:16:57] [PASSED] ABGR8888 Large buffer offset
[18:16:57] [PASSED] ABGR8888 Buffer offset for inexistent plane
[18:16:57] [PASSED] ABGR8888 Invalid flag
[18:16:57] [PASSED] ABGR8888 Set DRM_MODE_FB_MODIFIERS without modifiers
[18:16:57] [PASSED] ABGR8888 Valid buffer modifier
[18:16:57] [PASSED] ABGR8888 Invalid buffer modifier(DRM_FORMAT_MOD_SAMSUNG_64_32_TILE)
[18:16:57] [PASSED] ABGR8888 Extra pitches without DRM_MODE_FB_MODIFIERS
[18:16:57] [PASSED] ABGR8888 Extra pitches with DRM_MODE_FB_MODIFIERS
[18:16:57] [PASSED] NV12 Normal sizes
[18:16:57] [PASSED] NV12 Max sizes
[18:16:57] [PASSED] NV12 Invalid pitch
[18:16:57] [PASSED] NV12 Invalid modifier/missing DRM_MODE_FB_MODIFIERS flag
[18:16:57] [PASSED] NV12 different modifier per-plane
[18:16:57] [PASSED] NV12 with DRM_FORMAT_MOD_SAMSUNG_64_32_TILE
[18:16:57] [PASSED] NV12 Valid modifiers without DRM_MODE_FB_MODIFIERS
[18:16:57] [PASSED] NV12 Modifier for inexistent plane
[18:16:57] [PASSED] NV12 Handle for inexistent plane
[18:16:57] [PASSED] NV12 Handle for inexistent plane without DRM_MODE_FB_MODIFIERS
[18:16:57] [PASSED] YVU420 DRM_MODE_FB_MODIFIERS set without modifier
[18:16:57] [PASSED] YVU420 Normal sizes
[18:16:57] [PASSED] YVU420 Max sizes
[18:16:57] [PASSED] YVU420 Invalid pitch
[18:16:57] [PASSED] YVU420 Different pitches
[18:16:57] [PASSED] YVU420 Different buffer offsets/pitches
[18:16:57] [PASSED] YVU420 Modifier set just for plane 0, without DRM_MODE_FB_MODIFIERS
[18:16:57] [PASSED] YVU420 Modifier set just for planes 0, 1, without DRM_MODE_FB_MODIFIERS
[18:16:57] [PASSED] YVU420 Modifier set just for plane 0, 1, with DRM_MODE_FB_MODIFIERS
[18:16:57] [PASSED] YVU420 Valid modifier
[18:16:57] [PASSED] YVU420 Different modifiers per plane
[18:16:57] [PASSED] YVU420 Modifier for inexistent plane
[18:16:57] [PASSED] YUV420_10BIT Invalid modifier(DRM_FORMAT_MOD_LINEAR)
[18:16:57] [PASSED] X0L2 Normal sizes
[18:16:57] [PASSED] X0L2 Max sizes
[18:16:57] [PASSED] X0L2 Invalid pitch
[18:16:57] [PASSED] X0L2 Pitch greater than minimum required
[18:16:57] [PASSED] X0L2 Handle for inexistent plane
[18:16:57] [PASSED] X0L2 Offset for inexistent plane, without DRM_MODE_FB_MODIFIERS set
[18:16:57] [PASSED] X0L2 Modifier without DRM_MODE_FB_MODIFIERS set
[18:16:57] [PASSED] X0L2 Valid modifier
[18:16:57] [PASSED] X0L2 Modifier for inexistent plane
[18:16:57] =========== [PASSED] drm_test_framebuffer_create ===========
[18:16:57] [PASSED] drm_test_framebuffer_free
[18:16:57] [PASSED] drm_test_framebuffer_init
[18:16:57] [PASSED] drm_test_framebuffer_init_bad_format
[18:16:57] [PASSED] drm_test_framebuffer_init_dev_mismatch
[18:16:57] [PASSED] drm_test_framebuffer_lookup
[18:16:57] [PASSED] drm_test_framebuffer_lookup_inexistent
[18:16:57] [PASSED] drm_test_framebuffer_modifiers_not_supported
[18:16:57] ================= [PASSED] drm_framebuffer =================
[18:16:57] ================ drm_gem_shmem (8 subtests) ================
[18:16:57] [PASSED] drm_gem_shmem_test_obj_create
[18:16:57] [PASSED] drm_gem_shmem_test_obj_create_private
[18:16:57] [PASSED] drm_gem_shmem_test_pin_pages
[18:16:57] [PASSED] drm_gem_shmem_test_vmap
[18:16:57] [PASSED] drm_gem_shmem_test_get_pages_sgt
[18:16:57] [PASSED] drm_gem_shmem_test_get_sg_table
[18:16:57] [PASSED] drm_gem_shmem_test_madvise
[18:16:57] [PASSED] drm_gem_shmem_test_purge
[18:16:57] ================== [PASSED] drm_gem_shmem ==================
[18:16:57] === drm_atomic_helper_connector_hdmi_check (27 subtests) ===
[18:16:57] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode
[18:16:57] [PASSED] drm_test_check_broadcast_rgb_auto_cea_mode_vic_1
[18:16:57] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode
[18:16:57] [PASSED] drm_test_check_broadcast_rgb_full_cea_mode_vic_1
[18:16:57] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode
[18:16:57] [PASSED] drm_test_check_broadcast_rgb_limited_cea_mode_vic_1
[18:16:57] ====== drm_test_check_broadcast_rgb_cea_mode_yuv420 =======
[18:16:57] [PASSED] Automatic
[18:16:57] [PASSED] Full
[18:16:57] [PASSED] Limited 16:235
[18:16:57] == [PASSED] drm_test_check_broadcast_rgb_cea_mode_yuv420 ===
[18:16:57] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_changed
[18:16:57] [PASSED] drm_test_check_broadcast_rgb_crtc_mode_not_changed
[18:16:57] [PASSED] drm_test_check_disable_connector
[18:16:57] [PASSED] drm_test_check_hdmi_funcs_reject_rate
[18:16:57] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_rgb
[18:16:57] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_yuv420
[18:16:57] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv422
[18:16:57] [PASSED] drm_test_check_max_tmds_rate_bpc_fallback_ignore_yuv420
[18:16:57] [PASSED] drm_test_check_driver_unsupported_fallback_yuv420
[18:16:57] [PASSED] drm_test_check_output_bpc_crtc_mode_changed
[18:16:57] [PASSED] drm_test_check_output_bpc_crtc_mode_not_changed
[18:16:57] [PASSED] drm_test_check_output_bpc_dvi
[18:16:57] [PASSED] drm_test_check_output_bpc_format_vic_1
[18:16:57] [PASSED] drm_test_check_output_bpc_format_display_8bpc_only
[18:16:57] [PASSED] drm_test_check_output_bpc_format_display_rgb_only
[18:16:57] [PASSED] drm_test_check_output_bpc_format_driver_8bpc_only
[18:16:57] [PASSED] drm_test_check_output_bpc_format_driver_rgb_only
[18:16:57] [PASSED] drm_test_check_tmds_char_rate_rgb_8bpc
[18:16:57] [PASSED] drm_test_check_tmds_char_rate_rgb_10bpc
[18:16:57] [PASSED] drm_test_check_tmds_char_rate_rgb_12bpc
[18:16:57] ===== [PASSED] drm_atomic_helper_connector_hdmi_check ======
[18:16:57] === drm_atomic_helper_connector_hdmi_reset (6 subtests) ====
[18:16:57] [PASSED] drm_test_check_broadcast_rgb_value
[18:16:57] [PASSED] drm_test_check_bpc_8_value
[18:16:57] [PASSED] drm_test_check_bpc_10_value
[18:16:57] [PASSED] drm_test_check_bpc_12_value
[18:16:57] [PASSED] drm_test_check_format_value
[18:16:57] [PASSED] drm_test_check_tmds_char_value
[18:16:57] ===== [PASSED] drm_atomic_helper_connector_hdmi_reset ======
[18:16:57] = drm_atomic_helper_connector_hdmi_mode_valid (4 subtests) =
[18:16:57] [PASSED] drm_test_check_mode_valid
[18:16:57] [PASSED] drm_test_check_mode_valid_reject
[18:16:57] [PASSED] drm_test_check_mode_valid_reject_rate
[18:16:57] [PASSED] drm_test_check_mode_valid_reject_max_clock
[18:16:57] === [PASSED] drm_atomic_helper_connector_hdmi_mode_valid ===
[18:16:57] ================= drm_managed (2 subtests) =================
[18:16:57] [PASSED] drm_test_managed_release_action
[18:16:57] [PASSED] drm_test_managed_run_action
[18:16:57] =================== [PASSED] drm_managed ===================
[18:16:57] =================== drm_mm (6 subtests) ====================
[18:16:57] [PASSED] drm_test_mm_init
[18:16:57] [PASSED] drm_test_mm_debug
[18:16:57] [PASSED] drm_test_mm_align32
[18:16:57] [PASSED] drm_test_mm_align64
[18:16:57] [PASSED] drm_test_mm_lowest
[18:16:57] [PASSED] drm_test_mm_highest
[18:16:57] ===================== [PASSED] drm_mm ======================
[18:16:57] ============= drm_modes_analog_tv (5 subtests) =============
[18:16:57] [PASSED] drm_test_modes_analog_tv_mono_576i
[18:16:57] [PASSED] drm_test_modes_analog_tv_ntsc_480i
[18:16:57] [PASSED] drm_test_modes_analog_tv_ntsc_480i_inlined
[18:16:57] [PASSED] drm_test_modes_analog_tv_pal_576i
[18:16:57] [PASSED] drm_test_modes_analog_tv_pal_576i_inlined
[18:16:57] =============== [PASSED] drm_modes_analog_tv ===============
[18:16:57] ============== drm_plane_helper (2 subtests) ===============
[18:16:57] =============== drm_test_check_plane_state ================
[18:16:57] [PASSED] clipping_simple
[18:16:57] [PASSED] clipping_rotate_reflect
[18:16:57] [PASSED] positioning_simple
[18:16:57] [PASSED] upscaling
[18:16:57] [PASSED] downscaling
[18:16:57] [PASSED] rounding1
[18:16:57] [PASSED] rounding2
[18:16:57] [PASSED] rounding3
[18:16:57] [PASSED] rounding4
[18:16:57] =========== [PASSED] drm_test_check_plane_state ============
[18:16:57] =========== drm_test_check_invalid_plane_state ============
[18:16:57] [PASSED] positioning_invalid
[18:16:57] [PASSED] upscaling_invalid
[18:16:57] [PASSED] downscaling_invalid
[18:16:57] ======= [PASSED] drm_test_check_invalid_plane_state ========
[18:16:57] ================ [PASSED] drm_plane_helper =================
[18:16:57] ====== drm_connector_helper_tv_get_modes (1 subtest) =======
[18:16:57] ====== drm_test_connector_helper_tv_get_modes_check =======
[18:16:57] [PASSED] None
[18:16:57] [PASSED] PAL
[18:16:57] [PASSED] NTSC
[18:16:57] [PASSED] Both, NTSC Default
[18:16:57] [PASSED] Both, PAL Default
[18:16:57] [PASSED] Both, NTSC Default, with PAL on command-line
[18:16:57] [PASSED] Both, PAL Default, with NTSC on command-line
[18:16:57] == [PASSED] drm_test_connector_helper_tv_get_modes_check ===
[18:16:57] ======== [PASSED] drm_connector_helper_tv_get_modes ========
[18:16:57] ================== drm_rect (9 subtests) ===================
[18:16:57] [PASSED] drm_test_rect_clip_scaled_div_by_zero
[18:16:57] [PASSED] drm_test_rect_clip_scaled_not_clipped
[18:16:57] [PASSED] drm_test_rect_clip_scaled_clipped
[18:16:57] [PASSED] drm_test_rect_clip_scaled_signed_vs_unsigned
[18:16:57] ================= drm_test_rect_intersect =================
[18:16:57] [PASSED] top-left x bottom-right: 2x2+1+1 x 2x2+0+0
[18:16:57] [PASSED] top-right x bottom-left: 2x2+0+0 x 2x2+1-1
[18:16:57] [PASSED] bottom-left x top-right: 2x2+1-1 x 2x2+0+0
[18:16:57] [PASSED] bottom-right x top-left: 2x2+0+0 x 2x2+1+1
[18:16:57] [PASSED] right x left: 2x1+0+0 x 3x1+1+0
[18:16:57] [PASSED] left x right: 3x1+1+0 x 2x1+0+0
[18:16:57] [PASSED] up x bottom: 1x2+0+0 x 1x3+0-1
[18:16:57] [PASSED] bottom x up: 1x3+0-1 x 1x2+0+0
[18:16:57] [PASSED] touching corner: 1x1+0+0 x 2x2+1+1
[18:16:57] [PASSED] touching side: 1x1+0+0 x 1x1+1+0
[18:16:57] [PASSED] equal rects: 2x2+0+0 x 2x2+0+0
[18:16:57] [PASSED] inside another: 2x2+0+0 x 1x1+1+1
[18:16:57] [PASSED] far away: 1x1+0+0 x 1x1+3+6
[18:16:57] [PASSED] points intersecting: 0x0+5+10 x 0x0+5+10
[18:16:57] [PASSED] points not intersecting: 0x0+0+0 x 0x0+5+10
[18:16:57] ============= [PASSED] drm_test_rect_intersect =============
[18:16:57] ================ drm_test_rect_calc_hscale ================
[18:16:57] [PASSED] normal use
[18:16:57] [PASSED] out of max range
[18:16:57] [PASSED] out of min range
[18:16:57] [PASSED] zero dst
[18:16:57] [PASSED] negative src
[18:16:57] [PASSED] negative dst
[18:16:57] ============ [PASSED] drm_test_rect_calc_hscale ============
[18:16:57] ================ drm_test_rect_calc_vscale ================
[18:16:57] [PASSED] normal use
[18:16:57] [PASSED] out of max range
[18:16:57] [PASSED] out of min range
[18:16:57] [PASSED] zero dst
[18:16:57] [PASSED] negative src
[18:16:57] [PASSED] negative dst
[18:16:57] ============ [PASSED] drm_test_rect_calc_vscale ============
[18:16:57] ================== drm_test_rect_rotate ===================
[18:16:57] [PASSED] reflect-x
[18:16:57] [PASSED] reflect-y
[18:16:57] [PASSED] rotate-0
[18:16:57] [PASSED] rotate-90
[18:16:57] [PASSED] rotate-180
[18:16:57] [PASSED] rotate-270
stty: 'standard input': Inappropriate ioctl for device
[18:16:57] ============== [PASSED] drm_test_rect_rotate ===============
[18:16:57] ================ drm_test_rect_rotate_inv =================
[18:16:57] [PASSED] reflect-x
[18:16:57] [PASSED] reflect-y
[18:16:57] [PASSED] rotate-0
[18:16:57] [PASSED] rotate-90
[18:16:57] [PASSED] rotate-180
[18:16:57] [PASSED] rotate-270
[18:16:57] ============ [PASSED] drm_test_rect_rotate_inv =============
[18:16:57] ==================== [PASSED] drm_rect =====================
[18:16:57] ============ drm_sysfb_modeset_test (1 subtest) ============
[18:16:57] ============ drm_test_sysfb_build_fourcc_list =============
[18:16:57] [PASSED] no native formats
[18:16:57] [PASSED] XRGB8888 as native format
[18:16:57] [PASSED] remove duplicates
[18:16:57] [PASSED] convert alpha formats
[18:16:57] [PASSED] random formats
[18:16:57] ======== [PASSED] drm_test_sysfb_build_fourcc_list =========
[18:16:57] ============= [PASSED] drm_sysfb_modeset_test ==============
[18:16:57] ============================================================
[18:16:57] Testing complete. Ran 616 tests: passed: 616
[18:16:57] Elapsed time: 29.408s total, 1.734s configuring, 27.455s building, 0.194s running
+ /kernel/tools/testing/kunit/kunit.py run --kunitconfig /kernel/drivers/gpu/drm/ttm/tests/.kunitconfig
[18:16:57] Configuring KUnit Kernel ...
Regenerating .config ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
[18:16:59] Building KUnit Kernel ...
Populating config with:
$ make ARCH=um O=.kunit olddefconfig
Building with:
$ make all compile_commands.json scripts_gdb ARCH=um O=.kunit --jobs=25
[18:17:07] Starting KUnit Kernel (1/1)...
[18:17:07] ============================================================
Running tests with:
$ .kunit/linux kunit.enable=1 mem=1G console=tty kunit_shutdown=halt
[18:17:07] ================= ttm_device (5 subtests) ==================
[18:17:07] [PASSED] ttm_device_init_basic
[18:17:07] [PASSED] ttm_device_init_multiple
[18:17:07] [PASSED] ttm_device_fini_basic
[18:17:07] [PASSED] ttm_device_init_no_vma_man
[18:17:07] ================== ttm_device_init_pools ==================
[18:17:07] [PASSED] No DMA allocations, no DMA32 required
[18:17:07] [PASSED] DMA allocations, DMA32 required
[18:17:07] [PASSED] No DMA allocations, DMA32 required
[18:17:07] [PASSED] DMA allocations, no DMA32 required
[18:17:07] ============== [PASSED] ttm_device_init_pools ==============
[18:17:07] =================== [PASSED] ttm_device ====================
[18:17:07] ================== ttm_pool (8 subtests) ===================
[18:17:07] ================== ttm_pool_alloc_basic ===================
[18:17:07] [PASSED] One page
[18:17:07] [PASSED] More than one page
[18:17:07] [PASSED] Above the allocation limit
[18:17:07] [PASSED] One page, with coherent DMA mappings enabled
[18:17:07] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[18:17:07] ============== [PASSED] ttm_pool_alloc_basic ===============
[18:17:07] ============== ttm_pool_alloc_basic_dma_addr ==============
[18:17:07] [PASSED] One page
[18:17:07] [PASSED] More than one page
[18:17:07] [PASSED] Above the allocation limit
[18:17:07] [PASSED] One page, with coherent DMA mappings enabled
[18:17:07] [PASSED] Above the allocation limit, with coherent DMA mappings enabled
[18:17:07] ========== [PASSED] ttm_pool_alloc_basic_dma_addr ==========
[18:17:07] [PASSED] ttm_pool_alloc_order_caching_match
[18:17:07] [PASSED] ttm_pool_alloc_caching_mismatch
[18:17:07] [PASSED] ttm_pool_alloc_order_mismatch
[18:17:07] [PASSED] ttm_pool_free_dma_alloc
[18:17:07] [PASSED] ttm_pool_free_no_dma_alloc
[18:17:07] [PASSED] ttm_pool_fini_basic
[18:17:07] ==================== [PASSED] ttm_pool =====================
[18:17:07] ================ ttm_resource (8 subtests) =================
[18:17:07] ================= ttm_resource_init_basic =================
[18:17:07] [PASSED] Init resource in TTM_PL_SYSTEM
[18:17:07] [PASSED] Init resource in TTM_PL_VRAM
[18:17:07] [PASSED] Init resource in a private placement
[18:17:07] [PASSED] Init resource in TTM_PL_SYSTEM, set placement flags
[18:17:07] ============= [PASSED] ttm_resource_init_basic =============
[18:17:07] [PASSED] ttm_resource_init_pinned
[18:17:07] [PASSED] ttm_resource_fini_basic
[18:17:07] [PASSED] ttm_resource_manager_init_basic
[18:17:07] [PASSED] ttm_resource_manager_usage_basic
[18:17:07] [PASSED] ttm_resource_manager_set_used_basic
[18:17:07] [PASSED] ttm_sys_man_alloc_basic
[18:17:07] [PASSED] ttm_sys_man_free_basic
[18:17:07] ================== [PASSED] ttm_resource ===================
[18:17:07] =================== ttm_tt (15 subtests) ===================
[18:17:07] ==================== ttm_tt_init_basic ====================
[18:17:07] [PASSED] Page-aligned size
[18:17:07] [PASSED] Extra pages requested
[18:17:07] ================ [PASSED] ttm_tt_init_basic ================
[18:17:07] [PASSED] ttm_tt_init_misaligned
[18:17:07] [PASSED] ttm_tt_fini_basic
[18:17:07] [PASSED] ttm_tt_fini_sg
[18:17:07] [PASSED] ttm_tt_fini_shmem
[18:17:07] [PASSED] ttm_tt_create_basic
[18:17:07] [PASSED] ttm_tt_create_invalid_bo_type
[18:17:07] [PASSED] ttm_tt_create_ttm_exists
[18:17:07] [PASSED] ttm_tt_create_failed
[18:17:07] [PASSED] ttm_tt_destroy_basic
[18:17:07] [PASSED] ttm_tt_populate_null_ttm
[18:17:07] [PASSED] ttm_tt_populate_populated_ttm
[18:17:07] [PASSED] ttm_tt_unpopulate_basic
[18:17:07] [PASSED] ttm_tt_unpopulate_empty_ttm
[18:17:07] [PASSED] ttm_tt_swapin_basic
[18:17:07] ===================== [PASSED] ttm_tt ======================
[18:17:07] =================== ttm_bo (14 subtests) ===================
[18:17:07] =========== ttm_bo_reserve_optimistic_no_ticket ===========
[18:17:07] [PASSED] Cannot be interrupted and sleeps
[18:17:07] [PASSED] Cannot be interrupted, locks straight away
[18:17:07] [PASSED] Can be interrupted, sleeps
[18:17:07] ======= [PASSED] ttm_bo_reserve_optimistic_no_ticket =======
[18:17:07] [PASSED] ttm_bo_reserve_locked_no_sleep
[18:17:07] [PASSED] ttm_bo_reserve_no_wait_ticket
[18:17:07] [PASSED] ttm_bo_reserve_double_resv
[18:17:07] [PASSED] ttm_bo_reserve_interrupted
[18:17:07] [PASSED] ttm_bo_reserve_deadlock
[18:17:07] [PASSED] ttm_bo_unreserve_basic
[18:17:07] [PASSED] ttm_bo_unreserve_pinned
[18:17:07] [PASSED] ttm_bo_unreserve_bulk
[18:17:07] [PASSED] ttm_bo_put_basic
[18:17:07] [PASSED] ttm_bo_put_shared_resv
[18:17:07] [PASSED] ttm_bo_pin_basic
[18:17:07] [PASSED] ttm_bo_pin_unpin_resource
[18:17:07] [PASSED] ttm_bo_multiple_pin_one_unpin
[18:17:07] ===================== [PASSED] ttm_bo ======================
[18:17:07] ============== ttm_bo_validate (21 subtests) ===============
[18:17:07] ============== ttm_bo_init_reserved_sys_man ===============
[18:17:07] [PASSED] Buffer object for userspace
[18:17:07] [PASSED] Kernel buffer object
[18:17:07] [PASSED] Shared buffer object
[18:17:07] ========== [PASSED] ttm_bo_init_reserved_sys_man ===========
[18:17:07] ============== ttm_bo_init_reserved_mock_man ==============
[18:17:07] [PASSED] Buffer object for userspace
[18:17:07] [PASSED] Kernel buffer object
[18:17:07] [PASSED] Shared buffer object
[18:17:07] ========== [PASSED] ttm_bo_init_reserved_mock_man ==========
[18:17:07] [PASSED] ttm_bo_init_reserved_resv
[18:17:07] ================== ttm_bo_validate_basic ==================
[18:17:07] [PASSED] Buffer object for userspace
[18:17:07] [PASSED] Kernel buffer object
[18:17:07] [PASSED] Shared buffer object
[18:17:07] ============== [PASSED] ttm_bo_validate_basic ==============
[18:17:07] [PASSED] ttm_bo_validate_invalid_placement
[18:17:07] ============= ttm_bo_validate_same_placement ==============
[18:17:07] [PASSED] System manager
[18:17:07] [PASSED] VRAM manager
[18:17:07] ========= [PASSED] ttm_bo_validate_same_placement ==========
[18:17:07] [PASSED] ttm_bo_validate_failed_alloc
[18:17:07] [PASSED] ttm_bo_validate_pinned
[18:17:07] [PASSED] ttm_bo_validate_busy_placement
[18:17:07] ================ ttm_bo_validate_multihop =================
[18:17:07] [PASSED] Buffer object for userspace
[18:17:07] [PASSED] Kernel buffer object
[18:17:07] [PASSED] Shared buffer object
[18:17:07] ============ [PASSED] ttm_bo_validate_multihop =============
[18:17:07] ========== ttm_bo_validate_no_placement_signaled ==========
[18:17:07] [PASSED] Buffer object in system domain, no page vector
[18:17:07] [PASSED] Buffer object in system domain with an existing page vector
[18:17:07] ====== [PASSED] ttm_bo_validate_no_placement_signaled ======
[18:17:07] ======== ttm_bo_validate_no_placement_not_signaled ========
[18:17:07] [PASSED] Buffer object for userspace
[18:17:07] [PASSED] Kernel buffer object
[18:17:07] [PASSED] Shared buffer object
[18:17:07] ==== [PASSED] ttm_bo_validate_no_placement_not_signaled ====
[18:17:07] [PASSED] ttm_bo_validate_move_fence_signaled
[18:17:07] ========= ttm_bo_validate_move_fence_not_signaled =========
[18:17:07] [PASSED] Waits for GPU
[18:17:07] [PASSED] Tries to lock straight away
[18:17:07] ===== [PASSED] ttm_bo_validate_move_fence_not_signaled =====
[18:17:07] [PASSED] ttm_bo_validate_happy_evict
[18:17:07] [PASSED] ttm_bo_validate_all_pinned_evict
[18:17:07] [PASSED] ttm_bo_validate_allowed_only_evict
[18:17:07] [PASSED] ttm_bo_validate_deleted_evict
[18:17:07] [PASSED] ttm_bo_validate_busy_domain_evict
[18:17:07] [PASSED] ttm_bo_validate_evict_gutting
[18:17:07] [PASSED] ttm_bo_validate_recrusive_evict
stty: 'standard input': Inappropriate ioctl for device
[18:17:07] ================= [PASSED] ttm_bo_validate =================
[18:17:07] ============================================================
[18:17:07] Testing complete. Ran 101 tests: passed: 101
[18:17:07] Elapsed time: 9.834s total, 1.636s configuring, 7.931s building, 0.227s running
+ cleanup
++ stat -c %u:%g /kernel
+ chown -R 1003:1003 /kernel
^ permalink raw reply [flat|nested] 16+ messages in thread
* ✓ Xe.CI.BAT: success for Core Xe changes preparing for VF resume
2025-08-18 17:22 [PATCH v3 0/3] Core Xe changes preparing for VF resume Matthew Brost
` (3 preceding siblings ...)
2025-08-18 18:17 ` ✓ CI.KUnit: success for Core Xe changes preparing for VF resume Patchwork
@ 2025-08-18 19:36 ` Patchwork
2025-08-19 12:52 ` ✗ Xe.CI.Full: failure " Patchwork
5 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2025-08-18 19:36 UTC (permalink / raw)
To: Matthew Brost; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 2330 bytes --]
== Series Details ==
Series: Core Xe changes preparing for VF resume
URL : https://patchwork.freedesktop.org/series/153083/
State : success
== Summary ==
CI Bug Log - changes from xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab_BAT -> xe-pw-153083v1_BAT
====================================================
Summary
-------
**SUCCESS**
No regressions found.
Participating hosts (11 -> 9)
------------------------------
Missing (2): bat-adlp-vm bat-ptl-vm
Known issues
------------
Here are the changes found in xe-pw-153083v1_BAT that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@kms_flip@basic-flip-vs-modeset:
- bat-adlp-7: [PASS][1] -> [DMESG-WARN][2] ([Intel XE#4543]) +1 other test dmesg-warn
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/bat-adlp-7/igt@kms_flip@basic-flip-vs-modeset.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/bat-adlp-7/igt@kms_flip@basic-flip-vs-modeset.html
#### Possible fixes ####
* igt@xe_vm@bind-execqueues-independent:
- {bat-ptl-1}: [FAIL][3] ([Intel XE#5783]) -> [PASS][4]
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/bat-ptl-1/igt@xe_vm@bind-execqueues-independent.html
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/bat-ptl-1/igt@xe_vm@bind-execqueues-independent.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
[Intel XE#5783]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5783
Build changes
-------------
* IGT: IGT_8495 -> IGT_8496
* Linux: xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab -> xe-pw-153083v1
IGT_8495: b412b144685feadfd5675f3108de3d6820a4d1db @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8496: acea60af09e5f4b3cb0cd6838c23ef1e92c17323 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab: 912c10fafebf45522f7f56e33a020284e83c27ab
xe-pw-153083v1: 153083v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/index.html
[-- Attachment #2: Type: text/html, Size: 2941 bytes --]
^ permalink raw reply [flat|nested] 16+ messages in thread
* ✗ Xe.CI.Full: failure for Core Xe changes preparing for VF resume
2025-08-18 17:22 [PATCH v3 0/3] Core Xe changes preparing for VF resume Matthew Brost
` (4 preceding siblings ...)
2025-08-18 19:36 ` ✓ Xe.CI.BAT: " Patchwork
@ 2025-08-19 12:52 ` Patchwork
5 siblings, 0 replies; 16+ messages in thread
From: Patchwork @ 2025-08-19 12:52 UTC (permalink / raw)
To: Matthew Brost; +Cc: intel-xe
[-- Attachment #1: Type: text/plain, Size: 86331 bytes --]
== Series Details ==
Series: Core Xe changes preparing for VF resume
URL : https://patchwork.freedesktop.org/series/153083/
State : failure
== Summary ==
CI Bug Log - changes from xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab_FULL -> xe-pw-153083v1_FULL
====================================================
Summary
-------
**FAILURE**
Serious unknown changes coming with xe-pw-153083v1_FULL absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in xe-pw-153083v1_FULL, please notify your bug team (I915-ci-infra@lists.freedesktop.org) to allow them
to document this new failure mode, which will reduce false positives in CI.
Participating hosts (4 -> 4)
------------------------------
No changes in participating hosts
Possible new issues
-------------------
Here are the unknown changes that may have been introduced in xe-pw-153083v1_FULL:
### IGT changes ###
#### Possible regressions ####
* igt@xe_exec_compute_mode@non-blocking:
- shard-bmg: [PASS][1] -> [TIMEOUT][2]
[1]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-bmg-3/igt@xe_exec_compute_mode@non-blocking.html
[2]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-7/igt@xe_exec_compute_mode@non-blocking.html
- shard-dg2-set2: NOTRUN -> [TIMEOUT][3]
[3]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-432/igt@xe_exec_compute_mode@non-blocking.html
- shard-lnl: [PASS][4] -> [TIMEOUT][5]
[4]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-lnl-1/igt@xe_exec_compute_mode@non-blocking.html
[5]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-3/igt@xe_exec_compute_mode@non-blocking.html
* igt@xe_exec_threads@threads-cm-fd-userptr-invalidate-race:
- shard-adlp: [PASS][6] -> [FAIL][7] +2 other tests fail
[6]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-adlp-2/igt@xe_exec_threads@threads-cm-fd-userptr-invalidate-race.html
[7]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-2/igt@xe_exec_threads@threads-cm-fd-userptr-invalidate-race.html
* igt@xe_exec_threads@threads-cm-userptr:
- shard-bmg: [PASS][8] -> [FAIL][9]
[8]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-bmg-6/igt@xe_exec_threads@threads-cm-userptr.html
[9]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-5/igt@xe_exec_threads@threads-cm-userptr.html
* igt@xe_fault_injection@inject-fault-probe-function-xe_guc_ads_init:
- shard-adlp: [PASS][10] -> [ABORT][11]
[10]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-adlp-8/igt@xe_fault_injection@inject-fault-probe-function-xe_guc_ads_init.html
[11]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-9/igt@xe_fault_injection@inject-fault-probe-function-xe_guc_ads_init.html
- shard-bmg: [PASS][12] -> [ABORT][13]
[12]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-bmg-2/igt@xe_fault_injection@inject-fault-probe-function-xe_guc_ads_init.html
[13]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-7/igt@xe_fault_injection@inject-fault-probe-function-xe_guc_ads_init.html
- shard-dg2-set2: [PASS][14] -> [ABORT][15]
[14]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-dg2-466/igt@xe_fault_injection@inject-fault-probe-function-xe_guc_ads_init.html
[15]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-432/igt@xe_fault_injection@inject-fault-probe-function-xe_guc_ads_init.html
- shard-lnl: [PASS][16] -> [ABORT][17]
[16]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-lnl-2/igt@xe_fault_injection@inject-fault-probe-function-xe_guc_ads_init.html
[17]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-3/igt@xe_fault_injection@inject-fault-probe-function-xe_guc_ads_init.html
#### Warnings ####
* igt@xe_compute@ccs-mode-compute-kernel:
- shard-bmg: [FAIL][18] ([Intel XE#5792]) -> [FAIL][19]
[18]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-bmg-1/igt@xe_compute@ccs-mode-compute-kernel.html
[19]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-5/igt@xe_compute@ccs-mode-compute-kernel.html
* igt@xe_module_load@load:
- shard-lnl: ([PASS][20], [PASS][21], [PASS][22], [PASS][23], [PASS][24], [PASS][25], [PASS][26], [PASS][27], [SKIP][28], [PASS][29], [PASS][30], [PASS][31], [PASS][32], [PASS][33], [PASS][34], [PASS][35], [PASS][36], [PASS][37], [PASS][38], [PASS][39], [PASS][40], [PASS][41], [PASS][42], [PASS][43], [PASS][44], [PASS][45]) ([Intel XE#378]) -> ([PASS][46], [PASS][47], [PASS][48], [PASS][49], [PASS][50], [PASS][51], [SKIP][52], [PASS][53], [PASS][54], [PASS][55], [PASS][56], [PASS][57], [PASS][58], [PASS][59], [PASS][60], [PASS][61], [PASS][62], [PASS][63], [PASS][64], [DMESG-WARN][65], [PASS][66], [PASS][67], [PASS][68], [PASS][69], [PASS][70], [PASS][71]) ([Intel XE#378])
[20]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-lnl-8/igt@xe_module_load@load.html
[21]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-lnl-8/igt@xe_module_load@load.html
[22]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-lnl-1/igt@xe_module_load@load.html
[23]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-lnl-8/igt@xe_module_load@load.html
[24]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-lnl-4/igt@xe_module_load@load.html
[25]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-lnl-4/igt@xe_module_load@load.html
[26]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-lnl-4/igt@xe_module_load@load.html
[27]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-lnl-4/igt@xe_module_load@load.html
[28]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-lnl-4/igt@xe_module_load@load.html
[29]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-lnl-7/igt@xe_module_load@load.html
[30]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-lnl-7/igt@xe_module_load@load.html
[31]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-lnl-7/igt@xe_module_load@load.html
[32]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-lnl-7/igt@xe_module_load@load.html
[33]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-lnl-5/igt@xe_module_load@load.html
[34]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-lnl-2/igt@xe_module_load@load.html
[35]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-lnl-2/igt@xe_module_load@load.html
[36]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-lnl-5/igt@xe_module_load@load.html
[37]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-lnl-2/igt@xe_module_load@load.html
[38]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-lnl-2/igt@xe_module_load@load.html
[39]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-lnl-5/igt@xe_module_load@load.html
[40]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-lnl-5/igt@xe_module_load@load.html
[41]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-lnl-3/igt@xe_module_load@load.html
[42]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-lnl-3/igt@xe_module_load@load.html
[43]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-lnl-3/igt@xe_module_load@load.html
[44]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-lnl-1/igt@xe_module_load@load.html
[45]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-lnl-1/igt@xe_module_load@load.html
[46]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-2/igt@xe_module_load@load.html
[47]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-2/igt@xe_module_load@load.html
[48]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-2/igt@xe_module_load@load.html
[49]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-2/igt@xe_module_load@load.html
[50]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-5/igt@xe_module_load@load.html
[51]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-5/igt@xe_module_load@load.html
[52]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-3/igt@xe_module_load@load.html
[53]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-4/igt@xe_module_load@load.html
[54]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-3/igt@xe_module_load@load.html
[55]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-3/igt@xe_module_load@load.html
[56]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-3/igt@xe_module_load@load.html
[57]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-8/igt@xe_module_load@load.html
[58]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-8/igt@xe_module_load@load.html
[59]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-8/igt@xe_module_load@load.html
[60]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-1/igt@xe_module_load@load.html
[61]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-1/igt@xe_module_load@load.html
[62]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-1/igt@xe_module_load@load.html
[63]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-5/igt@xe_module_load@load.html
[64]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-5/igt@xe_module_load@load.html
[65]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-7/igt@xe_module_load@load.html
[66]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-7/igt@xe_module_load@load.html
[67]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-7/igt@xe_module_load@load.html
[68]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-7/igt@xe_module_load@load.html
[69]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-8/igt@xe_module_load@load.html
[70]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-4/igt@xe_module_load@load.html
[71]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-4/igt@xe_module_load@load.html
Known issues
------------
Here are the changes found in xe-pw-153083v1_FULL that come from known issues:
### IGT changes ###
#### Issues hit ####
* igt@intel_hwmon@hwmon-write:
- shard-bmg: [PASS][72] -> [FAIL][73] ([Intel XE#4665])
[72]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-bmg-1/igt@intel_hwmon@hwmon-write.html
[73]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-8/igt@intel_hwmon@hwmon-write.html
* igt@kms_atomic_transition@plane-all-modeset-transition:
- shard-lnl: NOTRUN -> [SKIP][74] ([Intel XE#3279])
[74]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-7/igt@kms_atomic_transition@plane-all-modeset-transition.html
* igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels:
- shard-bmg: NOTRUN -> [SKIP][75] ([Intel XE#2370])
[75]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-7/igt@kms_atomic_transition@plane-all-modeset-transition-internal-panels.html
* igt@kms_big_fb@linear-8bpp-rotate-270:
- shard-bmg: NOTRUN -> [SKIP][76] ([Intel XE#2327]) +1 other test skip
[76]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-2/igt@kms_big_fb@linear-8bpp-rotate-270.html
* igt@kms_big_fb@x-tiled-8bpp-rotate-270:
- shard-dg2-set2: NOTRUN -> [SKIP][77] ([Intel XE#316]) +5 other tests skip
[77]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-463/igt@kms_big_fb@x-tiled-8bpp-rotate-270.html
- shard-lnl: NOTRUN -> [SKIP][78] ([Intel XE#1407]) +1 other test skip
[78]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-3/igt@kms_big_fb@x-tiled-8bpp-rotate-270.html
* igt@kms_big_fb@y-tiled-32bpp-rotate-90:
- shard-adlp: NOTRUN -> [SKIP][79] ([Intel XE#316]) +1 other test skip
[79]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-4/igt@kms_big_fb@y-tiled-32bpp-rotate-90.html
* igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip:
- shard-dg2-set2: NOTRUN -> [SKIP][80] ([Intel XE#1124]) +10 other tests skip
[80]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-434/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
- shard-lnl: NOTRUN -> [SKIP][81] ([Intel XE#1124]) +2 other tests skip
[81]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-5/igt@kms_big_fb@y-tiled-max-hw-stride-32bpp-rotate-180-hflip.html
* igt@kms_big_fb@yf-tiled-64bpp-rotate-90:
- shard-bmg: NOTRUN -> [SKIP][82] ([Intel XE#1124]) +5 other tests skip
[82]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-1/igt@kms_big_fb@yf-tiled-64bpp-rotate-90.html
* igt@kms_big_fb@yf-tiled-addfb-size-overflow:
- shard-adlp: NOTRUN -> [SKIP][83] ([Intel XE#610])
[83]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-6/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html
- shard-bmg: NOTRUN -> [SKIP][84] ([Intel XE#610])
[84]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-7/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html
- shard-dg2-set2: NOTRUN -> [SKIP][85] ([Intel XE#610])
[85]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-466/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html
- shard-lnl: NOTRUN -> [SKIP][86] ([Intel XE#1428])
[86]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-1/igt@kms_big_fb@yf-tiled-addfb-size-overflow.html
* igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip:
- shard-adlp: NOTRUN -> [SKIP][87] ([Intel XE#1124])
[87]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-1/igt@kms_big_fb@yf-tiled-max-hw-stride-32bpp-rotate-180-hflip-async-flip.html
* igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p:
- shard-dg2-set2: NOTRUN -> [SKIP][88] ([Intel XE#2191])
[88]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-432/igt@kms_bw@connected-linear-tiling-4-displays-2560x1440p.html
* igt@kms_bw@linear-tiling-2-displays-2560x1440p:
- shard-adlp: NOTRUN -> [SKIP][89] ([Intel XE#367])
[89]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-3/igt@kms_bw@linear-tiling-2-displays-2560x1440p.html
- shard-bmg: NOTRUN -> [SKIP][90] ([Intel XE#367]) +1 other test skip
[90]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-1/igt@kms_bw@linear-tiling-2-displays-2560x1440p.html
- shard-dg2-set2: NOTRUN -> [SKIP][91] ([Intel XE#367]) +1 other test skip
[91]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-435/igt@kms_bw@linear-tiling-2-displays-2560x1440p.html
- shard-lnl: NOTRUN -> [SKIP][92] ([Intel XE#367])
[92]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-4/igt@kms_bw@linear-tiling-2-displays-2560x1440p.html
* igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs:
- shard-bmg: NOTRUN -> [SKIP][93] ([Intel XE#2887]) +7 other tests skip
[93]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-5/igt@kms_ccs@bad-pixel-format-4-tiled-dg2-mc-ccs.html
* igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [SKIP][94] ([Intel XE#787]) +216 other tests skip
[94]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-434/igt@kms_ccs@bad-pixel-format-4-tiled-mtl-rc-ccs-cc@pipe-a-hdmi-a-6.html
* igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc@pipe-b-hdmi-a-1:
- shard-adlp: NOTRUN -> [SKIP][95] ([Intel XE#787]) +8 other tests skip
[95]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-6/igt@kms_ccs@bad-rotation-90-4-tiled-dg2-rc-ccs-cc@pipe-b-hdmi-a-1.html
* igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs-cc@pipe-d-dp-4:
- shard-dg2-set2: NOTRUN -> [SKIP][96] ([Intel XE#455] / [Intel XE#787]) +42 other tests skip
[96]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-466/igt@kms_ccs@ccs-on-another-bo-y-tiled-gen12-rc-ccs-cc@pipe-d-dp-4.html
* igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs:
- shard-adlp: NOTRUN -> [SKIP][97] ([Intel XE#2907])
[97]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-4/igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs.html
* igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs@pipe-b-dp-2:
- shard-bmg: NOTRUN -> [SKIP][98] ([Intel XE#2652] / [Intel XE#787]) +8 other tests skip
[98]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-8/igt@kms_ccs@crc-primary-basic-4-tiled-lnl-ccs@pipe-b-dp-2.html
* igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-mc-ccs:
- shard-lnl: NOTRUN -> [SKIP][99] ([Intel XE#2887]) +6 other tests skip
[99]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-2/igt@kms_ccs@crc-primary-rotation-180-4-tiled-mtl-mc-ccs.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-d-dp-4:
- shard-dg2-set2: [PASS][100] -> [INCOMPLETE][101] ([Intel XE#3862]) +1 other test incomplete
[100]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-dg2-466/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-d-dp-4.html
[101]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-463/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-mc-ccs@pipe-d-dp-4.html
* igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs:
- shard-bmg: NOTRUN -> [SKIP][102] ([Intel XE#3432])
[102]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-6/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs.html
- shard-lnl: NOTRUN -> [SKIP][103] ([Intel XE#3432])
[103]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-3/igt@kms_ccs@crc-primary-suspend-4-tiled-dg2-rc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs:
- shard-dg2-set2: NOTRUN -> [INCOMPLETE][104] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124] / [Intel XE#4345])
[104]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [INCOMPLETE][105] ([Intel XE#1727] / [Intel XE#3113] / [Intel XE#3124])
[105]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-466/igt@kms_ccs@random-ccs-data-4-tiled-dg2-mc-ccs@pipe-c-hdmi-a-6.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-6:
- shard-dg2-set2: NOTRUN -> [INCOMPLETE][106] ([Intel XE#1727] / [Intel XE#3113])
[106]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-c-hdmi-a-6.html
* igt@kms_ccs@random-ccs-data-y-tiled-gen12-rc-ccs@pipe-d-hdmi-a-1:
- shard-adlp: NOTRUN -> [SKIP][107] ([Intel XE#455] / [Intel XE#787]) +5 other tests skip
[107]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-3/igt@kms_ccs@random-ccs-data-y-tiled-gen12-rc-ccs@pipe-d-hdmi-a-1.html
* igt@kms_cdclk@mode-transition-all-outputs:
- shard-dg2-set2: NOTRUN -> [SKIP][108] ([Intel XE#4418])
[108]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-436/igt@kms_cdclk@mode-transition-all-outputs.html
* igt@kms_chamelium_audio@hdmi-audio-edid:
- shard-bmg: NOTRUN -> [SKIP][109] ([Intel XE#2252]) +1 other test skip
[109]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-1/igt@kms_chamelium_audio@hdmi-audio-edid.html
- shard-lnl: NOTRUN -> [SKIP][110] ([Intel XE#373]) +2 other tests skip
[110]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-4/igt@kms_chamelium_audio@hdmi-audio-edid.html
* igt@kms_chamelium_color@ctm-max:
- shard-dg2-set2: NOTRUN -> [SKIP][111] ([Intel XE#306])
[111]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-464/igt@kms_chamelium_color@ctm-max.html
* igt@kms_chamelium_edid@hdmi-mode-timings:
- shard-dg2-set2: NOTRUN -> [SKIP][112] ([Intel XE#373]) +8 other tests skip
[112]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-433/igt@kms_chamelium_edid@hdmi-mode-timings.html
* igt@kms_content_protection@atomic-dpms@pipe-a-dp-4:
- shard-dg2-set2: NOTRUN -> [FAIL][113] ([Intel XE#1178]) +2 other tests fail
[113]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-436/igt@kms_content_protection@atomic-dpms@pipe-a-dp-4.html
* igt@kms_content_protection@dp-mst-lic-type-0:
- shard-adlp: NOTRUN -> [SKIP][114] ([Intel XE#307])
[114]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-8/igt@kms_content_protection@dp-mst-lic-type-0.html
- shard-bmg: NOTRUN -> [SKIP][115] ([Intel XE#2390])
[115]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-4/igt@kms_content_protection@dp-mst-lic-type-0.html
* igt@kms_content_protection@dp-mst-type-1:
- shard-dg2-set2: NOTRUN -> [SKIP][116] ([Intel XE#307])
[116]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-434/igt@kms_content_protection@dp-mst-type-1.html
* igt@kms_content_protection@type1:
- shard-bmg: NOTRUN -> [SKIP][117] ([Intel XE#2341])
[117]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-5/igt@kms_content_protection@type1.html
- shard-adlp: NOTRUN -> [SKIP][118] ([Intel XE#455]) +1 other test skip
[118]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-8/igt@kms_content_protection@type1.html
- shard-lnl: NOTRUN -> [SKIP][119] ([Intel XE#3278])
[119]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-3/igt@kms_content_protection@type1.html
* igt@kms_content_protection@uevent@pipe-a-dp-2:
- shard-bmg: NOTRUN -> [FAIL][120] ([Intel XE#1188])
[120]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-4/igt@kms_content_protection@uevent@pipe-a-dp-2.html
* igt@kms_cursor_crc@cursor-onscreen-512x170:
- shard-lnl: NOTRUN -> [SKIP][121] ([Intel XE#2321]) +1 other test skip
[121]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-2/igt@kms_cursor_crc@cursor-onscreen-512x170.html
- shard-bmg: NOTRUN -> [SKIP][122] ([Intel XE#2321]) +1 other test skip
[122]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-8/igt@kms_cursor_crc@cursor-onscreen-512x170.html
* igt@kms_cursor_crc@cursor-random-512x170:
- shard-dg2-set2: NOTRUN -> [SKIP][123] ([Intel XE#308])
[123]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-434/igt@kms_cursor_crc@cursor-random-512x170.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-atomic:
- shard-bmg: [PASS][124] -> [SKIP][125] ([Intel XE#2291]) +2 other tests skip
[124]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-bmg-8/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic.html
[125]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic.html
* igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size:
- shard-adlp: NOTRUN -> [SKIP][126] ([Intel XE#309])
[126]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-2/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html
- shard-lnl: NOTRUN -> [SKIP][127] ([Intel XE#309])
[127]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-4/igt@kms_cursor_legacy@cursorb-vs-flipa-atomic-transitions-varying-size.html
* igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size:
- shard-dg2-set2: NOTRUN -> [SKIP][128] ([Intel XE#323])
[128]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-435/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
- shard-lnl: NOTRUN -> [SKIP][129] ([Intel XE#323])
[129]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-8/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
- shard-adlp: NOTRUN -> [SKIP][130] ([Intel XE#323])
[130]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-2/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
- shard-bmg: NOTRUN -> [SKIP][131] ([Intel XE#2286])
[131]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-5/igt@kms_cursor_legacy@short-busy-flip-before-cursor-atomic-transitions-varying-size.html
* igt@kms_display_modes@extended-mode-basic:
- shard-bmg: [PASS][132] -> [SKIP][133] ([Intel XE#4302])
[132]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-bmg-4/igt@kms_display_modes@extended-mode-basic.html
[133]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-6/igt@kms_display_modes@extended-mode-basic.html
* igt@kms_dp_link_training@uhbr-mst:
- shard-lnl: NOTRUN -> [SKIP][134] ([Intel XE#4354])
[134]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-3/igt@kms_dp_link_training@uhbr-mst.html
- shard-bmg: NOTRUN -> [SKIP][135] ([Intel XE#4354])
[135]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-5/igt@kms_dp_link_training@uhbr-mst.html
* igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area:
- shard-bmg: NOTRUN -> [SKIP][136] ([Intel XE#4422])
[136]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-4/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area.html
- shard-lnl: NOTRUN -> [SKIP][137] ([Intel XE#4422])
[137]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-7/igt@kms_fbc_dirty_rect@fbc-dirty-rectangle-out-visible-area.html
* igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible:
- shard-lnl: NOTRUN -> [SKIP][138] ([Intel XE#1421]) +3 other tests skip
[138]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-1/igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible.html
- shard-adlp: NOTRUN -> [SKIP][139] ([Intel XE#310])
[139]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-6/igt@kms_flip@2x-blocking-absolute-wf_vblank-interruptible.html
* igt@kms_flip@2x-nonexisting-fb:
- shard-bmg: NOTRUN -> [SKIP][140] ([Intel XE#2316])
[140]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-6/igt@kms_flip@2x-nonexisting-fb.html
* igt@kms_flip@2x-plain-flip-ts-check-interruptible:
- shard-bmg: [PASS][141] -> [SKIP][142] ([Intel XE#2316]) +3 other tests skip
[141]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-bmg-5/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html
[142]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-6/igt@kms_flip@2x-plain-flip-ts-check-interruptible.html
* igt@kms_flip@basic-flip-vs-dpms@c-hdmi-a1:
- shard-adlp: [PASS][143] -> [DMESG-WARN][144] ([Intel XE#4543]) +13 other tests dmesg-warn
[143]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-adlp-2/igt@kms_flip@basic-flip-vs-dpms@c-hdmi-a1.html
[144]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-9/igt@kms_flip@basic-flip-vs-dpms@c-hdmi-a1.html
* igt@kms_flip@flip-vs-expired-vblank-interruptible:
- shard-lnl: [PASS][145] -> [FAIL][146] ([Intel XE#301]) +1 other test fail
[145]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
[146]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank-interruptible.html
* igt@kms_flip@flip-vs-panning-interruptible:
- shard-adlp: [PASS][147] -> [DMESG-WARN][148] ([Intel XE#4543] / [Intel XE#5208]) +1 other test dmesg-warn
[147]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-adlp-2/igt@kms_flip@flip-vs-panning-interruptible.html
[148]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-9/igt@kms_flip@flip-vs-panning-interruptible.html
* igt@kms_flip@flip-vs-rmfb-interruptible:
- shard-adlp: [PASS][149] -> [DMESG-WARN][150] ([Intel XE#5208])
[149]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-adlp-2/igt@kms_flip@flip-vs-rmfb-interruptible.html
[150]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-4/igt@kms_flip@flip-vs-rmfb-interruptible.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling:
- shard-lnl: NOTRUN -> [SKIP][151] ([Intel XE#1401] / [Intel XE#1745])
[151]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-1/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling.html
- shard-bmg: NOTRUN -> [SKIP][152] ([Intel XE#2293] / [Intel XE#2380])
[152]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-7/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-default-mode:
- shard-lnl: NOTRUN -> [SKIP][153] ([Intel XE#1401])
[153]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-1/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-valid-mode:
- shard-bmg: NOTRUN -> [SKIP][154] ([Intel XE#2293])
[154]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-7/igt@kms_flip_scaled_crc@flip-32bpp-yftile-to-32bpp-yftileccs-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling:
- shard-lnl: NOTRUN -> [SKIP][155] ([Intel XE#1397] / [Intel XE#1745]) +1 other test skip
[155]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-5/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling.html
* igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling@pipe-a-default-mode:
- shard-lnl: NOTRUN -> [SKIP][156] ([Intel XE#1397]) +1 other test skip
[156]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-5/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-16bpp-xtile-downscaling@pipe-a-default-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-valid-mode:
- shard-adlp: [PASS][157] -> [DMESG-FAIL][158] ([Intel XE#4543] / [Intel XE#4921]) +1 other test dmesg-fail
[157]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-adlp-6/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-valid-mode.html
[158]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-8/igt@kms_flip_scaled_crc@flip-64bpp-xtile-to-32bpp-xtile-downscaling@pipe-a-valid-mode.html
* igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling@pipe-a-valid-mode:
- shard-dg2-set2: NOTRUN -> [SKIP][159] ([Intel XE#455]) +19 other tests skip
[159]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-436/igt@kms_flip_scaled_crc@flip-64bpp-yftile-to-16bpp-yftile-upscaling@pipe-a-valid-mode.html
* igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-to-y:
- shard-adlp: [PASS][160] -> [DMESG-FAIL][161] ([Intel XE#4543]) +14 other tests dmesg-fail
[160]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-adlp-6/igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-to-y.html
[161]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-2/igt@kms_flip_tiling@flip-change-tiling@pipe-d-hdmi-a-1-y-to-y.html
* igt@kms_force_connector_basic@force-edid:
- shard-lnl: NOTRUN -> [SKIP][162] ([Intel XE#352])
[162]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-4/igt@kms_force_connector_basic@force-edid.html
* igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-blt:
- shard-adlp: NOTRUN -> [SKIP][163] ([Intel XE#656]) +8 other tests skip
[163]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-8/igt@kms_frontbuffer_tracking@drrs-2p-primscrn-pri-indfb-draw-blt.html
* igt@kms_frontbuffer_tracking@drrs-suspend:
- shard-dg2-set2: NOTRUN -> [SKIP][164] ([Intel XE#651]) +24 other tests skip
[164]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-434/igt@kms_frontbuffer_tracking@drrs-suspend.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-wc:
- shard-bmg: NOTRUN -> [SKIP][165] ([Intel XE#5390]) +5 other tests skip
[165]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-5/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt:
- shard-bmg: NOTRUN -> [SKIP][166] ([Intel XE#2312]) +4 other tests skip
[166]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary:
- shard-adlp: NOTRUN -> [DMESG-FAIL][167] ([Intel XE#4543])
[167]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-1/igt@kms_frontbuffer_tracking@fbc-shrfb-scaledprimary.html
* igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-pri-shrfb-draw-render:
- shard-lnl: NOTRUN -> [SKIP][168] ([Intel XE#651]) +6 other tests skip
[168]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-7/igt@kms_frontbuffer_tracking@fbcdrrs-1p-primscrn-pri-shrfb-draw-render.html
* igt@kms_frontbuffer_tracking@fbcdrrs-suspend:
- shard-adlp: NOTRUN -> [SKIP][169] ([Intel XE#651]) +3 other tests skip
[169]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-8/igt@kms_frontbuffer_tracking@fbcdrrs-suspend.html
- shard-bmg: NOTRUN -> [SKIP][170] ([Intel XE#2311]) +12 other tests skip
[170]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-7/igt@kms_frontbuffer_tracking@fbcdrrs-suspend.html
* igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-mmap-wc:
- shard-adlp: NOTRUN -> [SKIP][171] ([Intel XE#653]) +1 other test skip
[171]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-1/igt@kms_frontbuffer_tracking@fbcpsr-1p-primscrn-pri-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-render:
- shard-bmg: NOTRUN -> [SKIP][172] ([Intel XE#2313]) +7 other tests skip
[172]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-4/igt@kms_frontbuffer_tracking@fbcpsr-rgb101010-draw-render.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-plflip-blt:
- shard-dg2-set2: NOTRUN -> [SKIP][173] ([Intel XE#653]) +24 other tests skip
[173]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-434/igt@kms_frontbuffer_tracking@psr-2p-primscrn-shrfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-render:
- shard-lnl: NOTRUN -> [SKIP][174] ([Intel XE#656]) +17 other tests skip
[174]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-7/igt@kms_frontbuffer_tracking@psr-2p-scndscrn-pri-indfb-draw-render.html
* igt@kms_joiner@basic-force-ultra-joiner:
- shard-dg2-set2: NOTRUN -> [SKIP][175] ([Intel XE#2925])
[175]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-436/igt@kms_joiner@basic-force-ultra-joiner.html
* igt@kms_joiner@invalid-modeset-big-joiner:
- shard-adlp: NOTRUN -> [SKIP][176] ([Intel XE#346])
[176]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-8/igt@kms_joiner@invalid-modeset-big-joiner.html
- shard-bmg: NOTRUN -> [SKIP][177] ([Intel XE#346])
[177]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-4/igt@kms_joiner@invalid-modeset-big-joiner.html
- shard-dg2-set2: NOTRUN -> [SKIP][178] ([Intel XE#346])
[178]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-463/igt@kms_joiner@invalid-modeset-big-joiner.html
- shard-lnl: NOTRUN -> [SKIP][179] ([Intel XE#346])
[179]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-7/igt@kms_joiner@invalid-modeset-big-joiner.html
* igt@kms_multipipe_modeset@basic-max-pipe-crc-check:
- shard-dg2-set2: NOTRUN -> [SKIP][180] ([Intel XE#356])
[180]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-432/igt@kms_multipipe_modeset@basic-max-pipe-crc-check.html
* igt@kms_plane_multiple@2x-tiling-yf:
- shard-dg2-set2: NOTRUN -> [SKIP][181] ([Intel XE#5021])
[181]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-436/igt@kms_plane_multiple@2x-tiling-yf.html
* igt@kms_plane_multiple@tiling-x@pipe-b-edp-1:
- shard-lnl: NOTRUN -> [FAIL][182] ([Intel XE#4658]) +3 other tests fail
[182]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-4/igt@kms_plane_multiple@tiling-x@pipe-b-edp-1.html
* igt@kms_plane_multiple@tiling-y:
- shard-dg2-set2: NOTRUN -> [SKIP][183] ([Intel XE#5020])
[183]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-436/igt@kms_plane_multiple@tiling-y.html
* igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling@pipe-b:
- shard-lnl: NOTRUN -> [SKIP][184] ([Intel XE#2763]) +3 other tests skip
[184]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-7/igt@kms_plane_scaling@planes-downscale-factor-0-5-unity-scaling@pipe-b.html
* igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-c:
- shard-bmg: NOTRUN -> [SKIP][185] ([Intel XE#2763]) +4 other tests skip
[185]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-3/igt@kms_plane_scaling@planes-downscale-factor-0-5@pipe-c.html
* igt@kms_pm_backlight@fade-with-suspend:
- shard-dg2-set2: NOTRUN -> [SKIP][186] ([Intel XE#870]) +1 other test skip
[186]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-432/igt@kms_pm_backlight@fade-with-suspend.html
- shard-bmg: NOTRUN -> [SKIP][187] ([Intel XE#870])
[187]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-8/igt@kms_pm_backlight@fade-with-suspend.html
- shard-adlp: NOTRUN -> [SKIP][188] ([Intel XE#870])
[188]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-9/igt@kms_pm_backlight@fade-with-suspend.html
* igt@kms_pm_dc@dc6-psr:
- shard-lnl: [PASS][189] -> [FAIL][190] ([Intel XE#718]) +1 other test fail
[189]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-lnl-1/igt@kms_pm_dc@dc6-psr.html
[190]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-8/igt@kms_pm_dc@dc6-psr.html
* igt@kms_pm_rpm@dpms-mode-unset-lpsp:
- shard-bmg: NOTRUN -> [SKIP][191] ([Intel XE#1439] / [Intel XE#836])
[191]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-6/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html
* igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf:
- shard-dg2-set2: NOTRUN -> [SKIP][192] ([Intel XE#1489] / [Intel XE#5899]) +6 other tests skip
[192]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-464/igt@kms_psr2_sf@fbc-psr2-cursor-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-fully-sf@pipe-a-edp-1:
- shard-lnl: NOTRUN -> [SKIP][193] ([Intel XE#4608] / [Intel XE#5899])
[193]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-7/igt@kms_psr2_sf@fbc-psr2-overlay-plane-move-continuous-exceed-fully-sf@pipe-a-edp-1.html
* igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area:
- shard-adlp: NOTRUN -> [SKIP][194] ([Intel XE#1489] / [Intel XE#5899])
[194]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-6/igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area.html
- shard-lnl: NOTRUN -> [SKIP][195] ([Intel XE#2893] / [Intel XE#5899]) +1 other test skip
[195]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-8/igt@kms_psr2_sf@pr-overlay-plane-update-sf-dmg-area.html
* igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-fully-sf:
- shard-bmg: NOTRUN -> [SKIP][196] ([Intel XE#1489] / [Intel XE#5899]) +3 other tests skip
[196]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-3/igt@kms_psr2_sf@psr2-overlay-plane-move-continuous-exceed-fully-sf.html
* igt@kms_psr2_su@page_flip-xrgb8888:
- shard-dg2-set2: NOTRUN -> [SKIP][197] ([Intel XE#1122] / [Intel XE#5899])
[197]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-435/igt@kms_psr2_su@page_flip-xrgb8888.html
* igt@kms_psr@fbc-psr2-basic:
- shard-bmg: NOTRUN -> [SKIP][198] ([Intel XE#2234] / [Intel XE#2850] / [Intel XE#5899]) +5 other tests skip
[198]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-3/igt@kms_psr@fbc-psr2-basic.html
- shard-lnl: NOTRUN -> [SKIP][199] ([Intel XE#1406] / [Intel XE#5899]) +2 other tests skip
[199]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-1/igt@kms_psr@fbc-psr2-basic.html
* igt@kms_psr@fbc-psr2-sprite-blt:
- shard-adlp: NOTRUN -> [SKIP][200] ([Intel XE#2850] / [Intel XE#5899] / [Intel XE#929]) +1 other test skip
[200]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-8/igt@kms_psr@fbc-psr2-sprite-blt.html
* igt@kms_psr@fbc-psr2-sprite-blt@edp-1:
- shard-lnl: NOTRUN -> [SKIP][201] ([Intel XE#4609] / [Intel XE#5899]) +1 other test skip
[201]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-7/igt@kms_psr@fbc-psr2-sprite-blt@edp-1.html
* igt@kms_psr@psr-dpms:
- shard-dg2-set2: NOTRUN -> [SKIP][202] ([Intel XE#2850] / [Intel XE#5899] / [Intel XE#929]) +12 other tests skip
[202]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-464/igt@kms_psr@psr-dpms.html
* igt@kms_psr_stress_test@invalidate-primary-flip-overlay:
- shard-bmg: NOTRUN -> [SKIP][203] ([Intel XE#2414] / [Intel XE#5899])
[203]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-7/igt@kms_psr_stress_test@invalidate-primary-flip-overlay.html
* igt@kms_setmode@basic@pipe-b-edp-1:
- shard-lnl: NOTRUN -> [FAIL][204] ([Intel XE#2883]) +2 other tests fail
[204]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-5/igt@kms_setmode@basic@pipe-b-edp-1.html
* igt@sriov_basic@enable-vfs-autoprobe-off:
- shard-lnl: NOTRUN -> [SKIP][205] ([Intel XE#1091] / [Intel XE#2849])
[205]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-8/igt@sriov_basic@enable-vfs-autoprobe-off.html
* igt@xe_compute_preempt@compute-preempt:
- shard-dg2-set2: NOTRUN -> [SKIP][206] ([Intel XE#1280] / [Intel XE#455]) +1 other test skip
[206]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-435/igt@xe_compute_preempt@compute-preempt.html
* igt@xe_copy_basic@mem-set-linear-0xfd:
- shard-dg2-set2: NOTRUN -> [SKIP][207] ([Intel XE#1126])
[207]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-463/igt@xe_copy_basic@mem-set-linear-0xfd.html
* igt@xe_create@create-big-vram:
- shard-lnl: NOTRUN -> [SKIP][208] ([Intel XE#1062])
[208]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-4/igt@xe_create@create-big-vram.html
* igt@xe_eu_stall@unprivileged-access:
- shard-dg2-set2: NOTRUN -> [SKIP][209] ([Intel XE#5626]) +1 other test skip
[209]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-434/igt@xe_eu_stall@unprivileged-access.html
* igt@xe_eudebug@vma-ufence-faultable:
- shard-dg2-set2: NOTRUN -> [SKIP][210] ([Intel XE#4837]) +9 other tests skip
[210]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-464/igt@xe_eudebug@vma-ufence-faultable.html
* igt@xe_eudebug_online@pagefault-write:
- shard-adlp: NOTRUN -> [SKIP][211] ([Intel XE#4837] / [Intel XE#5565])
[211]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-1/igt@xe_eudebug_online@pagefault-write.html
* igt@xe_eudebug_online@set-breakpoint-sigint-debugger:
- shard-bmg: NOTRUN -> [SKIP][212] ([Intel XE#4837]) +3 other tests skip
[212]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-1/igt@xe_eudebug_online@set-breakpoint-sigint-debugger.html
- shard-lnl: NOTRUN -> [SKIP][213] ([Intel XE#4837]) +3 other tests skip
[213]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-4/igt@xe_eudebug_online@set-breakpoint-sigint-debugger.html
* igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-reopen:
- shard-lnl: NOTRUN -> [SKIP][214] ([Intel XE#688]) +1 other test skip
[214]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-4/igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-reopen.html
- shard-adlp: NOTRUN -> [SKIP][215] ([Intel XE#5563] / [Intel XE#688])
[215]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-3/igt@xe_evict_ccs@evict-overcommit-standalone-instantfree-reopen.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-basic:
- shard-dg2-set2: [PASS][216] -> [SKIP][217] ([Intel XE#1392]) +2 other tests skip
[216]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-dg2-433/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-basic.html
[217]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-432/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-basic.html
* igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate-race:
- shard-adlp: NOTRUN -> [SKIP][218] ([Intel XE#1392] / [Intel XE#5575]) +1 other test skip
[218]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-2/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate-race.html
- shard-bmg: NOTRUN -> [SKIP][219] ([Intel XE#2322]) +2 other tests skip
[219]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-3/igt@xe_exec_basic@multigpu-many-execqueues-many-vm-userptr-invalidate-race.html
* igt@xe_exec_basic@multigpu-once-bindexecqueue-rebind:
- shard-dg2-set2: NOTRUN -> [SKIP][220] ([Intel XE#1392]) +1 other test skip
[220]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-432/igt@xe_exec_basic@multigpu-once-bindexecqueue-rebind.html
* igt@xe_exec_basic@multigpu-once-rebind:
- shard-lnl: NOTRUN -> [SKIP][221] ([Intel XE#1392]) +1 other test skip
[221]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-3/igt@xe_exec_basic@multigpu-once-rebind.html
* igt@xe_exec_fault_mode@many-basic-prefetch:
- shard-dg2-set2: NOTRUN -> [SKIP][222] ([Intel XE#288]) +23 other tests skip
[222]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-433/igt@xe_exec_fault_mode@many-basic-prefetch.html
* igt@xe_exec_fault_mode@many-bindexecqueue-userptr-imm:
- shard-adlp: NOTRUN -> [SKIP][223] ([Intel XE#288] / [Intel XE#5561]) +4 other tests skip
[223]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-8/igt@xe_exec_fault_mode@many-bindexecqueue-userptr-imm.html
* igt@xe_exec_mix_modes@exec-simple-batch-store-lr:
- shard-dg2-set2: NOTRUN -> [SKIP][224] ([Intel XE#2360])
[224]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-433/igt@xe_exec_mix_modes@exec-simple-batch-store-lr.html
* igt@xe_exec_system_allocator@many-new-busy:
- shard-adlp: NOTRUN -> [SKIP][225] ([Intel XE#4915]) +44 other tests skip
[225]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-8/igt@xe_exec_system_allocator@many-new-busy.html
* igt@xe_exec_system_allocator@process-many-large-execqueues-mmap-nomemset:
- shard-dg2-set2: NOTRUN -> [SKIP][226] ([Intel XE#4915]) +241 other tests skip
[226]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-464/igt@xe_exec_system_allocator@process-many-large-execqueues-mmap-nomemset.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-mmap-free-huge:
- shard-bmg: NOTRUN -> [SKIP][227] ([Intel XE#4943]) +9 other tests skip
[227]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-5/igt@xe_exec_system_allocator@threads-shared-vm-many-large-execqueues-mmap-free-huge.html
* igt@xe_exec_system_allocator@threads-shared-vm-many-large-mmap-free-huge:
- shard-lnl: NOTRUN -> [SKIP][228] ([Intel XE#4943]) +9 other tests skip
[228]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-5/igt@xe_exec_system_allocator@threads-shared-vm-many-large-mmap-free-huge.html
* igt@xe_exec_threads@threads-hang-fd-rebind:
- shard-bmg: [PASS][229] -> [DMESG-FAIL][230] ([Intel XE#3876]) +2 other tests dmesg-fail
[229]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-bmg-1/igt@xe_exec_threads@threads-hang-fd-rebind.html
[230]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-5/igt@xe_exec_threads@threads-hang-fd-rebind.html
* igt@xe_oa@missing-sample-flags:
- shard-adlp: NOTRUN -> [SKIP][231] ([Intel XE#3573])
[231]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-1/igt@xe_oa@missing-sample-flags.html
* igt@xe_oa@whitelisted-registers-userspace-config:
- shard-dg2-set2: NOTRUN -> [SKIP][232] ([Intel XE#3573]) +7 other tests skip
[232]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-435/igt@xe_oa@whitelisted-registers-userspace-config.html
* igt@xe_pat@pat-index-xe2:
- shard-dg2-set2: NOTRUN -> [SKIP][233] ([Intel XE#977])
[233]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-464/igt@xe_pat@pat-index-xe2.html
* igt@xe_pat@pat-index-xehpc:
- shard-dg2-set2: NOTRUN -> [SKIP][234] ([Intel XE#2838] / [Intel XE#979])
[234]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-463/igt@xe_pat@pat-index-xehpc.html
* igt@xe_peer2peer@write:
- shard-bmg: NOTRUN -> [SKIP][235] ([Intel XE#2427])
[235]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-2/igt@xe_peer2peer@write.html
- shard-adlp: NOTRUN -> [SKIP][236] ([Intel XE#1061] / [Intel XE#5568])
[236]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-3/igt@xe_peer2peer@write.html
* igt@xe_pm_residency@cpg-basic:
- shard-lnl: NOTRUN -> [SKIP][237] ([Intel XE#584])
[237]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-2/igt@xe_pm_residency@cpg-basic.html
* igt@xe_pmu@fn-engine-activity-sched-if-idle:
- shard-bmg: [PASS][238] -> [DMESG-WARN][239] ([Intel XE#3876])
[238]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-bmg-8/igt@xe_pmu@fn-engine-activity-sched-if-idle.html
[239]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-6/igt@xe_pmu@fn-engine-activity-sched-if-idle.html
* igt@xe_pmu@gt-frequency:
- shard-lnl: [PASS][240] -> [FAIL][241] ([Intel XE#4819]) +1 other test fail
[240]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-lnl-4/igt@xe_pmu@gt-frequency.html
[241]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-7/igt@xe_pmu@gt-frequency.html
* igt@xe_pxp@pxp-stale-bo-exec-post-suspend:
- shard-dg2-set2: NOTRUN -> [SKIP][242] ([Intel XE#4733]) +1 other test skip
[242]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-432/igt@xe_pxp@pxp-stale-bo-exec-post-suspend.html
* igt@xe_pxp@pxp-termination-key-update-post-termination-irq:
- shard-adlp: NOTRUN -> [SKIP][243] ([Intel XE#4733] / [Intel XE#5594])
[243]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-3/igt@xe_pxp@pxp-termination-key-update-post-termination-irq.html
* igt@xe_pxp@regular-src-to-pxp-dest-rendercopy:
- shard-bmg: NOTRUN -> [SKIP][244] ([Intel XE#4733])
[244]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-6/igt@xe_pxp@regular-src-to-pxp-dest-rendercopy.html
* igt@xe_query@multigpu-query-invalid-cs-cycles:
- shard-bmg: NOTRUN -> [SKIP][245] ([Intel XE#944])
[245]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-4/igt@xe_query@multigpu-query-invalid-cs-cycles.html
- shard-lnl: NOTRUN -> [SKIP][246] ([Intel XE#944])
[246]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-7/igt@xe_query@multigpu-query-invalid-cs-cycles.html
* igt@xe_query@multigpu-query-mem-usage:
- shard-dg2-set2: NOTRUN -> [SKIP][247] ([Intel XE#944]) +1 other test skip
[247]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-435/igt@xe_query@multigpu-query-mem-usage.html
* igt@xe_render_copy@render-stress-1-copies:
- shard-dg2-set2: NOTRUN -> [SKIP][248] ([Intel XE#4814])
[248]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-435/igt@xe_render_copy@render-stress-1-copies.html
* igt@xe_sriov_auto_provisioning@exclusive-ranges:
- shard-dg2-set2: NOTRUN -> [SKIP][249] ([Intel XE#4130])
[249]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-433/igt@xe_sriov_auto_provisioning@exclusive-ranges.html
* igt@xe_sriov_flr@flr-vf1-clear:
- shard-dg2-set2: NOTRUN -> [SKIP][250] ([Intel XE#3342])
[250]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-433/igt@xe_sriov_flr@flr-vf1-clear.html
#### Possible fixes ####
* igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip:
- shard-adlp: [DMESG-FAIL][251] ([Intel XE#4543]) -> [PASS][252] +5 other tests pass
[251]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-adlp-1/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
[252]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-3/igt@kms_big_fb@y-tiled-max-hw-stride-64bpp-rotate-0-hflip-async-flip.html
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-dp-4:
- shard-dg2-set2: [INCOMPLETE][253] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522]) -> [PASS][254]
[253]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-dp-4.html
[254]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc@pipe-a-dp-4.html
* igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions:
- shard-bmg: [SKIP][255] ([Intel XE#2291]) -> [PASS][256] +1 other test pass
[255]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-bmg-6/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
[256]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-2/igt@kms_cursor_legacy@cursorb-vs-flipb-atomic-transitions.html
* igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible:
- shard-bmg: [SKIP][257] ([Intel XE#2316]) -> [PASS][258] +5 other tests pass
[257]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-bmg-6/igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible.html
[258]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-4/igt@kms_flip@2x-flip-vs-dpms-on-nop-interruptible.html
* igt@kms_flip@flip-vs-expired-vblank@c-edp1:
- shard-lnl: [FAIL][259] ([Intel XE#301] / [Intel XE#3149]) -> [PASS][260] +1 other test pass
[259]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-lnl-4/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
[260]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-5/igt@kms_flip@flip-vs-expired-vblank@c-edp1.html
* igt@kms_flip@flip-vs-suspend-interruptible@b-hdmi-a1:
- shard-adlp: [DMESG-WARN][261] ([Intel XE#2953] / [Intel XE#4173] / [Intel XE#4543]) -> [PASS][262]
[261]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-adlp-1/igt@kms_flip@flip-vs-suspend-interruptible@b-hdmi-a1.html
[262]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-3/igt@kms_flip@flip-vs-suspend-interruptible@b-hdmi-a1.html
* igt@kms_flip@plain-flip-interruptible@b-hdmi-a1:
- shard-adlp: [DMESG-WARN][263] ([Intel XE#4543]) -> [PASS][264] +9 other tests pass
[263]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-adlp-1/igt@kms_flip@plain-flip-interruptible@b-hdmi-a1.html
[264]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-3/igt@kms_flip@plain-flip-interruptible@b-hdmi-a1.html
* igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode:
- shard-adlp: [DMESG-FAIL][265] ([Intel XE#4543] / [Intel XE#4921]) -> [PASS][266] +3 other tests pass
[265]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-adlp-8/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode.html
[266]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-6/igt@kms_flip_scaled_crc@flip-64bpp-ytile-to-16bpp-ytile-downscaling@pipe-a-valid-mode.html
* igt@kms_hdr@static-toggle-dpms:
- shard-bmg: [SKIP][267] ([Intel XE#1503]) -> [PASS][268]
[267]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-bmg-6/igt@kms_hdr@static-toggle-dpms.html
[268]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-8/igt@kms_hdr@static-toggle-dpms.html
* igt@kms_invalid_mode@bad-hsync-start@pipe-a-hdmi-a-1:
- shard-adlp: [DMESG-WARN][269] ([Intel XE#2953] / [Intel XE#4173]) -> [PASS][270] +10 other tests pass
[269]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-adlp-1/igt@kms_invalid_mode@bad-hsync-start@pipe-a-hdmi-a-1.html
[270]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-2/igt@kms_invalid_mode@bad-hsync-start@pipe-a-hdmi-a-1.html
* igt@kms_plane_cursor@viewport:
- shard-dg2-set2: [FAIL][271] ([Intel XE#616]) -> [PASS][272]
[271]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-dg2-432/igt@kms_plane_cursor@viewport.html
[272]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-463/igt@kms_plane_cursor@viewport.html
* igt@kms_plane_multiple@2x-tiling-none:
- shard-bmg: [SKIP][273] ([Intel XE#4596]) -> [PASS][274]
[273]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-none.html
[274]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-1/igt@kms_plane_multiple@2x-tiling-none.html
* igt@kms_pm_dc@dc9-dpms:
- shard-bmg: [ABORT][275] ([Intel XE#4760] / [Intel XE#5545]) -> [PASS][276]
[275]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-bmg-1/igt@kms_pm_dc@dc9-dpms.html
[276]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-6/igt@kms_pm_dc@dc9-dpms.html
* igt@kms_pm_rpm@dpms-mode-unset-lpsp:
- shard-adlp: [ABORT][277] ([Intel XE#5545]) -> [PASS][278]
[277]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-adlp-9/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html
[278]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-4/igt@kms_pm_rpm@dpms-mode-unset-lpsp.html
* igt@kms_vrr@negative-basic:
- shard-bmg: [SKIP][279] ([Intel XE#1499]) -> [PASS][280]
[279]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-bmg-6/igt@kms_vrr@negative-basic.html
[280]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-4/igt@kms_vrr@negative-basic.html
* igt@xe_exec_basic@many-execqueues-null:
- shard-adlp: [DMESG-WARN][281] ([Intel XE#3876]) -> [PASS][282] +1 other test pass
[281]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-adlp-9/igt@xe_exec_basic@many-execqueues-null.html
[282]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-4/igt@xe_exec_basic@many-execqueues-null.html
- shard-bmg: [DMESG-WARN][283] ([Intel XE#3876]) -> [PASS][284]
[283]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-bmg-1/igt@xe_exec_basic@many-execqueues-null.html
[284]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-4/igt@xe_exec_basic@many-execqueues-null.html
* igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap:
- shard-dg2-set2: [SKIP][285] ([Intel XE#1392]) -> [PASS][286] +5 other tests pass
[285]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-dg2-432/igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap.html
[286]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-436/igt@xe_exec_basic@multigpu-no-exec-basic-defer-mmap.html
* igt@xe_exec_compute_mode@many-userptr-rebind:
- shard-adlp: [FAIL][287] -> [PASS][288]
[287]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-adlp-9/igt@xe_exec_compute_mode@many-userptr-rebind.html
[288]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-1/igt@xe_exec_compute_mode@many-userptr-rebind.html
* igt@xe_exec_fault_mode@many-execqueues-rebind-prefetch:
- shard-bmg: [FAIL][289] -> [PASS][290] +1 other test pass
[289]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-bmg-8/igt@xe_exec_fault_mode@many-execqueues-rebind-prefetch.html
[290]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-6/igt@xe_exec_fault_mode@many-execqueues-rebind-prefetch.html
* igt@xe_exec_reset@cm-close-fd:
- shard-adlp: [DMESG-WARN][291] ([Intel XE#3868]) -> [PASS][292]
[291]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-adlp-3/igt@xe_exec_reset@cm-close-fd.html
[292]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-8/igt@xe_exec_reset@cm-close-fd.html
* {igt@xe_exec_system_allocator@many-stride-malloc-prefetch}:
- shard-bmg: [WARN][293] ([Intel XE#5786]) -> [PASS][294]
[293]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-bmg-4/igt@xe_exec_system_allocator@many-stride-malloc-prefetch.html
[294]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-4/igt@xe_exec_system_allocator@many-stride-malloc-prefetch.html
* igt@xe_exec_system_allocator@process-many-new-bo-map:
- shard-lnl: [FAIL][295] -> [PASS][296]
[295]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-lnl-3/igt@xe_exec_system_allocator@process-many-new-bo-map.html
[296]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-5/igt@xe_exec_system_allocator@process-many-new-bo-map.html
* igt@xe_exec_threads@threads-hang-fd-userptr-rebind:
- shard-adlp: [DMESG-FAIL][297] ([Intel XE#3876]) -> [PASS][298]
[297]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-adlp-9/igt@xe_exec_threads@threads-hang-fd-userptr-rebind.html
[298]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-8/igt@xe_exec_threads@threads-hang-fd-userptr-rebind.html
* igt@xe_pm@s2idle-vm-bind-unbind-all:
- shard-adlp: [DMESG-WARN][299] ([Intel XE#2953] / [Intel XE#4173] / [Intel XE#4504]) -> [PASS][300]
[299]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-adlp-1/igt@xe_pm@s2idle-vm-bind-unbind-all.html
[300]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-9/igt@xe_pm@s2idle-vm-bind-unbind-all.html
* igt@xe_sriov_flr@flr-twice:
- shard-bmg: [FAIL][301] ([Intel XE#5937]) -> [PASS][302]
[301]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-bmg-6/igt@xe_sriov_flr@flr-twice.html
[302]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-1/igt@xe_sriov_flr@flr-twice.html
#### Warnings ####
* igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc:
- shard-dg2-set2: [INCOMPLETE][303] ([Intel XE#1727] / [Intel XE#2705] / [Intel XE#3113] / [Intel XE#4212] / [Intel XE#4522]) -> [INCOMPLETE][304] ([Intel XE#1727] / [Intel XE#3113])
[303]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-dg2-464/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
[304]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-dg2-433/igt@kms_ccs@random-ccs-data-4-tiled-dg2-rc-ccs-cc.html
* igt@kms_content_protection@lic-type-0:
- shard-bmg: [FAIL][305] ([Intel XE#1178]) -> [SKIP][306] ([Intel XE#2341]) +1 other test skip
[305]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-bmg-8/igt@kms_content_protection@lic-type-0.html
[306]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-6/igt@kms_content_protection@lic-type-0.html
* igt@kms_content_protection@uevent:
- shard-bmg: [SKIP][307] ([Intel XE#2341]) -> [FAIL][308] ([Intel XE#1188])
[307]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-bmg-6/igt@kms_content_protection@uevent.html
[308]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-4/igt@kms_content_protection@uevent.html
* igt@kms_flip@flip-vs-suspend-interruptible:
- shard-adlp: [DMESG-WARN][309] ([Intel XE#2953] / [Intel XE#4173] / [Intel XE#4543]) -> [DMESG-WARN][310] ([Intel XE#4543])
[309]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-adlp-1/igt@kms_flip@flip-vs-suspend-interruptible.html
[310]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-3/igt@kms_flip@flip-vs-suspend-interruptible.html
* igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-shrfb-draw-mmap-wc:
- shard-bmg: [SKIP][311] ([Intel XE#2312]) -> [SKIP][312] ([Intel XE#2311]) +4 other tests skip
[311]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-bmg-6/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-shrfb-draw-mmap-wc.html
[312]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-1/igt@kms_frontbuffer_tracking@drrs-2p-scndscrn-pri-shrfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen:
- shard-bmg: [SKIP][313] ([Intel XE#5390]) -> [SKIP][314] ([Intel XE#2312]) +3 other tests skip
[313]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-bmg-7/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen.html
[314]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-primscrn-spr-indfb-fullscreen.html
* igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][315] ([Intel XE#2312]) -> [SKIP][316] ([Intel XE#5390]) +2 other tests skip
[315]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-bmg-6/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc.html
[316]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-2/igt@kms_frontbuffer_tracking@fbc-2p-scndscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-cur-indfb-move:
- shard-bmg: [SKIP][317] ([Intel XE#2311]) -> [SKIP][318] ([Intel XE#2312]) +10 other tests skip
[317]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-bmg-5/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-cur-indfb-move.html
[318]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcdrrs-2p-primscrn-cur-indfb-move.html
* igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-indfb-plflip-blt:
- shard-bmg: [SKIP][319] ([Intel XE#2312]) -> [SKIP][320] ([Intel XE#2313]) +7 other tests skip
[319]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-bmg-6/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-indfb-plflip-blt.html
[320]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-8/igt@kms_frontbuffer_tracking@fbcpsr-2p-primscrn-indfb-plflip-blt.html
* igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-mmap-wc:
- shard-bmg: [SKIP][321] ([Intel XE#2313]) -> [SKIP][322] ([Intel XE#2312]) +9 other tests skip
[321]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-bmg-2/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-mmap-wc.html
[322]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-6/igt@kms_frontbuffer_tracking@psr-2p-primscrn-spr-indfb-draw-mmap-wc.html
* igt@kms_plane_multiple@2x-tiling-yf:
- shard-bmg: [SKIP][323] ([Intel XE#5021]) -> [SKIP][324] ([Intel XE#4596]) +1 other test skip
[323]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-bmg-3/igt@kms_plane_multiple@2x-tiling-yf.html
[324]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-6/igt@kms_plane_multiple@2x-tiling-yf.html
* igt@kms_pm_dc@dc3co-vpb-simulation:
- shard-lnl: [SKIP][325] ([Intel XE#736]) -> [SKIP][326] ([Intel XE#1909])
[325]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-lnl-7/igt@kms_pm_dc@dc3co-vpb-simulation.html
[326]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-lnl-5/igt@kms_pm_dc@dc3co-vpb-simulation.html
* igt@kms_tiled_display@basic-test-pattern:
- shard-bmg: [FAIL][327] ([Intel XE#1729]) -> [SKIP][328] ([Intel XE#2426])
[327]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-bmg-1/igt@kms_tiled_display@basic-test-pattern.html
[328]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-bmg-2/igt@kms_tiled_display@basic-test-pattern.html
* igt@xe_exec_reset@cm-cat-error:
- shard-adlp: [DMESG-FAIL][329] ([Intel XE#3868]) -> [DMESG-WARN][330] ([Intel XE#3868])
[329]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab/shard-adlp-1/igt@xe_exec_reset@cm-cat-error.html
[330]: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/shard-adlp-9/igt@xe_exec_reset@cm-cat-error.html
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
[Intel XE#1061]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1061
[Intel XE#1062]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1062
[Intel XE#1091]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1091
[Intel XE#1122]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1122
[Intel XE#1124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1124
[Intel XE#1126]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1126
[Intel XE#1178]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1178
[Intel XE#1188]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1188
[Intel XE#1280]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1280
[Intel XE#1392]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1392
[Intel XE#1397]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1397
[Intel XE#1401]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1401
[Intel XE#1406]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1406
[Intel XE#1407]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1407
[Intel XE#1421]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1421
[Intel XE#1428]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1428
[Intel XE#1439]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1439
[Intel XE#1489]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1489
[Intel XE#1499]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1499
[Intel XE#1503]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1503
[Intel XE#1727]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1727
[Intel XE#1729]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1729
[Intel XE#1745]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1745
[Intel XE#1909]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/1909
[Intel XE#2191]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2191
[Intel XE#2234]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2234
[Intel XE#2252]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2252
[Intel XE#2286]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2286
[Intel XE#2291]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2291
[Intel XE#2293]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2293
[Intel XE#2311]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2311
[Intel XE#2312]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2312
[Intel XE#2313]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2313
[Intel XE#2316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2316
[Intel XE#2321]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2321
[Intel XE#2322]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2322
[Intel XE#2327]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2327
[Intel XE#2341]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2341
[Intel XE#2360]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2360
[Intel XE#2370]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2370
[Intel XE#2380]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2380
[Intel XE#2390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2390
[Intel XE#2414]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2414
[Intel XE#2426]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2426
[Intel XE#2427]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2427
[Intel XE#2652]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2652
[Intel XE#2705]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2705
[Intel XE#2763]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2763
[Intel XE#2838]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2838
[Intel XE#2849]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2849
[Intel XE#2850]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2850
[Intel XE#288]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/288
[Intel XE#2883]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2883
[Intel XE#2887]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2887
[Intel XE#2893]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2893
[Intel XE#2907]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2907
[Intel XE#2925]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2925
[Intel XE#2953]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/2953
[Intel XE#301]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/301
[Intel XE#306]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/306
[Intel XE#307]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/307
[Intel XE#308]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/308
[Intel XE#309]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/309
[Intel XE#310]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/310
[Intel XE#3113]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3113
[Intel XE#3124]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3124
[Intel XE#3149]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3149
[Intel XE#316]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/316
[Intel XE#323]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/323
[Intel XE#3278]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3278
[Intel XE#3279]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3279
[Intel XE#3342]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3342
[Intel XE#3432]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3432
[Intel XE#346]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/346
[Intel XE#352]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/352
[Intel XE#356]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/356
[Intel XE#3573]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3573
[Intel XE#367]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/367
[Intel XE#373]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/373
[Intel XE#378]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/378
[Intel XE#3862]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3862
[Intel XE#3868]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3868
[Intel XE#3876]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/3876
[Intel XE#4130]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4130
[Intel XE#4173]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4173
[Intel XE#4212]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4212
[Intel XE#4302]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4302
[Intel XE#4345]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4345
[Intel XE#4354]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4354
[Intel XE#4418]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4418
[Intel XE#4422]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4422
[Intel XE#4504]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4504
[Intel XE#4522]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4522
[Intel XE#4543]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4543
[Intel XE#455]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/455
[Intel XE#4596]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4596
[Intel XE#4608]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4608
[Intel XE#4609]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4609
[Intel XE#4658]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4658
[Intel XE#4665]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4665
[Intel XE#4733]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4733
[Intel XE#4760]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4760
[Intel XE#4814]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4814
[Intel XE#4819]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4819
[Intel XE#4837]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4837
[Intel XE#4915]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4915
[Intel XE#4921]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4921
[Intel XE#4943]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/4943
[Intel XE#5020]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5020
[Intel XE#5021]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5021
[Intel XE#5208]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5208
[Intel XE#5390]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5390
[Intel XE#5545]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5545
[Intel XE#5561]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5561
[Intel XE#5563]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5563
[Intel XE#5565]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5565
[Intel XE#5568]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5568
[Intel XE#5575]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5575
[Intel XE#5594]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5594
[Intel XE#5626]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5626
[Intel XE#5786]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5786
[Intel XE#5792]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5792
[Intel XE#584]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/584
[Intel XE#5899]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5899
[Intel XE#5937]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/5937
[Intel XE#610]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/610
[Intel XE#616]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/616
[Intel XE#651]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/651
[Intel XE#653]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/653
[Intel XE#656]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/656
[Intel XE#688]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/688
[Intel XE#718]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/718
[Intel XE#736]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/736
[Intel XE#787]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/787
[Intel XE#836]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/836
[Intel XE#870]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/870
[Intel XE#929]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/929
[Intel XE#944]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/944
[Intel XE#977]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/977
[Intel XE#979]: https://gitlab.freedesktop.org/drm/xe/kernel/issues/979
Build changes
-------------
* IGT: IGT_8495 -> IGT_8496
* Linux: xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab -> xe-pw-153083v1
IGT_8495: b412b144685feadfd5675f3108de3d6820a4d1db @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
IGT_8496: acea60af09e5f4b3cb0cd6838c23ef1e92c17323 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
xe-3570-912c10fafebf45522f7f56e33a020284e83c27ab: 912c10fafebf45522f7f56e33a020284e83c27ab
xe-pw-153083v1: 153083v1
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/intel-xe/xe-pw-153083v1/index.html
[-- Attachment #2: Type: text/html, Size: 101082 bytes --]
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v3 1/3] drm/xe: Save off position in ring in which a job was programmed
2025-08-18 17:22 ` [PATCH v3 1/3] drm/xe: Save off position in ring in which a job was programmed Matthew Brost
@ 2025-08-27 13:30 ` Lis, Tomasz
2025-08-27 19:07 ` Matthew Brost
0 siblings, 1 reply; 16+ messages in thread
From: Lis, Tomasz @ 2025-08-27 13:30 UTC (permalink / raw)
To: intel-xe
On 8/18/2025 7:22 PM, Matthew Brost wrote:
> VF resume
VF restore / VF post-migration recovery
The second option is more precise. VF resume sometimes needs to update
GGTT addresses as well, but I don't think the update of jobs is required
in such case - no jobs are emitted to a ring during VF PM resume.
(though during VF resume we will probably re-use the fixups implementation
from VF restore, so the same job fixups will be called, they will just
do nothing due to no jobs emitted)
No remarks to the actual code below, it is good and it is required.
-Tomasz
> needs to modify the ring with updated GGTT addresses for
> pending jobs. Save off position in ring in which a job was programmed to
> facilitate.
>
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> ---
> drivers/gpu/drm/xe/xe_ring_ops.c | 23 +++++++++++++++++++----
> drivers/gpu/drm/xe/xe_sched_job_types.h | 5 +++++
> 2 files changed, 24 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
> index 5f15360d14bf..4dad28f0614d 100644
> --- a/drivers/gpu/drm/xe/xe_ring_ops.c
> +++ b/drivers/gpu/drm/xe/xe_ring_ops.c
> @@ -245,12 +245,14 @@ static int emit_copy_timestamp(struct xe_lrc *lrc, u32 *dw, int i)
>
> /* for engines that don't require any special HW handling (no EUs, no aux inval, etc) */
> static void __emit_job_gen12_simple(struct xe_sched_job *job, struct xe_lrc *lrc,
> - u64 batch_addr, u32 seqno)
> + u64 batch_addr, u32 *head, u32 seqno)
> {
> u32 dw[MAX_JOB_SIZE_DW], i = 0;
> u32 ppgtt_flag = get_ppgtt_flag(job);
> struct xe_gt *gt = job->q->gt;
>
> + *head = lrc->ring.tail;
> +
> i = emit_copy_timestamp(lrc, dw, i);
>
> if (job->ring_ops_flush_tlb) {
> @@ -296,7 +298,7 @@ static bool has_aux_ccs(struct xe_device *xe)
> }
>
> static void __emit_job_gen12_video(struct xe_sched_job *job, struct xe_lrc *lrc,
> - u64 batch_addr, u32 seqno)
> + u64 batch_addr, u32 *head, u32 seqno)
> {
> u32 dw[MAX_JOB_SIZE_DW], i = 0;
> u32 ppgtt_flag = get_ppgtt_flag(job);
> @@ -304,6 +306,8 @@ static void __emit_job_gen12_video(struct xe_sched_job *job, struct xe_lrc *lrc,
> struct xe_device *xe = gt_to_xe(gt);
> bool decode = job->q->class == XE_ENGINE_CLASS_VIDEO_DECODE;
>
> + *head = lrc->ring.tail;
> +
> i = emit_copy_timestamp(lrc, dw, i);
>
> dw[i++] = preparser_disable(true);
> @@ -346,7 +350,8 @@ static void __emit_job_gen12_video(struct xe_sched_job *job, struct xe_lrc *lrc,
>
> static void __emit_job_gen12_render_compute(struct xe_sched_job *job,
> struct xe_lrc *lrc,
> - u64 batch_addr, u32 seqno)
> + u64 batch_addr, u32 *head,
> + u32 seqno)
> {
> u32 dw[MAX_JOB_SIZE_DW], i = 0;
> u32 ppgtt_flag = get_ppgtt_flag(job);
> @@ -355,6 +360,8 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job,
> bool lacks_render = !(gt->info.engine_mask & XE_HW_ENGINE_RCS_MASK);
> u32 mask_flags = 0;
>
> + *head = lrc->ring.tail;
> +
> i = emit_copy_timestamp(lrc, dw, i);
>
> dw[i++] = preparser_disable(true);
> @@ -396,11 +403,14 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job,
> }
>
> static void emit_migration_job_gen12(struct xe_sched_job *job,
> - struct xe_lrc *lrc, u32 seqno)
> + struct xe_lrc *lrc, u32 *head,
> + u32 seqno)
> {
> u32 saddr = xe_lrc_start_seqno_ggtt_addr(lrc);
> u32 dw[MAX_JOB_SIZE_DW], i = 0;
>
> + *head = lrc->ring.tail;
> +
> i = emit_copy_timestamp(lrc, dw, i);
>
> i = emit_store_imm_ggtt(saddr, seqno, dw, i);
> @@ -434,6 +444,7 @@ static void emit_job_gen12_gsc(struct xe_sched_job *job)
>
> __emit_job_gen12_simple(job, job->q->lrc[0],
> job->ptrs[0].batch_addr,
> + &job->ptrs[0].head,
> xe_sched_job_lrc_seqno(job));
> }
>
> @@ -443,6 +454,7 @@ static void emit_job_gen12_copy(struct xe_sched_job *job)
>
> if (xe_sched_job_is_migration(job->q)) {
> emit_migration_job_gen12(job, job->q->lrc[0],
> + &job->ptrs[0].head,
> xe_sched_job_lrc_seqno(job));
> return;
> }
> @@ -450,6 +462,7 @@ static void emit_job_gen12_copy(struct xe_sched_job *job)
> for (i = 0; i < job->q->width; ++i)
> __emit_job_gen12_simple(job, job->q->lrc[i],
> job->ptrs[i].batch_addr,
> + &job->ptrs[i].head,
> xe_sched_job_lrc_seqno(job));
> }
>
> @@ -461,6 +474,7 @@ static void emit_job_gen12_video(struct xe_sched_job *job)
> for (i = 0; i < job->q->width; ++i)
> __emit_job_gen12_video(job, job->q->lrc[i],
> job->ptrs[i].batch_addr,
> + &job->ptrs[i].head,
> xe_sched_job_lrc_seqno(job));
> }
>
> @@ -471,6 +485,7 @@ static void emit_job_gen12_render_compute(struct xe_sched_job *job)
> for (i = 0; i < job->q->width; ++i)
> __emit_job_gen12_render_compute(job, job->q->lrc[i],
> job->ptrs[i].batch_addr,
> + &job->ptrs[i].head,
> xe_sched_job_lrc_seqno(job));
> }
>
> diff --git a/drivers/gpu/drm/xe/xe_sched_job_types.h b/drivers/gpu/drm/xe/xe_sched_job_types.h
> index dbf260dded8d..7ce58765a34a 100644
> --- a/drivers/gpu/drm/xe/xe_sched_job_types.h
> +++ b/drivers/gpu/drm/xe/xe_sched_job_types.h
> @@ -24,6 +24,11 @@ struct xe_job_ptrs {
> struct dma_fence_chain *chain_fence;
> /** @batch_addr: Batch buffer address. */
> u64 batch_addr;
> + /**
> + * @head: The tail pointer of the LRC (so head pointer of job) when the
> + * job was submitted
> + */
> + u32 head;
> };
>
> /**
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v3 2/3] drm/xe/guc: Track pending-enable source in submission state
2025-08-18 17:22 ` [PATCH v3 2/3] drm/xe/guc: Track pending-enable source in submission state Matthew Brost
@ 2025-08-27 13:56 ` Lis, Tomasz
2025-08-27 19:10 ` Matthew Brost
0 siblings, 1 reply; 16+ messages in thread
From: Lis, Tomasz @ 2025-08-27 13:56 UTC (permalink / raw)
To: Matthew Brost, intel-xe
On 8/18/2025 7:22 PM, Matthew Brost wrote:
> Add explicit tracking in the GuC submission state to record the source
> of a pending enable (TDR vs. resume path vs. submission). Disambiguating
> the origin lets the GuC submission state machine apply the correct
> recovery/replay behavior.
>
> This helps VF resume:
VF restore
> when the device comes back, the state machine knows
> whether the pending enable stems from timeout recovery, from a resume
VF post-migration recovery
> sequence, or submission and can gate sequencing and fixups accordingly.
>
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> ---
> drivers/gpu/drm/xe/xe_guc_submit.c | 36 ++++++++++++++++++++++++++++++
> 1 file changed, 36 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
> index 1185b23b1384..9e4118126ef9 100644
> --- a/drivers/gpu/drm/xe/xe_guc_submit.c
> +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
> @@ -68,6 +68,8 @@ exec_queue_to_guc(struct xe_exec_queue *q)
> #define EXEC_QUEUE_STATE_BANNED (1 << 9)
> #define EXEC_QUEUE_STATE_CHECK_TIMEOUT (1 << 10)
> #define EXEC_QUEUE_STATE_EXTRA_REF (1 << 11)
> +#define EXEC_QUEUE_STATE_PENDING_RESUME (1 << 12)
you meant RESTORE. But restore is mostly done by PF side, small part remains
when we reach raising this flag, so that is not the best name either..
VF_FIXUPS? VF_RECOVERY? GGTT_FIXUPS?
Maybe VF_FIXUPS is the best for this context, as fixups will be applied both
for migration recovery and for VF PM resume. GGTT_FIXUPS is longer and
will likely not match future platforms, where other fixups will likely be
required (we already have compression metadata restore, and the future
looks like more are coming).
-Tomasz
> +#define EXEC_QUEUE_STATE_PENDING_TDR_EXIT (1 << 13)
>
> static bool exec_queue_registered(struct xe_exec_queue *q)
> {
> @@ -219,6 +221,36 @@ static void set_exec_queue_extra_ref(struct xe_exec_queue *q)
> atomic_or(EXEC_QUEUE_STATE_EXTRA_REF, &q->guc->state);
> }
>
> +static bool __maybe_unused exec_queue_pending_resume(struct xe_exec_queue *q)
> +{
> + return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_PENDING_RESUME;
> +}
> +
> +static void set_exec_queue_pending_resume(struct xe_exec_queue *q)
> +{
> + atomic_or(EXEC_QUEUE_STATE_PENDING_RESUME, &q->guc->state);
> +}
> +
> +static void clear_exec_queue_pending_resume(struct xe_exec_queue *q)
> +{
> + atomic_and(~EXEC_QUEUE_STATE_PENDING_RESUME, &q->guc->state);
> +}
> +
> +static bool __maybe_unused exec_queue_pending_tdr_exit(struct xe_exec_queue *q)
> +{
> + return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_PENDING_TDR_EXIT;
> +}
> +
> +static void set_exec_queue_pending_tdr_exit(struct xe_exec_queue *q)
> +{
> + atomic_or(EXEC_QUEUE_STATE_PENDING_TDR_EXIT, &q->guc->state);
> +}
> +
> +static void clear_exec_queue_pending_tdr_exit(struct xe_exec_queue *q)
> +{
> + atomic_and(~EXEC_QUEUE_STATE_PENDING_TDR_EXIT, &q->guc->state);
> +}
> +
> static bool exec_queue_killed_or_banned_or_wedged(struct xe_exec_queue *q)
> {
> return (atomic_read(&q->guc->state) &
> @@ -1344,6 +1376,7 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
> return DRM_GPU_SCHED_STAT_RESET;
>
> sched_enable:
> + set_exec_queue_pending_tdr_exit(q);
> enable_scheduling(q);
> rearm:
> /*
> @@ -1494,6 +1527,7 @@ static void __guc_exec_queue_process_msg_resume(struct xe_sched_msg *msg)
> clear_exec_queue_suspended(q);
> if (!exec_queue_enabled(q)) {
> q->guc->resume_time = RESUME_PENDING;
> + set_exec_queue_pending_resume(q);
> enable_scheduling(q);
> }
> } else {
> @@ -2065,6 +2099,8 @@ static void handle_sched_done(struct xe_guc *guc, struct xe_exec_queue *q,
> xe_gt_assert(guc_to_gt(guc), exec_queue_pending_enable(q));
>
> q->guc->resume_time = ktime_get();
> + clear_exec_queue_pending_resume(q);
> + clear_exec_queue_pending_tdr_exit(q);
> clear_exec_queue_pending_enable(q);
> smp_wmb();
> wake_up_all(&guc->ct.wq);
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v3 3/3] drm/xe: Track LR jobs in DRM scheduler pending list
2025-08-18 17:22 ` [PATCH v3 3/3] drm/xe: Track LR jobs in DRM scheduler pending list Matthew Brost
@ 2025-08-27 14:46 ` Lis, Tomasz
2025-08-27 19:12 ` Matthew Brost
0 siblings, 1 reply; 16+ messages in thread
From: Lis, Tomasz @ 2025-08-27 14:46 UTC (permalink / raw)
To: Matthew Brost, intel-xe
On 8/18/2025 7:22 PM, Matthew Brost wrote:
> VF resume
VF migration
> requires jobs to remain pending so they can be replayed after
> the VF comes back. Previously, LR job fences were intentionally signaled
> immediately after submission to avoid the risk of exporting them, as
> these fences do not naturally signal in a timely manner and could break
> dma-fence contracts. A side effect of this approach was that LR jobs
> were never added to the DRM scheduler’s pending list, preventing them
> from being tracked for later resubmission.
>
> We now avoid signaling LR job fences and ensure they are never exported;
> Xe already guards against exporting these internal fences. With that
> guarantee in place, we can safely track LR jobs in the scheduler’s
> pending list so they are eligible for resubmission during VF resume
VF restore / VF post-migration recovery
> (and
> similar recovery paths).
>
> An added benefit is that LR queues now gain the DRM scheduler’s built-in
> flow control over ring usage rather than rejecting new jobs in the exec
> IOCTL if the ring is full.
>
> v2:
> - Ensure DRM scheduler TDR doesn't run for LR jobs
> - Stack variable for killed_or_banned_or_wedged
>
> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> ---
> drivers/gpu/drm/xe/xe_exec.c | 12 ++-------
> drivers/gpu/drm/xe/xe_exec_queue.c | 19 -------------
> drivers/gpu/drm/xe/xe_exec_queue.h | 2 --
> drivers/gpu/drm/xe/xe_guc_submit.c | 43 ++++++++++++++++++++----------
> 4 files changed, 31 insertions(+), 45 deletions(-)
>
> diff --git a/drivers/gpu/drm/xe/xe_exec.c b/drivers/gpu/drm/xe/xe_exec.c
> index 44364c042ad7..b29b6edd59e0 100644
> --- a/drivers/gpu/drm/xe/xe_exec.c
> +++ b/drivers/gpu/drm/xe/xe_exec.c
> @@ -117,7 +117,7 @@ int xe_exec_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> u32 i, num_syncs, num_ufence = 0;
> struct xe_sched_job *job;
> struct xe_vm *vm;
> - bool write_locked, skip_retry = false;
> + bool write_locked;
> ktime_t end = 0;
> int err = 0;
> struct xe_hw_engine_group *group;
> @@ -256,12 +256,6 @@ int xe_exec_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> goto err_exec;
> }
>
> - if (xe_exec_queue_is_lr(q) && xe_exec_queue_ring_full(q)) {
> - err = -EWOULDBLOCK; /* Aliased to -EAGAIN */
> - skip_retry = true;
> - goto err_exec;
> - }
> -
> if (xe_exec_queue_uses_pxp(q)) {
> err = xe_vm_validate_protected(q->vm);
> if (err)
> @@ -318,8 +312,6 @@ int xe_exec_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> xe_sched_job_init_user_fence(job, &syncs[i]);
> }
>
> - if (xe_exec_queue_is_lr(q))
> - q->ring_ops->emit_job(job);
> if (!xe_vm_in_lr_mode(vm))
> xe_exec_queue_last_fence_set(q, vm, &job->drm.s_fence->finished);
> xe_sched_job_push(job);
> @@ -344,7 +336,7 @@ int xe_exec_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> drm_exec_fini(exec);
> err_unlock_list:
> up_read(&vm->lock);
> - if (err == -EAGAIN && !skip_retry)
> + if (err == -EAGAIN)
> goto retry;
> err_hw_exec_mode:
> if (mode == EXEC_MODE_DMA_FENCE)
> diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
> index 2d10a53f701d..6f901139e06e 100644
> --- a/drivers/gpu/drm/xe/xe_exec_queue.c
> +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
> @@ -816,25 +816,6 @@ bool xe_exec_queue_is_lr(struct xe_exec_queue *q)
> !(q->flags & EXEC_QUEUE_FLAG_VM);
> }
>
> -static s32 xe_exec_queue_num_job_inflight(struct xe_exec_queue *q)
> -{
> - return q->lrc[0]->fence_ctx.next_seqno - xe_lrc_seqno(q->lrc[0]) - 1;
> -}
> -
> -/**
> - * xe_exec_queue_ring_full() - Whether an exec_queue's ring is full
> - * @q: The exec_queue
> - *
> - * Return: True if the exec_queue's ring is full, false otherwise.
> - */
> -bool xe_exec_queue_ring_full(struct xe_exec_queue *q)
> -{
> - struct xe_lrc *lrc = q->lrc[0];
> - s32 max_job = lrc->ring.size / MAX_JOB_SIZE_BYTES;
> -
> - return xe_exec_queue_num_job_inflight(q) >= max_job;
> -}
> -
> /**
> * xe_exec_queue_is_idle() - Whether an exec_queue is idle.
> * @q: The exec_queue
> diff --git a/drivers/gpu/drm/xe/xe_exec_queue.h b/drivers/gpu/drm/xe/xe_exec_queue.h
> index 15ec852e7f7e..6ae11a1c7404 100644
> --- a/drivers/gpu/drm/xe/xe_exec_queue.h
> +++ b/drivers/gpu/drm/xe/xe_exec_queue.h
> @@ -64,8 +64,6 @@ static inline bool xe_exec_queue_uses_pxp(struct xe_exec_queue *q)
>
> bool xe_exec_queue_is_lr(struct xe_exec_queue *q);
>
> -bool xe_exec_queue_ring_full(struct xe_exec_queue *q);
> -
> bool xe_exec_queue_is_idle(struct xe_exec_queue *q);
>
> void xe_exec_queue_kill(struct xe_exec_queue *q);
> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
> index 9e4118126ef9..69ed3c159d10 100644
> --- a/drivers/gpu/drm/xe/xe_guc_submit.c
> +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
> @@ -837,30 +837,31 @@ guc_exec_queue_run_job(struct drm_sched_job *drm_job)
> struct xe_sched_job *job = to_xe_sched_job(drm_job);
> struct xe_exec_queue *q = job->q;
> struct xe_guc *guc = exec_queue_to_guc(q);
> - struct dma_fence *fence = NULL;
> - bool lr = xe_exec_queue_is_lr(q);
> + bool lr = xe_exec_queue_is_lr(q), killed_or_banned_or_wedged =
> + exec_queue_killed_or_banned_or_wedged(q);
>
> xe_gt_assert(guc_to_gt(guc), !(exec_queue_destroyed(q) || exec_queue_pending_disable(q)) ||
> exec_queue_banned(q) || exec_queue_suspended(q));
>
> trace_xe_sched_job_run(job);
>
> - if (!exec_queue_killed_or_banned_or_wedged(q) && !xe_sched_job_is_error(job)) {
> + if (!killed_or_banned_or_wedged && !xe_sched_job_is_error(job)) {
> if (!exec_queue_registered(q))
> register_exec_queue(q, GUC_CONTEXT_NORMAL);
> - if (!lr) /* LR jobs are emitted in the exec IOCTL */
> - q->ring_ops->emit_job(job);
> + q->ring_ops->emit_job(job);
> submit_exec_queue(q);
> }
>
> - if (lr) {
> - xe_sched_job_set_error(job, -EOPNOTSUPP);
> - dma_fence_put(job->fence); /* Drop ref from xe_sched_job_arm */
> - } else {
> - fence = job->fence;
> - }
> + /*
> + * We don't care about job-fence ordering in LR VMs because these fences
> + * are never exported; they are used solely to keep jobs on the pending
> + * list. Once a queue enters an error state, there's no need to track
> + * them.
> + */
> + if (killed_or_banned_or_wedged && lr)
> + xe_sched_job_set_error(job, -ECANCELED);
>
> - return fence;
> + return job->fence;
> }
>
> /**
> @@ -926,7 +927,8 @@ static void disable_scheduling_deregister(struct xe_guc *guc,
> xe_gt_warn(q->gt, "Pending enable/disable failed to respond\n");
> xe_sched_submission_start(sched);
> xe_gt_reset_async(q->gt);
> - xe_sched_tdr_queue_imm(sched);
> + if (!xe_exec_queue_is_lr(q))
> + xe_sched_tdr_queue_imm(sched);
> return;
> }
>
> @@ -1018,6 +1020,7 @@ static void xe_guc_exec_queue_lr_cleanup(struct work_struct *w)
> struct xe_exec_queue *q = ge->q;
> struct xe_guc *guc = exec_queue_to_guc(q);
> struct xe_gpu_scheduler *sched = &ge->sched;
> + struct xe_sched_job *job;
> bool wedged = false;
>
> xe_gt_assert(guc_to_gt(guc), xe_exec_queue_is_lr(q));
> @@ -1068,7 +1071,16 @@ static void xe_guc_exec_queue_lr_cleanup(struct work_struct *w)
> if (!exec_queue_killed(q) && !xe_lrc_ring_is_idle(q->lrc[0]))
> xe_devcoredump(q, NULL, "LR job cleanup, guc_id=%d", q->guc->id);
>
> + xe_hw_fence_irq_stop(q->fence_irq);
> +
> xe_sched_submission_start(sched);
> +
> + spin_lock(&sched->base.job_list_lock);
> + list_for_each_entry(job, &sched->base.pending_list, drm.list)
> + xe_sched_job_set_error(job, -ECANCELED);
> + spin_unlock(&sched->base.job_list_lock);
> +
> + xe_hw_fence_irq_start(q->fence_irq);
> }
>
> #define ADJUST_FIVE_PERCENT(__t) mul_u64_u32_div(__t, 105, 100)
> @@ -1139,7 +1151,8 @@ static void enable_scheduling(struct xe_exec_queue *q)
> xe_gt_warn(guc_to_gt(guc), "Schedule enable failed to respond");
> set_exec_queue_banned(q);
> xe_gt_reset_async(q->gt);
> - xe_sched_tdr_queue_imm(&q->guc->sched);
> + if (!xe_exec_queue_is_lr(q))
> + xe_sched_tdr_queue_imm(&q->guc->sched);
> }
> }
>
> @@ -1197,6 +1210,8 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
> int i = 0;
> bool wedged = false, skip_timeout_check;
>
Maybe a comment here would make sense? ie:
/* Timeouting a LR job could signal its dma_fence after contracted max
wait time */
The code itself, LGTM.
-Tomasz
> + xe_gt_assert(guc_to_gt(guc), !xe_exec_queue_is_lr(q));
> +
> /*
> * TDR has fired before free job worker. Common if exec queue
> * immediately closed after last fence signaled. Add back to pending
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v3 1/3] drm/xe: Save off position in ring in which a job was programmed
2025-08-27 13:30 ` Lis, Tomasz
@ 2025-08-27 19:07 ` Matthew Brost
0 siblings, 0 replies; 16+ messages in thread
From: Matthew Brost @ 2025-08-27 19:07 UTC (permalink / raw)
To: Lis, Tomasz; +Cc: intel-xe
On Wed, Aug 27, 2025 at 03:30:07PM +0200, Lis, Tomasz wrote:
>
> On 8/18/2025 7:22 PM, Matthew Brost wrote:
> > VF resume
>
> VF restore / VF post-migration recovery
>
> The second option is more precise. VF resume sometimes needs to update
>
> GGTT addresses as well, but I don't think the update of jobs is required
>
> in such case - no jobs are emitted to a ring during VF PM resume.
>
> (though during VF resume we will probably re-use the fixups implementation
>
> from VF restore, so the same job fixups will be called, they will just
>
> do nothing due to no jobs emitted)
>
> No remarks to the actual code below, it is good and it is required.
>
Got it, mixing up terms in multiple places. Will fix.
Matt
> -Tomasz
>
> > needs to modify the ring with updated GGTT addresses for
> > pending jobs. Save off position in ring in which a job was programmed to
> > facilitate.
> >
> > Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> > ---
> > drivers/gpu/drm/xe/xe_ring_ops.c | 23 +++++++++++++++++++----
> > drivers/gpu/drm/xe/xe_sched_job_types.h | 5 +++++
> > 2 files changed, 24 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c
> > index 5f15360d14bf..4dad28f0614d 100644
> > --- a/drivers/gpu/drm/xe/xe_ring_ops.c
> > +++ b/drivers/gpu/drm/xe/xe_ring_ops.c
> > @@ -245,12 +245,14 @@ static int emit_copy_timestamp(struct xe_lrc *lrc, u32 *dw, int i)
> > /* for engines that don't require any special HW handling (no EUs, no aux inval, etc) */
> > static void __emit_job_gen12_simple(struct xe_sched_job *job, struct xe_lrc *lrc,
> > - u64 batch_addr, u32 seqno)
> > + u64 batch_addr, u32 *head, u32 seqno)
> > {
> > u32 dw[MAX_JOB_SIZE_DW], i = 0;
> > u32 ppgtt_flag = get_ppgtt_flag(job);
> > struct xe_gt *gt = job->q->gt;
> > + *head = lrc->ring.tail;
> > +
> > i = emit_copy_timestamp(lrc, dw, i);
> > if (job->ring_ops_flush_tlb) {
> > @@ -296,7 +298,7 @@ static bool has_aux_ccs(struct xe_device *xe)
> > }
> > static void __emit_job_gen12_video(struct xe_sched_job *job, struct xe_lrc *lrc,
> > - u64 batch_addr, u32 seqno)
> > + u64 batch_addr, u32 *head, u32 seqno)
> > {
> > u32 dw[MAX_JOB_SIZE_DW], i = 0;
> > u32 ppgtt_flag = get_ppgtt_flag(job);
> > @@ -304,6 +306,8 @@ static void __emit_job_gen12_video(struct xe_sched_job *job, struct xe_lrc *lrc,
> > struct xe_device *xe = gt_to_xe(gt);
> > bool decode = job->q->class == XE_ENGINE_CLASS_VIDEO_DECODE;
> > + *head = lrc->ring.tail;
> > +
> > i = emit_copy_timestamp(lrc, dw, i);
> > dw[i++] = preparser_disable(true);
> > @@ -346,7 +350,8 @@ static void __emit_job_gen12_video(struct xe_sched_job *job, struct xe_lrc *lrc,
> > static void __emit_job_gen12_render_compute(struct xe_sched_job *job,
> > struct xe_lrc *lrc,
> > - u64 batch_addr, u32 seqno)
> > + u64 batch_addr, u32 *head,
> > + u32 seqno)
> > {
> > u32 dw[MAX_JOB_SIZE_DW], i = 0;
> > u32 ppgtt_flag = get_ppgtt_flag(job);
> > @@ -355,6 +360,8 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job,
> > bool lacks_render = !(gt->info.engine_mask & XE_HW_ENGINE_RCS_MASK);
> > u32 mask_flags = 0;
> > + *head = lrc->ring.tail;
> > +
> > i = emit_copy_timestamp(lrc, dw, i);
> > dw[i++] = preparser_disable(true);
> > @@ -396,11 +403,14 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job,
> > }
> > static void emit_migration_job_gen12(struct xe_sched_job *job,
> > - struct xe_lrc *lrc, u32 seqno)
> > + struct xe_lrc *lrc, u32 *head,
> > + u32 seqno)
> > {
> > u32 saddr = xe_lrc_start_seqno_ggtt_addr(lrc);
> > u32 dw[MAX_JOB_SIZE_DW], i = 0;
> > + *head = lrc->ring.tail;
> > +
> > i = emit_copy_timestamp(lrc, dw, i);
> > i = emit_store_imm_ggtt(saddr, seqno, dw, i);
> > @@ -434,6 +444,7 @@ static void emit_job_gen12_gsc(struct xe_sched_job *job)
> > __emit_job_gen12_simple(job, job->q->lrc[0],
> > job->ptrs[0].batch_addr,
> > + &job->ptrs[0].head,
> > xe_sched_job_lrc_seqno(job));
> > }
> > @@ -443,6 +454,7 @@ static void emit_job_gen12_copy(struct xe_sched_job *job)
> > if (xe_sched_job_is_migration(job->q)) {
> > emit_migration_job_gen12(job, job->q->lrc[0],
> > + &job->ptrs[0].head,
> > xe_sched_job_lrc_seqno(job));
> > return;
> > }
> > @@ -450,6 +462,7 @@ static void emit_job_gen12_copy(struct xe_sched_job *job)
> > for (i = 0; i < job->q->width; ++i)
> > __emit_job_gen12_simple(job, job->q->lrc[i],
> > job->ptrs[i].batch_addr,
> > + &job->ptrs[i].head,
> > xe_sched_job_lrc_seqno(job));
> > }
> > @@ -461,6 +474,7 @@ static void emit_job_gen12_video(struct xe_sched_job *job)
> > for (i = 0; i < job->q->width; ++i)
> > __emit_job_gen12_video(job, job->q->lrc[i],
> > job->ptrs[i].batch_addr,
> > + &job->ptrs[i].head,
> > xe_sched_job_lrc_seqno(job));
> > }
> > @@ -471,6 +485,7 @@ static void emit_job_gen12_render_compute(struct xe_sched_job *job)
> > for (i = 0; i < job->q->width; ++i)
> > __emit_job_gen12_render_compute(job, job->q->lrc[i],
> > job->ptrs[i].batch_addr,
> > + &job->ptrs[i].head,
> > xe_sched_job_lrc_seqno(job));
> > }
> > diff --git a/drivers/gpu/drm/xe/xe_sched_job_types.h b/drivers/gpu/drm/xe/xe_sched_job_types.h
> > index dbf260dded8d..7ce58765a34a 100644
> > --- a/drivers/gpu/drm/xe/xe_sched_job_types.h
> > +++ b/drivers/gpu/drm/xe/xe_sched_job_types.h
> > @@ -24,6 +24,11 @@ struct xe_job_ptrs {
> > struct dma_fence_chain *chain_fence;
> > /** @batch_addr: Batch buffer address. */
> > u64 batch_addr;
> > + /**
> > + * @head: The tail pointer of the LRC (so head pointer of job) when the
> > + * job was submitted
> > + */
> > + u32 head;
> > };
> > /**
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v3 2/3] drm/xe/guc: Track pending-enable source in submission state
2025-08-27 13:56 ` Lis, Tomasz
@ 2025-08-27 19:10 ` Matthew Brost
2025-08-27 20:43 ` Lis, Tomasz
0 siblings, 1 reply; 16+ messages in thread
From: Matthew Brost @ 2025-08-27 19:10 UTC (permalink / raw)
To: Lis, Tomasz; +Cc: intel-xe
On Wed, Aug 27, 2025 at 03:56:59PM +0200, Lis, Tomasz wrote:
>
> On 8/18/2025 7:22 PM, Matthew Brost wrote:
> > Add explicit tracking in the GuC submission state to record the source
> > of a pending enable (TDR vs. resume path vs. submission). Disambiguating
> > the origin lets the GuC submission state machine apply the correct
> > recovery/replay behavior.
> >
> > This helps VF resume:
> VF restore
Yes.
> > when the device comes back, the state machine knows
> > whether the pending enable stems from timeout recovery, from a resume
> VF post-migration recovery
No, resume is done a per queue thing. Resume can be triggered from
preempt fence resume worker or page fault resume worker. It is about
toggling the queues runnable state to enabled so it can be switched back
on the hardware.
> > sequence, or submission and can gate sequencing and fixups accordingly.
> >
> > Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> > ---
> > drivers/gpu/drm/xe/xe_guc_submit.c | 36 ++++++++++++++++++++++++++++++
> > 1 file changed, 36 insertions(+)
> >
> > diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
> > index 1185b23b1384..9e4118126ef9 100644
> > --- a/drivers/gpu/drm/xe/xe_guc_submit.c
> > +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
> > @@ -68,6 +68,8 @@ exec_queue_to_guc(struct xe_exec_queue *q)
> > #define EXEC_QUEUE_STATE_BANNED (1 << 9)
> > #define EXEC_QUEUE_STATE_CHECK_TIMEOUT (1 << 10)
> > #define EXEC_QUEUE_STATE_EXTRA_REF (1 << 11)
> > +#define EXEC_QUEUE_STATE_PENDING_RESUME (1 << 12)
>
> you meant RESTORE. But restore is mostly done by PF side, small part remains
>
> when we reach raising this flag, so that is not the best name either..
>
> VF_FIXUPS? VF_RECOVERY? GGTT_FIXUPS?
>
> Maybe VF_FIXUPS is the best for this context, as fixups will be applied both
>
> for migration recovery and for VF PM resume. GGTT_FIXUPS is longer and
>
> will likely not match future platforms, where other fixups will likely be
>
> required (we already have compression metadata restore, and the future
>
> looks like more are coming).
>
See above. This has nothing to do VFs or PFs, it is an internal
submission thing for LR queues.
Matt
> -Tomasz
>
> > +#define EXEC_QUEUE_STATE_PENDING_TDR_EXIT (1 << 13)
> > static bool exec_queue_registered(struct xe_exec_queue *q)
> > {
> > @@ -219,6 +221,36 @@ static void set_exec_queue_extra_ref(struct xe_exec_queue *q)
> > atomic_or(EXEC_QUEUE_STATE_EXTRA_REF, &q->guc->state);
> > }
> > +static bool __maybe_unused exec_queue_pending_resume(struct xe_exec_queue *q)
> > +{
> > + return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_PENDING_RESUME;
> > +}
> > +
> > +static void set_exec_queue_pending_resume(struct xe_exec_queue *q)
> > +{
> > + atomic_or(EXEC_QUEUE_STATE_PENDING_RESUME, &q->guc->state);
> > +}
> > +
> > +static void clear_exec_queue_pending_resume(struct xe_exec_queue *q)
> > +{
> > + atomic_and(~EXEC_QUEUE_STATE_PENDING_RESUME, &q->guc->state);
> > +}
> > +
> > +static bool __maybe_unused exec_queue_pending_tdr_exit(struct xe_exec_queue *q)
> > +{
> > + return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_PENDING_TDR_EXIT;
> > +}
> > +
> > +static void set_exec_queue_pending_tdr_exit(struct xe_exec_queue *q)
> > +{
> > + atomic_or(EXEC_QUEUE_STATE_PENDING_TDR_EXIT, &q->guc->state);
> > +}
> > +
> > +static void clear_exec_queue_pending_tdr_exit(struct xe_exec_queue *q)
> > +{
> > + atomic_and(~EXEC_QUEUE_STATE_PENDING_TDR_EXIT, &q->guc->state);
> > +}
> > +
> > static bool exec_queue_killed_or_banned_or_wedged(struct xe_exec_queue *q)
> > {
> > return (atomic_read(&q->guc->state) &
> > @@ -1344,6 +1376,7 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
> > return DRM_GPU_SCHED_STAT_RESET;
> > sched_enable:
> > + set_exec_queue_pending_tdr_exit(q);
> > enable_scheduling(q);
> > rearm:
> > /*
> > @@ -1494,6 +1527,7 @@ static void __guc_exec_queue_process_msg_resume(struct xe_sched_msg *msg)
> > clear_exec_queue_suspended(q);
> > if (!exec_queue_enabled(q)) {
> > q->guc->resume_time = RESUME_PENDING;
> > + set_exec_queue_pending_resume(q);
> > enable_scheduling(q);
> > }
> > } else {
> > @@ -2065,6 +2099,8 @@ static void handle_sched_done(struct xe_guc *guc, struct xe_exec_queue *q,
> > xe_gt_assert(guc_to_gt(guc), exec_queue_pending_enable(q));
> > q->guc->resume_time = ktime_get();
> > + clear_exec_queue_pending_resume(q);
> > + clear_exec_queue_pending_tdr_exit(q);
> > clear_exec_queue_pending_enable(q);
> > smp_wmb();
> > wake_up_all(&guc->ct.wq);
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v3 3/3] drm/xe: Track LR jobs in DRM scheduler pending list
2025-08-27 14:46 ` Lis, Tomasz
@ 2025-08-27 19:12 ` Matthew Brost
2025-08-27 20:45 ` Lis, Tomasz
0 siblings, 1 reply; 16+ messages in thread
From: Matthew Brost @ 2025-08-27 19:12 UTC (permalink / raw)
To: Lis, Tomasz; +Cc: intel-xe
On Wed, Aug 27, 2025 at 04:46:58PM +0200, Lis, Tomasz wrote:
>
> On 8/18/2025 7:22 PM, Matthew Brost wrote:
> > VF resume
>
> VF migration
>
Yes.
> > requires jobs to remain pending so they can be replayed after
> > the VF comes back. Previously, LR job fences were intentionally signaled
> > immediately after submission to avoid the risk of exporting them, as
> > these fences do not naturally signal in a timely manner and could break
> > dma-fence contracts. A side effect of this approach was that LR jobs
> > were never added to the DRM scheduler’s pending list, preventing them
> > from being tracked for later resubmission.
> >
> > We now avoid signaling LR job fences and ensure they are never exported;
> > Xe already guards against exporting these internal fences. With that
> > guarantee in place, we can safely track LR jobs in the scheduler’s
> > pending list so they are eligible for resubmission during VF resume
> VF restore / VF post-migration recovery
Yes.
> > (and
> > similar recovery paths).
> >
> > An added benefit is that LR queues now gain the DRM scheduler’s built-in
> > flow control over ring usage rather than rejecting new jobs in the exec
> > IOCTL if the ring is full.
> >
> > v2:
> > - Ensure DRM scheduler TDR doesn't run for LR jobs
> > - Stack variable for killed_or_banned_or_wedged
> >
> > Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> > ---
> > drivers/gpu/drm/xe/xe_exec.c | 12 ++-------
> > drivers/gpu/drm/xe/xe_exec_queue.c | 19 -------------
> > drivers/gpu/drm/xe/xe_exec_queue.h | 2 --
> > drivers/gpu/drm/xe/xe_guc_submit.c | 43 ++++++++++++++++++++----------
> > 4 files changed, 31 insertions(+), 45 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/xe/xe_exec.c b/drivers/gpu/drm/xe/xe_exec.c
> > index 44364c042ad7..b29b6edd59e0 100644
> > --- a/drivers/gpu/drm/xe/xe_exec.c
> > +++ b/drivers/gpu/drm/xe/xe_exec.c
> > @@ -117,7 +117,7 @@ int xe_exec_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> > u32 i, num_syncs, num_ufence = 0;
> > struct xe_sched_job *job;
> > struct xe_vm *vm;
> > - bool write_locked, skip_retry = false;
> > + bool write_locked;
> > ktime_t end = 0;
> > int err = 0;
> > struct xe_hw_engine_group *group;
> > @@ -256,12 +256,6 @@ int xe_exec_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> > goto err_exec;
> > }
> > - if (xe_exec_queue_is_lr(q) && xe_exec_queue_ring_full(q)) {
> > - err = -EWOULDBLOCK; /* Aliased to -EAGAIN */
> > - skip_retry = true;
> > - goto err_exec;
> > - }
> > -
> > if (xe_exec_queue_uses_pxp(q)) {
> > err = xe_vm_validate_protected(q->vm);
> > if (err)
> > @@ -318,8 +312,6 @@ int xe_exec_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> > xe_sched_job_init_user_fence(job, &syncs[i]);
> > }
> > - if (xe_exec_queue_is_lr(q))
> > - q->ring_ops->emit_job(job);
> > if (!xe_vm_in_lr_mode(vm))
> > xe_exec_queue_last_fence_set(q, vm, &job->drm.s_fence->finished);
> > xe_sched_job_push(job);
> > @@ -344,7 +336,7 @@ int xe_exec_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
> > drm_exec_fini(exec);
> > err_unlock_list:
> > up_read(&vm->lock);
> > - if (err == -EAGAIN && !skip_retry)
> > + if (err == -EAGAIN)
> > goto retry;
> > err_hw_exec_mode:
> > if (mode == EXEC_MODE_DMA_FENCE)
> > diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
> > index 2d10a53f701d..6f901139e06e 100644
> > --- a/drivers/gpu/drm/xe/xe_exec_queue.c
> > +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
> > @@ -816,25 +816,6 @@ bool xe_exec_queue_is_lr(struct xe_exec_queue *q)
> > !(q->flags & EXEC_QUEUE_FLAG_VM);
> > }
> > -static s32 xe_exec_queue_num_job_inflight(struct xe_exec_queue *q)
> > -{
> > - return q->lrc[0]->fence_ctx.next_seqno - xe_lrc_seqno(q->lrc[0]) - 1;
> > -}
> > -
> > -/**
> > - * xe_exec_queue_ring_full() - Whether an exec_queue's ring is full
> > - * @q: The exec_queue
> > - *
> > - * Return: True if the exec_queue's ring is full, false otherwise.
> > - */
> > -bool xe_exec_queue_ring_full(struct xe_exec_queue *q)
> > -{
> > - struct xe_lrc *lrc = q->lrc[0];
> > - s32 max_job = lrc->ring.size / MAX_JOB_SIZE_BYTES;
> > -
> > - return xe_exec_queue_num_job_inflight(q) >= max_job;
> > -}
> > -
> > /**
> > * xe_exec_queue_is_idle() - Whether an exec_queue is idle.
> > * @q: The exec_queue
> > diff --git a/drivers/gpu/drm/xe/xe_exec_queue.h b/drivers/gpu/drm/xe/xe_exec_queue.h
> > index 15ec852e7f7e..6ae11a1c7404 100644
> > --- a/drivers/gpu/drm/xe/xe_exec_queue.h
> > +++ b/drivers/gpu/drm/xe/xe_exec_queue.h
> > @@ -64,8 +64,6 @@ static inline bool xe_exec_queue_uses_pxp(struct xe_exec_queue *q)
> > bool xe_exec_queue_is_lr(struct xe_exec_queue *q);
> > -bool xe_exec_queue_ring_full(struct xe_exec_queue *q);
> > -
> > bool xe_exec_queue_is_idle(struct xe_exec_queue *q);
> > void xe_exec_queue_kill(struct xe_exec_queue *q);
> > diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
> > index 9e4118126ef9..69ed3c159d10 100644
> > --- a/drivers/gpu/drm/xe/xe_guc_submit.c
> > +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
> > @@ -837,30 +837,31 @@ guc_exec_queue_run_job(struct drm_sched_job *drm_job)
> > struct xe_sched_job *job = to_xe_sched_job(drm_job);
> > struct xe_exec_queue *q = job->q;
> > struct xe_guc *guc = exec_queue_to_guc(q);
> > - struct dma_fence *fence = NULL;
> > - bool lr = xe_exec_queue_is_lr(q);
> > + bool lr = xe_exec_queue_is_lr(q), killed_or_banned_or_wedged =
> > + exec_queue_killed_or_banned_or_wedged(q);
> > xe_gt_assert(guc_to_gt(guc), !(exec_queue_destroyed(q) || exec_queue_pending_disable(q)) ||
> > exec_queue_banned(q) || exec_queue_suspended(q));
> > trace_xe_sched_job_run(job);
> > - if (!exec_queue_killed_or_banned_or_wedged(q) && !xe_sched_job_is_error(job)) {
> > + if (!killed_or_banned_or_wedged && !xe_sched_job_is_error(job)) {
> > if (!exec_queue_registered(q))
> > register_exec_queue(q, GUC_CONTEXT_NORMAL);
> > - if (!lr) /* LR jobs are emitted in the exec IOCTL */
> > - q->ring_ops->emit_job(job);
> > + q->ring_ops->emit_job(job);
> > submit_exec_queue(q);
> > }
> > - if (lr) {
> > - xe_sched_job_set_error(job, -EOPNOTSUPP);
> > - dma_fence_put(job->fence); /* Drop ref from xe_sched_job_arm */
> > - } else {
> > - fence = job->fence;
> > - }
> > + /*
> > + * We don't care about job-fence ordering in LR VMs because these fences
> > + * are never exported; they are used solely to keep jobs on the pending
> > + * list. Once a queue enters an error state, there's no need to track
> > + * them.
> > + */
> > + if (killed_or_banned_or_wedged && lr)
> > + xe_sched_job_set_error(job, -ECANCELED);
> > - return fence;
> > + return job->fence;
> > }
> > /**
> > @@ -926,7 +927,8 @@ static void disable_scheduling_deregister(struct xe_guc *guc,
> > xe_gt_warn(q->gt, "Pending enable/disable failed to respond\n");
> > xe_sched_submission_start(sched);
> > xe_gt_reset_async(q->gt);
> > - xe_sched_tdr_queue_imm(sched);
> > + if (!xe_exec_queue_is_lr(q))
> > + xe_sched_tdr_queue_imm(sched);
> > return;
> > }
> > @@ -1018,6 +1020,7 @@ static void xe_guc_exec_queue_lr_cleanup(struct work_struct *w)
> > struct xe_exec_queue *q = ge->q;
> > struct xe_guc *guc = exec_queue_to_guc(q);
> > struct xe_gpu_scheduler *sched = &ge->sched;
> > + struct xe_sched_job *job;
> > bool wedged = false;
> > xe_gt_assert(guc_to_gt(guc), xe_exec_queue_is_lr(q));
> > @@ -1068,7 +1071,16 @@ static void xe_guc_exec_queue_lr_cleanup(struct work_struct *w)
> > if (!exec_queue_killed(q) && !xe_lrc_ring_is_idle(q->lrc[0]))
> > xe_devcoredump(q, NULL, "LR job cleanup, guc_id=%d", q->guc->id);
> > + xe_hw_fence_irq_stop(q->fence_irq);
> > +
> > xe_sched_submission_start(sched);
> > +
> > + spin_lock(&sched->base.job_list_lock);
> > + list_for_each_entry(job, &sched->base.pending_list, drm.list)
> > + xe_sched_job_set_error(job, -ECANCELED);
> > + spin_unlock(&sched->base.job_list_lock);
> > +
> > + xe_hw_fence_irq_start(q->fence_irq);
> > }
> > #define ADJUST_FIVE_PERCENT(__t) mul_u64_u32_div(__t, 105, 100)
> > @@ -1139,7 +1151,8 @@ static void enable_scheduling(struct xe_exec_queue *q)
> > xe_gt_warn(guc_to_gt(guc), "Schedule enable failed to respond");
> > set_exec_queue_banned(q);
> > xe_gt_reset_async(q->gt);
> > - xe_sched_tdr_queue_imm(&q->guc->sched);
> > + if (!xe_exec_queue_is_lr(q))
> > + xe_sched_tdr_queue_imm(&q->guc->sched);
> > }
> > }
> > @@ -1197,6 +1210,8 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
> > int i = 0;
> > bool wedged = false, skip_timeout_check;
>
> Maybe a comment here would make sense? ie:
>
> /* Timeouting a LR job could signal its dma_fence after contracted max wait
> time */
>
That's not exactly right. LR jobs have there own cleanup worker. I'd
like to drop that in a follow up patch but that is a bit of a larger
rework so left it out of this patch.
Matt
> The code itself, LGTM.
>
> -Tomasz
>
> > + xe_gt_assert(guc_to_gt(guc), !xe_exec_queue_is_lr(q));
> > +
> > /*
> > * TDR has fired before free job worker. Common if exec queue
> > * immediately closed after last fence signaled. Add back to pending
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v3 2/3] drm/xe/guc: Track pending-enable source in submission state
2025-08-27 19:10 ` Matthew Brost
@ 2025-08-27 20:43 ` Lis, Tomasz
2025-08-27 20:48 ` Matthew Brost
0 siblings, 1 reply; 16+ messages in thread
From: Lis, Tomasz @ 2025-08-27 20:43 UTC (permalink / raw)
To: Matthew Brost; +Cc: intel-xe
On 8/27/2025 9:10 PM, Matthew Brost wrote:
> On Wed, Aug 27, 2025 at 03:56:59PM +0200, Lis, Tomasz wrote:
>> On 8/18/2025 7:22 PM, Matthew Brost wrote:
>>> Add explicit tracking in the GuC submission state to record the source
>>> of a pending enable (TDR vs. resume path vs. submission). Disambiguating
>>> the origin lets the GuC submission state machine apply the correct
>>> recovery/replay behavior.
>>>
>>> This helps VF resume:
>> VF restore
> Yes.
>
>>> when the device comes back, the state machine knows
>>> whether the pending enable stems from timeout recovery, from a resume
>> VF post-migration recovery
> No, resume is done a per queue thing. Resume can be triggered from
> preempt fence resume worker or page fault resume worker. It is about
> toggling the queues runnable state to enabled so it can be switched back
> on the hardware.
ok, can we then call it with a unique term? "Queue resume"? "EQ resume"?
>
>>> sequence, or submission and can gate sequencing and fixups accordingly.
>>>
>>> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
>>> ---
>>> drivers/gpu/drm/xe/xe_guc_submit.c | 36 ++++++++++++++++++++++++++++++
>>> 1 file changed, 36 insertions(+)
>>>
>>> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
>>> index 1185b23b1384..9e4118126ef9 100644
>>> --- a/drivers/gpu/drm/xe/xe_guc_submit.c
>>> +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
>>> @@ -68,6 +68,8 @@ exec_queue_to_guc(struct xe_exec_queue *q)
>>> #define EXEC_QUEUE_STATE_BANNED (1 << 9)
>>> #define EXEC_QUEUE_STATE_CHECK_TIMEOUT (1 << 10)
>>> #define EXEC_QUEUE_STATE_EXTRA_REF (1 << 11)
>>> +#define EXEC_QUEUE_STATE_PENDING_RESUME (1 << 12)
>> you meant RESTORE. But restore is mostly done by PF side, small part remains
>>
>> when we reach raising this flag, so that is not the best name either..
>>
>> VF_FIXUPS? VF_RECOVERY? GGTT_FIXUPS?
>>
>> Maybe VF_FIXUPS is the best for this context, as fixups will be applied both
>>
>> for migration recovery and for VF PM resume. GGTT_FIXUPS is longer and
>>
>> will likely not match future platforms, where other fixups will likely be
>>
>> required (we already have compression metadata restore, and the future
>>
>> looks like more are coming).
>>
> See above. This has nothing to do VFs or PFs, it is an internal
> submission thing for LR queues.
Right, ok.
-Tomasz
>
> Matt
>
>> -Tomasz
>>
>>> +#define EXEC_QUEUE_STATE_PENDING_TDR_EXIT (1 << 13)
>>> static bool exec_queue_registered(struct xe_exec_queue *q)
>>> {
>>> @@ -219,6 +221,36 @@ static void set_exec_queue_extra_ref(struct xe_exec_queue *q)
>>> atomic_or(EXEC_QUEUE_STATE_EXTRA_REF, &q->guc->state);
>>> }
>>> +static bool __maybe_unused exec_queue_pending_resume(struct xe_exec_queue *q)
>>> +{
>>> + return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_PENDING_RESUME;
>>> +}
>>> +
>>> +static void set_exec_queue_pending_resume(struct xe_exec_queue *q)
>>> +{
>>> + atomic_or(EXEC_QUEUE_STATE_PENDING_RESUME, &q->guc->state);
>>> +}
>>> +
>>> +static void clear_exec_queue_pending_resume(struct xe_exec_queue *q)
>>> +{
>>> + atomic_and(~EXEC_QUEUE_STATE_PENDING_RESUME, &q->guc->state);
>>> +}
>>> +
>>> +static bool __maybe_unused exec_queue_pending_tdr_exit(struct xe_exec_queue *q)
>>> +{
>>> + return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_PENDING_TDR_EXIT;
>>> +}
>>> +
>>> +static void set_exec_queue_pending_tdr_exit(struct xe_exec_queue *q)
>>> +{
>>> + atomic_or(EXEC_QUEUE_STATE_PENDING_TDR_EXIT, &q->guc->state);
>>> +}
>>> +
>>> +static void clear_exec_queue_pending_tdr_exit(struct xe_exec_queue *q)
>>> +{
>>> + atomic_and(~EXEC_QUEUE_STATE_PENDING_TDR_EXIT, &q->guc->state);
>>> +}
>>> +
>>> static bool exec_queue_killed_or_banned_or_wedged(struct xe_exec_queue *q)
>>> {
>>> return (atomic_read(&q->guc->state) &
>>> @@ -1344,6 +1376,7 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
>>> return DRM_GPU_SCHED_STAT_RESET;
>>> sched_enable:
>>> + set_exec_queue_pending_tdr_exit(q);
>>> enable_scheduling(q);
>>> rearm:
>>> /*
>>> @@ -1494,6 +1527,7 @@ static void __guc_exec_queue_process_msg_resume(struct xe_sched_msg *msg)
>>> clear_exec_queue_suspended(q);
>>> if (!exec_queue_enabled(q)) {
>>> q->guc->resume_time = RESUME_PENDING;
>>> + set_exec_queue_pending_resume(q);
>>> enable_scheduling(q);
>>> }
>>> } else {
>>> @@ -2065,6 +2099,8 @@ static void handle_sched_done(struct xe_guc *guc, struct xe_exec_queue *q,
>>> xe_gt_assert(guc_to_gt(guc), exec_queue_pending_enable(q));
>>> q->guc->resume_time = ktime_get();
>>> + clear_exec_queue_pending_resume(q);
>>> + clear_exec_queue_pending_tdr_exit(q);
>>> clear_exec_queue_pending_enable(q);
>>> smp_wmb();
>>> wake_up_all(&guc->ct.wq);
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v3 3/3] drm/xe: Track LR jobs in DRM scheduler pending list
2025-08-27 19:12 ` Matthew Brost
@ 2025-08-27 20:45 ` Lis, Tomasz
0 siblings, 0 replies; 16+ messages in thread
From: Lis, Tomasz @ 2025-08-27 20:45 UTC (permalink / raw)
To: Matthew Brost; +Cc: intel-xe
On 8/27/2025 9:12 PM, Matthew Brost wrote:
> On Wed, Aug 27, 2025 at 04:46:58PM +0200, Lis, Tomasz wrote:
>> On 8/18/2025 7:22 PM, Matthew Brost wrote:
>>> VF resume
>> VF migration
>>
> Yes.
>
>>> requires jobs to remain pending so they can be replayed after
>>> the VF comes back. Previously, LR job fences were intentionally signaled
>>> immediately after submission to avoid the risk of exporting them, as
>>> these fences do not naturally signal in a timely manner and could break
>>> dma-fence contracts. A side effect of this approach was that LR jobs
>>> were never added to the DRM scheduler’s pending list, preventing them
>>> from being tracked for later resubmission.
>>>
>>> We now avoid signaling LR job fences and ensure they are never exported;
>>> Xe already guards against exporting these internal fences. With that
>>> guarantee in place, we can safely track LR jobs in the scheduler’s
>>> pending list so they are eligible for resubmission during VF resume
>> VF restore / VF post-migration recovery
> Yes.
>
>>> (and
>>> similar recovery paths).
>>>
>>> An added benefit is that LR queues now gain the DRM scheduler’s built-in
>>> flow control over ring usage rather than rejecting new jobs in the exec
>>> IOCTL if the ring is full.
>>>
>>> v2:
>>> - Ensure DRM scheduler TDR doesn't run for LR jobs
>>> - Stack variable for killed_or_banned_or_wedged
>>>
>>> Signed-off-by: Matthew Brost <matthew.brost@intel.com>
>>> ---
>>> drivers/gpu/drm/xe/xe_exec.c | 12 ++-------
>>> drivers/gpu/drm/xe/xe_exec_queue.c | 19 -------------
>>> drivers/gpu/drm/xe/xe_exec_queue.h | 2 --
>>> drivers/gpu/drm/xe/xe_guc_submit.c | 43 ++++++++++++++++++++----------
>>> 4 files changed, 31 insertions(+), 45 deletions(-)
>>>
>>> diff --git a/drivers/gpu/drm/xe/xe_exec.c b/drivers/gpu/drm/xe/xe_exec.c
>>> index 44364c042ad7..b29b6edd59e0 100644
>>> --- a/drivers/gpu/drm/xe/xe_exec.c
>>> +++ b/drivers/gpu/drm/xe/xe_exec.c
>>> @@ -117,7 +117,7 @@ int xe_exec_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
>>> u32 i, num_syncs, num_ufence = 0;
>>> struct xe_sched_job *job;
>>> struct xe_vm *vm;
>>> - bool write_locked, skip_retry = false;
>>> + bool write_locked;
>>> ktime_t end = 0;
>>> int err = 0;
>>> struct xe_hw_engine_group *group;
>>> @@ -256,12 +256,6 @@ int xe_exec_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
>>> goto err_exec;
>>> }
>>> - if (xe_exec_queue_is_lr(q) && xe_exec_queue_ring_full(q)) {
>>> - err = -EWOULDBLOCK; /* Aliased to -EAGAIN */
>>> - skip_retry = true;
>>> - goto err_exec;
>>> - }
>>> -
>>> if (xe_exec_queue_uses_pxp(q)) {
>>> err = xe_vm_validate_protected(q->vm);
>>> if (err)
>>> @@ -318,8 +312,6 @@ int xe_exec_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
>>> xe_sched_job_init_user_fence(job, &syncs[i]);
>>> }
>>> - if (xe_exec_queue_is_lr(q))
>>> - q->ring_ops->emit_job(job);
>>> if (!xe_vm_in_lr_mode(vm))
>>> xe_exec_queue_last_fence_set(q, vm, &job->drm.s_fence->finished);
>>> xe_sched_job_push(job);
>>> @@ -344,7 +336,7 @@ int xe_exec_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
>>> drm_exec_fini(exec);
>>> err_unlock_list:
>>> up_read(&vm->lock);
>>> - if (err == -EAGAIN && !skip_retry)
>>> + if (err == -EAGAIN)
>>> goto retry;
>>> err_hw_exec_mode:
>>> if (mode == EXEC_MODE_DMA_FENCE)
>>> diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
>>> index 2d10a53f701d..6f901139e06e 100644
>>> --- a/drivers/gpu/drm/xe/xe_exec_queue.c
>>> +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
>>> @@ -816,25 +816,6 @@ bool xe_exec_queue_is_lr(struct xe_exec_queue *q)
>>> !(q->flags & EXEC_QUEUE_FLAG_VM);
>>> }
>>> -static s32 xe_exec_queue_num_job_inflight(struct xe_exec_queue *q)
>>> -{
>>> - return q->lrc[0]->fence_ctx.next_seqno - xe_lrc_seqno(q->lrc[0]) - 1;
>>> -}
>>> -
>>> -/**
>>> - * xe_exec_queue_ring_full() - Whether an exec_queue's ring is full
>>> - * @q: The exec_queue
>>> - *
>>> - * Return: True if the exec_queue's ring is full, false otherwise.
>>> - */
>>> -bool xe_exec_queue_ring_full(struct xe_exec_queue *q)
>>> -{
>>> - struct xe_lrc *lrc = q->lrc[0];
>>> - s32 max_job = lrc->ring.size / MAX_JOB_SIZE_BYTES;
>>> -
>>> - return xe_exec_queue_num_job_inflight(q) >= max_job;
>>> -}
>>> -
>>> /**
>>> * xe_exec_queue_is_idle() - Whether an exec_queue is idle.
>>> * @q: The exec_queue
>>> diff --git a/drivers/gpu/drm/xe/xe_exec_queue.h b/drivers/gpu/drm/xe/xe_exec_queue.h
>>> index 15ec852e7f7e..6ae11a1c7404 100644
>>> --- a/drivers/gpu/drm/xe/xe_exec_queue.h
>>> +++ b/drivers/gpu/drm/xe/xe_exec_queue.h
>>> @@ -64,8 +64,6 @@ static inline bool xe_exec_queue_uses_pxp(struct xe_exec_queue *q)
>>> bool xe_exec_queue_is_lr(struct xe_exec_queue *q);
>>> -bool xe_exec_queue_ring_full(struct xe_exec_queue *q);
>>> -
>>> bool xe_exec_queue_is_idle(struct xe_exec_queue *q);
>>> void xe_exec_queue_kill(struct xe_exec_queue *q);
>>> diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
>>> index 9e4118126ef9..69ed3c159d10 100644
>>> --- a/drivers/gpu/drm/xe/xe_guc_submit.c
>>> +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
>>> @@ -837,30 +837,31 @@ guc_exec_queue_run_job(struct drm_sched_job *drm_job)
>>> struct xe_sched_job *job = to_xe_sched_job(drm_job);
>>> struct xe_exec_queue *q = job->q;
>>> struct xe_guc *guc = exec_queue_to_guc(q);
>>> - struct dma_fence *fence = NULL;
>>> - bool lr = xe_exec_queue_is_lr(q);
>>> + bool lr = xe_exec_queue_is_lr(q), killed_or_banned_or_wedged =
>>> + exec_queue_killed_or_banned_or_wedged(q);
>>> xe_gt_assert(guc_to_gt(guc), !(exec_queue_destroyed(q) || exec_queue_pending_disable(q)) ||
>>> exec_queue_banned(q) || exec_queue_suspended(q));
>>> trace_xe_sched_job_run(job);
>>> - if (!exec_queue_killed_or_banned_or_wedged(q) && !xe_sched_job_is_error(job)) {
>>> + if (!killed_or_banned_or_wedged && !xe_sched_job_is_error(job)) {
>>> if (!exec_queue_registered(q))
>>> register_exec_queue(q, GUC_CONTEXT_NORMAL);
>>> - if (!lr) /* LR jobs are emitted in the exec IOCTL */
>>> - q->ring_ops->emit_job(job);
>>> + q->ring_ops->emit_job(job);
>>> submit_exec_queue(q);
>>> }
>>> - if (lr) {
>>> - xe_sched_job_set_error(job, -EOPNOTSUPP);
>>> - dma_fence_put(job->fence); /* Drop ref from xe_sched_job_arm */
>>> - } else {
>>> - fence = job->fence;
>>> - }
>>> + /*
>>> + * We don't care about job-fence ordering in LR VMs because these fences
>>> + * are never exported; they are used solely to keep jobs on the pending
>>> + * list. Once a queue enters an error state, there's no need to track
>>> + * them.
>>> + */
>>> + if (killed_or_banned_or_wedged && lr)
>>> + xe_sched_job_set_error(job, -ECANCELED);
>>> - return fence;
>>> + return job->fence;
>>> }
>>> /**
>>> @@ -926,7 +927,8 @@ static void disable_scheduling_deregister(struct xe_guc *guc,
>>> xe_gt_warn(q->gt, "Pending enable/disable failed to respond\n");
>>> xe_sched_submission_start(sched);
>>> xe_gt_reset_async(q->gt);
>>> - xe_sched_tdr_queue_imm(sched);
>>> + if (!xe_exec_queue_is_lr(q))
>>> + xe_sched_tdr_queue_imm(sched);
>>> return;
>>> }
>>> @@ -1018,6 +1020,7 @@ static void xe_guc_exec_queue_lr_cleanup(struct work_struct *w)
>>> struct xe_exec_queue *q = ge->q;
>>> struct xe_guc *guc = exec_queue_to_guc(q);
>>> struct xe_gpu_scheduler *sched = &ge->sched;
>>> + struct xe_sched_job *job;
>>> bool wedged = false;
>>> xe_gt_assert(guc_to_gt(guc), xe_exec_queue_is_lr(q));
>>> @@ -1068,7 +1071,16 @@ static void xe_guc_exec_queue_lr_cleanup(struct work_struct *w)
>>> if (!exec_queue_killed(q) && !xe_lrc_ring_is_idle(q->lrc[0]))
>>> xe_devcoredump(q, NULL, "LR job cleanup, guc_id=%d", q->guc->id);
>>> + xe_hw_fence_irq_stop(q->fence_irq);
>>> +
>>> xe_sched_submission_start(sched);
>>> +
>>> + spin_lock(&sched->base.job_list_lock);
>>> + list_for_each_entry(job, &sched->base.pending_list, drm.list)
>>> + xe_sched_job_set_error(job, -ECANCELED);
>>> + spin_unlock(&sched->base.job_list_lock);
>>> +
>>> + xe_hw_fence_irq_start(q->fence_irq);
>>> }
>>> #define ADJUST_FIVE_PERCENT(__t) mul_u64_u32_div(__t, 105, 100)
>>> @@ -1139,7 +1151,8 @@ static void enable_scheduling(struct xe_exec_queue *q)
>>> xe_gt_warn(guc_to_gt(guc), "Schedule enable failed to respond");
>>> set_exec_queue_banned(q);
>>> xe_gt_reset_async(q->gt);
>>> - xe_sched_tdr_queue_imm(&q->guc->sched);
>>> + if (!xe_exec_queue_is_lr(q))
>>> + xe_sched_tdr_queue_imm(&q->guc->sched);
>>> }
>>> }
>>> @@ -1197,6 +1210,8 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
>>> int i = 0;
>>> bool wedged = false, skip_timeout_check;
>> Maybe a comment here would make sense? ie:
>>
>> /* Timeouting a LR job could signal its dma_fence after contracted max wait
>> time */
>>
> That's not exactly right. LR jobs have there own cleanup worker. I'd
> like to drop that in a follow up patch but that is a bit of a larger
> rework so left it out of this patch.
Fair enough, as transitional thing it doesn't need a comment.
-Tomasz
>
> Matt
>
>> The code itself, LGTM.
>>
>> -Tomasz
>>
>>> + xe_gt_assert(guc_to_gt(guc), !xe_exec_queue_is_lr(q));
>>> +
>>> /*
>>> * TDR has fired before free job worker. Common if exec queue
>>> * immediately closed after last fence signaled. Add back to pending
^ permalink raw reply [flat|nested] 16+ messages in thread
* Re: [PATCH v3 2/3] drm/xe/guc: Track pending-enable source in submission state
2025-08-27 20:43 ` Lis, Tomasz
@ 2025-08-27 20:48 ` Matthew Brost
0 siblings, 0 replies; 16+ messages in thread
From: Matthew Brost @ 2025-08-27 20:48 UTC (permalink / raw)
To: Lis, Tomasz; +Cc: intel-xe
On Wed, Aug 27, 2025 at 10:43:53PM +0200, Lis, Tomasz wrote:
>
> On 8/27/2025 9:10 PM, Matthew Brost wrote:
> > On Wed, Aug 27, 2025 at 03:56:59PM +0200, Lis, Tomasz wrote:
> > > On 8/18/2025 7:22 PM, Matthew Brost wrote:
> > > > Add explicit tracking in the GuC submission state to record the source
> > > > of a pending enable (TDR vs. resume path vs. submission). Disambiguating
> > > > the origin lets the GuC submission state machine apply the correct
> > > > recovery/replay behavior.
> > > >
> > > > This helps VF resume:
> > > VF restore
> > Yes.
> >
> > > > when the device comes back, the state machine knows
> > > > whether the pending enable stems from timeout recovery, from a resume
> > > VF post-migration recovery
> > No, resume is done a per queue thing. Resume can be triggered from
> > preempt fence resume worker or page fault resume worker. It is about
> > toggling the queues runnable state to enabled so it can be switched back
> > on the hardware.
>
> ok, can we then call it with a unique term? "Queue resume"? "EQ resume"?
>
Queue resume works.
Matt
> >
> > > > sequence, or submission and can gate sequencing and fixups accordingly.
> > > >
> > > > Signed-off-by: Matthew Brost <matthew.brost@intel.com>
> > > > ---
> > > > drivers/gpu/drm/xe/xe_guc_submit.c | 36 ++++++++++++++++++++++++++++++
> > > > 1 file changed, 36 insertions(+)
> > > >
> > > > diff --git a/drivers/gpu/drm/xe/xe_guc_submit.c b/drivers/gpu/drm/xe/xe_guc_submit.c
> > > > index 1185b23b1384..9e4118126ef9 100644
> > > > --- a/drivers/gpu/drm/xe/xe_guc_submit.c
> > > > +++ b/drivers/gpu/drm/xe/xe_guc_submit.c
> > > > @@ -68,6 +68,8 @@ exec_queue_to_guc(struct xe_exec_queue *q)
> > > > #define EXEC_QUEUE_STATE_BANNED (1 << 9)
> > > > #define EXEC_QUEUE_STATE_CHECK_TIMEOUT (1 << 10)
> > > > #define EXEC_QUEUE_STATE_EXTRA_REF (1 << 11)
> > > > +#define EXEC_QUEUE_STATE_PENDING_RESUME (1 << 12)
> > > you meant RESTORE. But restore is mostly done by PF side, small part remains
> > >
> > > when we reach raising this flag, so that is not the best name either..
> > >
> > > VF_FIXUPS? VF_RECOVERY? GGTT_FIXUPS?
> > >
> > > Maybe VF_FIXUPS is the best for this context, as fixups will be applied both
> > >
> > > for migration recovery and for VF PM resume. GGTT_FIXUPS is longer and
> > >
> > > will likely not match future platforms, where other fixups will likely be
> > >
> > > required (we already have compression metadata restore, and the future
> > >
> > > looks like more are coming).
> > >
> > See above. This has nothing to do VFs or PFs, it is an internal
> > submission thing for LR queues.
>
> Right, ok.
>
> -Tomasz
>
> >
> > Matt
> >
> > > -Tomasz
> > >
> > > > +#define EXEC_QUEUE_STATE_PENDING_TDR_EXIT (1 << 13)
> > > > static bool exec_queue_registered(struct xe_exec_queue *q)
> > > > {
> > > > @@ -219,6 +221,36 @@ static void set_exec_queue_extra_ref(struct xe_exec_queue *q)
> > > > atomic_or(EXEC_QUEUE_STATE_EXTRA_REF, &q->guc->state);
> > > > }
> > > > +static bool __maybe_unused exec_queue_pending_resume(struct xe_exec_queue *q)
> > > > +{
> > > > + return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_PENDING_RESUME;
> > > > +}
> > > > +
> > > > +static void set_exec_queue_pending_resume(struct xe_exec_queue *q)
> > > > +{
> > > > + atomic_or(EXEC_QUEUE_STATE_PENDING_RESUME, &q->guc->state);
> > > > +}
> > > > +
> > > > +static void clear_exec_queue_pending_resume(struct xe_exec_queue *q)
> > > > +{
> > > > + atomic_and(~EXEC_QUEUE_STATE_PENDING_RESUME, &q->guc->state);
> > > > +}
> > > > +
> > > > +static bool __maybe_unused exec_queue_pending_tdr_exit(struct xe_exec_queue *q)
> > > > +{
> > > > + return atomic_read(&q->guc->state) & EXEC_QUEUE_STATE_PENDING_TDR_EXIT;
> > > > +}
> > > > +
> > > > +static void set_exec_queue_pending_tdr_exit(struct xe_exec_queue *q)
> > > > +{
> > > > + atomic_or(EXEC_QUEUE_STATE_PENDING_TDR_EXIT, &q->guc->state);
> > > > +}
> > > > +
> > > > +static void clear_exec_queue_pending_tdr_exit(struct xe_exec_queue *q)
> > > > +{
> > > > + atomic_and(~EXEC_QUEUE_STATE_PENDING_TDR_EXIT, &q->guc->state);
> > > > +}
> > > > +
> > > > static bool exec_queue_killed_or_banned_or_wedged(struct xe_exec_queue *q)
> > > > {
> > > > return (atomic_read(&q->guc->state) &
> > > > @@ -1344,6 +1376,7 @@ guc_exec_queue_timedout_job(struct drm_sched_job *drm_job)
> > > > return DRM_GPU_SCHED_STAT_RESET;
> > > > sched_enable:
> > > > + set_exec_queue_pending_tdr_exit(q);
> > > > enable_scheduling(q);
> > > > rearm:
> > > > /*
> > > > @@ -1494,6 +1527,7 @@ static void __guc_exec_queue_process_msg_resume(struct xe_sched_msg *msg)
> > > > clear_exec_queue_suspended(q);
> > > > if (!exec_queue_enabled(q)) {
> > > > q->guc->resume_time = RESUME_PENDING;
> > > > + set_exec_queue_pending_resume(q);
> > > > enable_scheduling(q);
> > > > }
> > > > } else {
> > > > @@ -2065,6 +2099,8 @@ static void handle_sched_done(struct xe_guc *guc, struct xe_exec_queue *q,
> > > > xe_gt_assert(guc_to_gt(guc), exec_queue_pending_enable(q));
> > > > q->guc->resume_time = ktime_get();
> > > > + clear_exec_queue_pending_resume(q);
> > > > + clear_exec_queue_pending_tdr_exit(q);
> > > > clear_exec_queue_pending_enable(q);
> > > > smp_wmb();
> > > > wake_up_all(&guc->ct.wq);
^ permalink raw reply [flat|nested] 16+ messages in thread
end of thread, other threads:[~2025-08-27 20:49 UTC | newest]
Thread overview: 16+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-08-18 17:22 [PATCH v3 0/3] Core Xe changes preparing for VF resume Matthew Brost
2025-08-18 17:22 ` [PATCH v3 1/3] drm/xe: Save off position in ring in which a job was programmed Matthew Brost
2025-08-27 13:30 ` Lis, Tomasz
2025-08-27 19:07 ` Matthew Brost
2025-08-18 17:22 ` [PATCH v3 2/3] drm/xe/guc: Track pending-enable source in submission state Matthew Brost
2025-08-27 13:56 ` Lis, Tomasz
2025-08-27 19:10 ` Matthew Brost
2025-08-27 20:43 ` Lis, Tomasz
2025-08-27 20:48 ` Matthew Brost
2025-08-18 17:22 ` [PATCH v3 3/3] drm/xe: Track LR jobs in DRM scheduler pending list Matthew Brost
2025-08-27 14:46 ` Lis, Tomasz
2025-08-27 19:12 ` Matthew Brost
2025-08-27 20:45 ` Lis, Tomasz
2025-08-18 18:17 ` ✓ CI.KUnit: success for Core Xe changes preparing for VF resume Patchwork
2025-08-18 19:36 ` ✓ Xe.CI.BAT: " Patchwork
2025-08-19 12:52 ` ✗ Xe.CI.Full: failure " Patchwork
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