From: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>
To: intel-xe@lists.freedesktop.org
Cc: "Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
"Matthew Brost" <matthew.brost@intel.com>,
"Jason Gunthorpe" <jgg@ziepe.ca>,
"Andrew Morton" <akpm@linux-foundation.org>,
"Simona Vetter" <simona.vetter@ffwll.ch>,
"Dave Airlie" <airlied@gmail.com>,
"Alistair Popple" <apopple@nvidia.com>,
dri-devel@lists.freedesktop.org, linux-mm@kvack.org,
linux-kernel@vger.kernel.org,
"Christian König" <christian.koenig@amd.com>
Subject: [PATCH 0/6] Two-pass MMU interval notifiers
Date: Thu, 21 Aug 2025 13:46:20 +0200 [thread overview]
Message-ID: <20250821114626.89818-1-thomas.hellstrom@linux.intel.com> (raw)
GPU use-cases for mmu_interval_notifiers with hmm often involve
starting a gpu operation and then waiting for it to complete.
These operations are typically context preemption or TLB flushing.
With single-pass notifiers per GPU this doesn't scale in
multi-gpu scenarios. In those scenarios we'd want to first start
preemption- or TLB flushing on all GPUs and as a second pass wait
for them to complete.
One can do this on per-driver basis multiplexing per-driver
notifiers but that would mean sharing the notifier "user" lock
across all GPUs and that doesn't scale well either, so adding support
for two-pass in the core appears like the right choice.
So this series does that, with pach 1 implementing the core support
and also describes the choices made.
The rest of the patches implements a POC with drm_gpusvm, but this
will also come in handy for things like userptr where waiting for
bind completion, starting of preemption and waiting for
preemption completion can pe pipelined across GPUs.
Cc: Matthew Brost <matthew.brost@intel.com>
Cc: Jason Gunthorpe <jgg@ziepe.ca>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Simona Vetter <simona.vetter@ffwll.ch>
Cc: Dave Airlie <airlied@gmail.com>
Cc: Alistair Popple <apopple@nvidia.com>
Cc: <dri-devel@lists.freedesktop.org>
Cc: <linux-mm@kvack.org>
Cc: <linux-kernel@vger.kernel.org>
Matthew Brost (5):
drm/gpusvm, drm/xe: Update GPU SVM / Xe to twopass MMU notifier
drm/gpusvm: Add drm_gpusvm_in_notifier_* helpers
drm/xe: Skip waiting on unarmed fences in
xe_gt_tlb_invalidation_fence_wait
drm/xe: Add fences argument to xe_vm_range_tilemask_tlb_invalidation
drm/xe: Implement two pass MMU notifiers for SVM
Thomas Hellström (1):
mm/mmu_notifier: Allow two-pass struct mmu_interval_notifiers
drivers/gpu/drm/drm_gpusvm.c | 18 +++--
drivers/gpu/drm/xe/xe_gt_tlb_invalidation.h | 3 +-
drivers/gpu/drm/xe/xe_svm.c | 83 +++++++++++++++++----
drivers/gpu/drm/xe/xe_vm.c | 26 ++++---
drivers/gpu/drm/xe/xe_vm.h | 6 +-
include/drm/drm_gpusvm.h | 33 ++++++--
include/linux/mmu_notifier.h | 42 +++++++++++
mm/mmu_notifier.c | 63 +++++++++++++---
8 files changed, 224 insertions(+), 50 deletions(-)
--
2.50.1
next reply other threads:[~2025-08-21 11:46 UTC|newest]
Thread overview: 8+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-21 11:46 Thomas Hellström [this message]
2025-08-21 11:46 ` [PATCH 1/6] mm/mmu_notifier: Allow two-pass struct mmu_interval_notifiers Thomas Hellström
2025-09-03 12:56 ` Thomas Hellström
2025-08-21 11:46 ` [PATCH 2/6] drm/gpusvm, drm/xe: Update GPU SVM / Xe to twopass MMU notifier Thomas Hellström
2025-08-21 11:46 ` [PATCH 3/6] drm/gpusvm: Add drm_gpusvm_in_notifier_* helpers Thomas Hellström
2025-08-21 11:46 ` [PATCH 4/6] drm/xe: Skip waiting on unarmed fences in xe_gt_tlb_invalidation_fence_wait Thomas Hellström
2025-08-21 11:46 ` [PATCH 5/6] drm/xe: Add fences argument to xe_vm_range_tilemask_tlb_invalidation Thomas Hellström
2025-08-21 11:46 ` [PATCH 6/6] drm/xe: Implement two pass MMU notifiers for SVM Thomas Hellström
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