From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 63826CAC585 for ; Sun, 7 Sep 2025 07:46:36 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id C681D10E19B; Sun, 7 Sep 2025 07:46:33 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="kjLguoK0"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.9]) by gabe.freedesktop.org (Postfix) with ESMTPS id BDA9910E01F; Sun, 7 Sep 2025 07:46:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1757231189; x=1788767189; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=kFDSVLZL0MtAmq3N+kU5KF4bv2KvPzPFaAn3lzR6sd8=; b=kjLguoK0RpmSsIeT17K703+kE4nJ6hLKhCleP58EtQ1+3+0dOley4/5b 9LfXy9JB5kkBxZzt45oLgVj3TI1vqeFNGW5H1ZK3wxUlX7c0bsuuMxgeg rL/Bcboh0j2OhGT6s4p7AK87Zx0rM1LPsCRTq06okdelilUQfINNyLwjc U8oGMI+c9idxybzoSRQJ9D7yxh1m6w3Eajdv5LGKrmMl3rYboAnSjCrDe rMw9lBsgUDRPvnnV+jiVmv7027LM2MZSx93Tl7hdtg9mpXoqxzZ8i6P65 I+fxGHkWO5CfsbQkw5jMsp/KcE3oKi+Bhoxz/PsZqNG/l4Uq25SvjsmoK w==; X-CSE-ConnectionGUID: A1klWI9mQ16j9Fg8qynG2A== X-CSE-MsgGUID: RpmBKjjIQueChQkoTHdpxg== X-IronPort-AV: E=McAfee;i="6800,10657,11545"; a="70220293" X-IronPort-AV: E=Sophos;i="6.18,246,1751266800"; d="scan'208";a="70220293" Received: from fmviesa005.fm.intel.com ([10.60.135.145]) by fmvoesa103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Sep 2025 00:46:26 -0700 X-CSE-ConnectionGUID: DTtpst/lTsee/foGTDdMwg== X-CSE-MsgGUID: k3N3eb8sQ5W4gFlrXcwiug== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.18,246,1751266800"; d="scan'208";a="176873993" Received: from srr4-3-linux-103-aknautiy.iind.intel.com ([10.223.34.160]) by fmviesa005-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 07 Sep 2025 00:46:24 -0700 From: Ankit Nautiyal To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org Cc: ville.syrjala@linux.intel.com, Ankit Nautiyal , Mitul Golani Subject: [PATCH 06/14] drm/i915/dp: Add SDP latency computation helper Date: Sun, 7 Sep 2025 13:02:33 +0530 Message-ID: <20250907073241.19632-7-ankit.k.nautiyal@intel.com> X-Mailer: git-send-email 2.45.2 In-Reply-To: <20250907073241.19632-1-ankit.k.nautiyal@intel.com> References: <20250907073241.19632-1-ankit.k.nautiyal@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" Add a helper to compute vblank time needed for transmitting specific DisplayPort SDPs like PPS, GAMUT_METADATA, and VSC_EXT. Latency is based on line count per packet type and current line time. Used to ensure adequate vblank when features like DSC/HDR are enabled. Bspec: 70151 Signed-off-by: Ankit Nautiyal Reviewed-by: Mitul Golani --- drivers/gpu/drm/i915/display/intel_dp.c | 47 +++++++++++++++++++++++++ drivers/gpu/drm/i915/display/intel_dp.h | 1 + 2 files changed, 48 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c index 2eab591a8ef5..d5d30bdc6848 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.c +++ b/drivers/gpu/drm/i915/display/intel_dp.c @@ -6857,3 +6857,50 @@ void intel_dp_mst_resume(struct intel_display *display) } } } + +static +int intel_dp_get_sdp_latency(u32 type, int linetime_us) +{ + int lines; + + switch (type) { + case DP_SDP_VSC_EXT_VESA: + case DP_SDP_VSC_EXT_CEA: + lines = 10; + break; + case HDMI_PACKET_TYPE_GAMUT_METADATA: + lines = 8; + break; + case DP_SDP_PPS: + lines = 6; + break; + default: + lines = 0; + break; + } + + return lines * linetime_us; +} + +int intel_dp_compute_sdp_latency(struct intel_crtc_state *crtc_state, + bool assume_all_enabled) +{ + const struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode; + int sdp_latency = 0; + int linetime_us; + + linetime_us = DIV_ROUND_UP(adjusted_mode->crtc_htotal * 1000, + adjusted_mode->crtc_clock); + if (assume_all_enabled || + crtc_state->infoframes.enable & + intel_hdmi_infoframe_enable(HDMI_PACKET_TYPE_GAMUT_METADATA)) + sdp_latency = max(sdp_latency, + intel_dp_get_sdp_latency(HDMI_PACKET_TYPE_GAMUT_METADATA, + linetime_us)); + + if (assume_all_enabled || crtc_state->dsc.compression_enable) + sdp_latency = max(sdp_latency, + intel_dp_get_sdp_latency(DP_SDP_PPS, linetime_us)); + + return sdp_latency; +} diff --git a/drivers/gpu/drm/i915/display/intel_dp.h b/drivers/gpu/drm/i915/display/intel_dp.h index f90cfd1dbbd0..bfd1bd448672 100644 --- a/drivers/gpu/drm/i915/display/intel_dp.h +++ b/drivers/gpu/drm/i915/display/intel_dp.h @@ -215,5 +215,6 @@ int intel_dp_compute_min_hblank(struct intel_crtc_state *crtc_state, int intel_dp_dsc_bpp_step_x16(const struct intel_connector *connector); void intel_dp_dpcd_set_probe(struct intel_dp *intel_dp, bool force_on_external); bool intel_dp_in_hdr_mode(const struct drm_connector_state *conn_state); +int intel_dp_compute_sdp_latency(struct intel_crtc_state *crtc_state, bool assume_all_enabled); #endif /* __INTEL_DP_H__ */ -- 2.45.2