From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 3AF41CA0EE8 for ; Wed, 17 Sep 2025 03:46:52 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id F307010E735; Wed, 17 Sep 2025 03:46:51 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="a3/gYhU/"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.9]) by gabe.freedesktop.org (Postfix) with ESMTPS id 70ED010E63D for ; Wed, 17 Sep 2025 03:46:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1758080782; x=1789616782; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=j5ln7dubYlbKNxEl0HTIk3jyInZTGllZ5QgkAruoASY=; b=a3/gYhU/xjEp18lHW0pV7li7L4l1unKbHdPszqQYRT6r6uAl4qgjK1kw do/P1gywySVoVoB5Eb+Ew3fnxOLaEuqyfrnzGB1Noh3vQsXVeNhB8qRDu Wb4mabTRQ6XDfVdwN5cnrH7vp+JTCZGTT3NeFE1PTf33t+jDHGaFDxO7D 6EUSNC3+4biK6npT7+AN66whqLK/Q+Czh2n3PSAbRl+ByMD1iL4NT33rh pPN1VFBwRRGZKycR6pRe+D2Cufcf9CkQ3yMec8n7kM0Eg71pPw7rYwrxv uHfLI5o+XF34gdMPKNGSRxy/tvOkoAoBhlkEPduPn8gyFM6lxE9tkBsqb w==; X-CSE-ConnectionGUID: 7zKUl19GQaWTgfVi+cLUfg== X-CSE-MsgGUID: pMMDuO4MTS+CGR3A9vEkQQ== X-IronPort-AV: E=McAfee;i="6800,10657,11555"; a="71060802" X-IronPort-AV: E=Sophos;i="6.18,270,1751266800"; d="scan'208";a="71060802" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by fmvoesa103.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Sep 2025 20:46:22 -0700 X-CSE-ConnectionGUID: kJaQmmmeR/+FW2KRHoD4jg== X-CSE-MsgGUID: Dkueh1z7RHmFle/DNc92jg== X-ExtLoop1: 1 Received: from lstrano-desk.jf.intel.com ([10.54.39.91]) by fmviesa003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Sep 2025 20:46:22 -0700 From: Matthew Brost To: intel-xe@lists.freedesktop.org Subject: [PATCH 20/28] drm/xe/vf: Stop and flush CTs in VF post migration recovery Date: Tue, 16 Sep 2025 20:46:07 -0700 Message-Id: <20250917034615.3977603-21-matthew.brost@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20250917034615.3977603-1-matthew.brost@intel.com> References: <20250917034615.3977603-1-matthew.brost@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" Flushing CTs (i.e., progressing all pending G2H messages) gives VF post-migration recovery an accurate view of which H2G messages the GuC has processed, enabling the GuC submission state machine to correctly rebuild all state. Also, stop all CT traffic, as the CT is not live during VF post-migration recovery. Signed-off-by: Matthew Brost --- drivers/gpu/drm/xe/xe_gt_sriov_vf.c | 2 ++ drivers/gpu/drm/xe/xe_guc_ct.c | 11 +++++++++++ drivers/gpu/drm/xe/xe_guc_ct.h | 1 + 3 files changed, 14 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c index d9e5654b289a..64c41056389c 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c +++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c @@ -23,6 +23,7 @@ #include "xe_gt_sriov_vf.h" #include "xe_gt_sriov_vf_types.h" #include "xe_guc.h" +#include "xe_guc_ct.h" #include "xe_guc_hxg_helpers.h" #include "xe_guc_relay.h" #include "xe_guc_submit.h" @@ -1194,6 +1195,7 @@ static void vf_post_migration_shutdown(struct xe_gt *gt) gt->sriov.vf.migration.recovery_queued = false; spin_unlock(>->sriov.vf.migration.lock); + xe_guc_ct_flush(>->uc.guc.ct); xe_guc_submit_pause(>->uc.guc); } diff --git a/drivers/gpu/drm/xe/xe_guc_ct.c b/drivers/gpu/drm/xe/xe_guc_ct.c index 6a1baed934c2..fb4bf894de1c 100644 --- a/drivers/gpu/drm/xe/xe_guc_ct.c +++ b/drivers/gpu/drm/xe/xe_guc_ct.c @@ -574,6 +574,17 @@ void xe_guc_ct_disable(struct xe_guc_ct *ct) stop_g2h_handler(ct); } +/** + * xe_guc_ct_flush - Flush all processing of G2H / H2G + * @ct: the &xe_guc_ct + */ +void xe_guc_ct_flush(struct xe_guc_ct *ct) +{ + receive_g2h(ct); + wake_up_all(&ct->g2h_fence_wq); + xe_guc_ct_stop(ct); +} + /** * xe_guc_ct_stop - Set GuC to stopped state * @ct: the &xe_guc_ct diff --git a/drivers/gpu/drm/xe/xe_guc_ct.h b/drivers/gpu/drm/xe/xe_guc_ct.h index d6c81325a76c..1e32a59817cc 100644 --- a/drivers/gpu/drm/xe/xe_guc_ct.h +++ b/drivers/gpu/drm/xe/xe_guc_ct.h @@ -17,6 +17,7 @@ int xe_guc_ct_init_post_hwconfig(struct xe_guc_ct *ct); int xe_guc_ct_enable(struct xe_guc_ct *ct); void xe_guc_ct_disable(struct xe_guc_ct *ct); void xe_guc_ct_stop(struct xe_guc_ct *ct); +void xe_guc_ct_flush(struct xe_guc_ct *ct); void xe_guc_ct_fast_path(struct xe_guc_ct *ct); struct xe_guc_ct_snapshot *xe_guc_ct_snapshot_capture(struct xe_guc_ct *ct); -- 2.34.1