From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A3F54CCA470 for ; Wed, 8 Oct 2025 21:46:06 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 69C3310E910; Wed, 8 Oct 2025 21:46:06 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="krVT8c8a"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.16]) by gabe.freedesktop.org (Postfix) with ESMTPS id A58CD10E8F5 for ; Wed, 8 Oct 2025 21:45:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1759959952; x=1791495952; h=from:to:subject:date:message-id:in-reply-to:references: mime-version:content-transfer-encoding; bh=IYEp8WLHKB5AmZUhOHtHp+L+qOfVgUsWlcvuBwgx71c=; b=krVT8c8afjD1KWoCkMNx+eJ/NQqEPh0ay1zirx6qFhO5e57OFy0fwf8X 8Q2qROyCg8cFbNitDdmtYczpJxjmr29KMhptpJhZ0KO8kE5NSHORs/F8Y uTwn0lFJ7dwc36mmXpMcrWp/SVXmfK8nN5+O0p7gEPeXBc38zz+QQCcOM 5woU31CuUFSsAiRwAvUcgSeMKqyuGNVwk5Om5I3kC/35TNtnEJuGYPnQM Wdte0VN9LJq/IUn6cwdb6U5RnJE8DoWRf4wKEvy6Jp5q3QSL+FkXqEQzY RQjBwxTNyA83xWPZhDJuvZsqK7L9kUvPfDnOOFqIfhDJszDtK0ssErcuN A==; X-CSE-ConnectionGUID: x9ipwaubQxah+4wC2MR/QA== X-CSE-MsgGUID: V5EtJLF9RYyrZwSdhPbOHg== X-IronPort-AV: E=McAfee;i="6800,10657,11576"; a="49726879" X-IronPort-AV: E=Sophos;i="6.19,214,1754982000"; d="scan'208";a="49726879" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by fmvoesa110.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Oct 2025 14:45:43 -0700 X-CSE-ConnectionGUID: 0Ok5deDYTl6MiztiQMClOg== X-CSE-MsgGUID: ZxHLZG2ATrWeotifaSY8jg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,214,1754982000"; d="scan'208";a="217635221" Received: from lstrano-desk.jf.intel.com ([10.54.39.91]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 08 Oct 2025 14:45:37 -0700 From: Matthew Brost To: intel-xe@lists.freedesktop.org Subject: [PATCH v10 33/34] drm/xe/vf: Rebase CCS save/restore BB GGTT addresses Date: Wed, 8 Oct 2025 14:45:31 -0700 Message-Id: <20251008214532.3442967-34-matthew.brost@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251008214532.3442967-1-matthew.brost@intel.com> References: <20251008214532.3442967-1-matthew.brost@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" Rebase the CCS save/restore BB's GGTT addresses during VF post-migration recovery by setting the software ring tail to zero, the LRC ring head to zero, and rewriting the jump-to-BB instructions. Signed-off-by: Matthew Brost Reviewed-by: Satyanarayana K V P --- drivers/gpu/drm/xe/xe_gt_sriov_vf.c | 4 ++++ drivers/gpu/drm/xe/xe_sriov_vf_ccs.c | 28 ++++++++++++++++++++++++++++ drivers/gpu/drm/xe/xe_sriov_vf_ccs.h | 1 + 3 files changed, 33 insertions(+) diff --git a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c index b527f78da295..46518e629ba3 100644 --- a/drivers/gpu/drm/xe/xe_gt_sriov_vf.c +++ b/drivers/gpu/drm/xe/xe_gt_sriov_vf.c @@ -34,6 +34,7 @@ #include "xe_pm.h" #include "xe_sriov.h" #include "xe_sriov_vf.h" +#include "xe_sriov_vf_ccs.h" #include "xe_tile_sriov_vf.h" #include "xe_tlb_inval.h" #include "xe_uc_fw.h" @@ -1149,6 +1150,9 @@ static int vf_post_migration_fixups(struct xe_gt *gt) if (err) return err; + if (xe_gt_is_main_type(gt)) + xe_sriov_vf_ccs_rebase(gt_to_xe(gt)); + xe_gt_sriov_vf_default_lrcs_hwsp_rebase(gt); err = xe_guc_contexts_hwsp_rebase(>->uc.guc, buf); if (err) diff --git a/drivers/gpu/drm/xe/xe_sriov_vf_ccs.c b/drivers/gpu/drm/xe/xe_sriov_vf_ccs.c index 8dec616c37c9..790249801364 100644 --- a/drivers/gpu/drm/xe/xe_sriov_vf_ccs.c +++ b/drivers/gpu/drm/xe/xe_sriov_vf_ccs.c @@ -175,6 +175,15 @@ static void ccs_rw_update_ring(struct xe_sriov_vf_ccs_ctx *ctx) struct xe_lrc *lrc = xe_exec_queue_lrc(ctx->mig_q); u32 dw[10], i = 0; + /* + * XXX: Save/restore fixes — for some reason, the GuC only accepts the + * save/restore context if the LRC head pointer is zero. This is evident + * from repeated VF migrations failing when the LRC head pointer is + * non-zero. + */ + lrc->ring.tail = 0; + xe_lrc_set_ring_head(lrc, 0); + dw[i++] = MI_ARB_ON_OFF | MI_ARB_ENABLE; dw[i++] = MI_BATCH_BUFFER_START | XE_INSTR_NUM_DW(3); dw[i++] = lower_32_bits(addr); @@ -186,6 +195,25 @@ static void ccs_rw_update_ring(struct xe_sriov_vf_ccs_ctx *ctx) xe_lrc_set_ring_tail(lrc, lrc->ring.tail); } +/** + * xe_sriov_vf_ccs_rebase - Rebase GGTT addresses for CCS save / restore + * @xe: the &xe_device. + */ +void xe_sriov_vf_ccs_rebase(struct xe_device *xe) +{ + enum xe_sriov_vf_ccs_rw_ctxs ctx_id; + + if (!IS_VF_CCS_READY(xe)) + return; + + for_each_ccs_rw_ctx(ctx_id) { + struct xe_sriov_vf_ccs_ctx *ctx = + &xe->sriov.vf.ccs.contexts[ctx_id]; + + ccs_rw_update_ring(ctx); + } +} + static int register_save_restore_context(struct xe_sriov_vf_ccs_ctx *ctx) { int ctx_type; diff --git a/drivers/gpu/drm/xe/xe_sriov_vf_ccs.h b/drivers/gpu/drm/xe/xe_sriov_vf_ccs.h index 0745c0ff0228..f8ca6efce9ee 100644 --- a/drivers/gpu/drm/xe/xe_sriov_vf_ccs.h +++ b/drivers/gpu/drm/xe/xe_sriov_vf_ccs.h @@ -18,6 +18,7 @@ int xe_sriov_vf_ccs_init(struct xe_device *xe); int xe_sriov_vf_ccs_attach_bo(struct xe_bo *bo); int xe_sriov_vf_ccs_detach_bo(struct xe_bo *bo); int xe_sriov_vf_ccs_register_context(struct xe_device *xe); +void xe_sriov_vf_ccs_rebase(struct xe_device *xe); void xe_sriov_vf_ccs_print(struct xe_device *xe, struct drm_printer *p); static inline bool xe_sriov_vf_ccs_ready(struct xe_device *xe) -- 2.34.1