From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7A0C9CCF9E0 for ; Wed, 22 Oct 2025 07:32:53 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 341FD10E6EC; Wed, 22 Oct 2025 07:32:53 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=igalia.com header.i=@igalia.com header.b="oK1T48Tf"; dkim-atps=neutral Received: from fanzine2.igalia.com (fanzine2.igalia.com [213.97.179.56]) by gabe.freedesktop.org (Postfix) with ESMTPS id E8D4110E6E9 for ; Wed, 22 Oct 2025 07:32:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:To:From:Sender:Reply-To:Cc:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=YLEpOt5k8Sbg/TdsE05LiTGU3yeJ5acZyQvLaa2w2U4=; b=oK1T48TfGGWm7/W6h7BnEHQg0+ EGC9kE8SjXCb3detnb97hjZ20qtp1ODc2wbZIh5V5FN71GZtJisfC2SDUWTrgf+DxIJZ9PdlKXOHb ElDjnmDw2MD4FasI2933N/Jl9vo8VxMGVkH1v/gdQ5kQkyosBxzEVVi24TAlT17Fvx+rUzCXwLTVM u3Pkm/MY8WjnWqAtUcdjVgjxIB3cmNoJ8kb0jA1MiHkmsg+fOQZmDlkaSSlYgw8LYcL0PE2MxRxdW G2ejQRkqnVqmJ2Z8SIn+bxsNYBMCtq+BbOzOma8SB6dYvnGYv6kctBDqhwBDLPEjPOP9dXcvFVhN4 zptcyctg==; Received: from [90.242.12.242] (helo=localhost) by fanzine2.igalia.com with esmtpsa (Cipher TLS1.3:ECDHE_SECP256R1__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1vBTKw-00Ct0t-6x for ; Wed, 22 Oct 2025 09:32:46 +0200 From: Tvrtko Ursulin To: intel-xe@lists.freedesktop.org Subject: [CI 05/14] drm/xe/xelp: Use MI_FLUSH_DW_CCS on auxccs platforms Date: Wed, 22 Oct 2025 08:32:30 +0100 Message-ID: <20251022073241.71401-6-tvrtko.ursulin@igalia.com> X-Mailer: git-send-email 2.48.0 In-Reply-To: <20251022073241.71401-1-tvrtko.ursulin@igalia.com> References: <20251022073241.71401-1-tvrtko.ursulin@igalia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" Emit MI_FLUSH_DW_CCS when invalidating on auxccs platforms. Signed-off-by: Tvrtko Ursulin Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/xe/xe_ring_ops.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c index 87e467972070..d226d3228199 100644 --- a/drivers/gpu/drm/xe/xe_ring_ops.c +++ b/drivers/gpu/drm/xe/xe_ring_ops.c @@ -272,6 +272,8 @@ static void __emit_job_gen12_xcs(struct xe_sched_job *job, struct xe_lrc *lrc, class == XE_ENGINE_CLASS_VIDEO_DECODE || class == XE_ENGINE_CLASS_VIDEO_ENHANCE); const bool invalidate_tlb = aux_ccs || job->ring_ops_flush_tlb; + const u32 flags = aux_ccs && class == XE_ENGINE_CLASS_COPY ? + MI_FLUSH_DW_CCS : 0; u32 dw[MAX_JOB_SIZE_DW], i = 0; *head = lrc->ring.tail; @@ -281,9 +283,8 @@ static void __emit_job_gen12_xcs(struct xe_sched_job *job, struct xe_lrc *lrc, if (invalidate_tlb) { dw[i++] = preparser_disable(true); i = emit_flush_imm_ggtt(xe_lrc_start_seqno_ggtt_addr(lrc), - seqno, - MI_INVALIDATE_TLB, - dw, i); + seqno, MI_INVALIDATE_TLB | flags, dw, + i); /* hsdes: 1809175790 */ if (aux_ccs) { struct xe_reg reg; -- 2.48.0