From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 61272CCD1BC for ; Thu, 23 Oct 2025 09:09:15 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 184C710E38C; Thu, 23 Oct 2025 09:09:15 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="jRi20Aqy"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.15]) by gabe.freedesktop.org (Postfix) with ESMTPS id 03EE310E37E; Thu, 23 Oct 2025 09:09:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1761210551; x=1792746551; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=pwYszNyF2OmGU/pyhqX8Mjm/koA8DyqP7dY83BVL9wk=; b=jRi20AqytlX5ihX4AchhTRjczYtIWFaxYrVU19NLUFF98I+Xa1E1z5R3 dttzv/Tkd2Y7ohXCXZ2RMsMjWd27R9BmcVPJxZUbgu/8Py4bi48wxBUlt 9YhXR5NWwf8hRJxAw4Cn8esCTI3PKEC90J+P2q89IPkIowIs1/hg5/fzf cQ3XXMgRzJFmw/FjEdOEpV/S0KtJ/2U2BVLGMq66Tf+MugkxSxODn+8/1 ZM9otzE7ovEOe34lVSYY9cuJk2JLC9um/6nanuZDzm4SFoVD8xT1a2wyy 91qFiRFhNMWldjR+9YFx4Jr65PRhhGAfePNt99RWzrPbpM6q3kiRCMcU3 g==; X-CSE-ConnectionGUID: zoHS7ejyQUGzLH+zbfkUFQ== X-CSE-MsgGUID: JVcEi49fST2t4Datak3q7A== X-IronPort-AV: E=McAfee;i="6800,10657,11586"; a="67020674" X-IronPort-AV: E=Sophos;i="6.19,249,1754982000"; d="scan'208";a="67020674" Received: from orviesa010.jf.intel.com ([10.64.159.150]) by orvoesa107.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 23 Oct 2025 02:09:11 -0700 X-CSE-ConnectionGUID: vmsBs3lpSDOmautkNdkMWg== X-CSE-MsgGUID: D6v3eDzWTX2jSslvrTNBWg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,249,1754982000"; d="scan'208";a="183329444" Received: from srr4-3-linux-101-amanna.iind.intel.com ([10.223.74.76]) by orviesa010.jf.intel.com with ESMTP; 23 Oct 2025 02:09:09 -0700 From: Animesh Manna To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org, dri-devel@lists.freedesktop.org Cc: Animesh Manna , =?UTF-8?q?Jouni=20H=C3=B6gander?= Subject: [PATCH 7/8] drm/i915/alpm: Introduce has_alpm to decouple from pr/psr2/lobf Date: Thu, 23 Oct 2025 14:11:46 +0530 Message-Id: <20251023084147.572535-8-animesh.manna@intel.com> X-Mailer: git-send-email 2.29.0 In-Reply-To: <20251023084147.572535-1-animesh.manna@intel.com> References: <20251023084147.572535-1-animesh.manna@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" For DP2.1, ALPM is optional and there can be scenario where panel replay will be supported without ALPM. So decouple ALPM feaure by has_alpm flag from related display features. Cc: Jouni Högander Signed-off-by: Animesh Manna --- drivers/gpu/drm/i915/display/intel_alpm.c | 7 +++--- .../drm/i915/display/intel_display_types.h | 2 ++ drivers/gpu/drm/i915/display/intel_psr.c | 23 ++++++++----------- drivers/gpu/drm/i915/display/intel_psr.h | 1 - 4 files changed, 15 insertions(+), 18 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c index f7803088f916..96966d9f3231 100644 --- a/drivers/gpu/drm/i915/display/intel_alpm.c +++ b/drivers/gpu/drm/i915/display/intel_alpm.c @@ -377,6 +377,8 @@ void intel_alpm_lobf_compute_config(struct intel_dp *intel_dp, crtc_state->has_lobf = (context_latency + guardband) > (first_sdp_position + waketime_in_lines); + + crtc_state->has_alpm = crtc_state->has_lobf; } static void lnl_alpm_configure(struct intel_dp *intel_dp, @@ -386,8 +388,7 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp, enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; u32 alpm_ctl; - if (DISPLAY_VER(display) < 20 || (!intel_psr_needs_alpm(intel_dp, crtc_state) && - !crtc_state->has_lobf)) + if (!crtc_state->has_alpm) return; mutex_lock(&intel_dp->alpm.lock); @@ -511,7 +512,7 @@ void intel_alpm_enable_sink(struct intel_dp *intel_dp, { u8 val; - if (!intel_psr_needs_alpm(intel_dp, crtc_state) && !crtc_state->has_lobf) + if (!crtc_state->has_alpm) return; val = DP_ALPM_ENABLE | DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE; diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h index 5ae66b7444b6..b5eec21b8a43 100644 --- a/drivers/gpu/drm/i915/display/intel_display_types.h +++ b/drivers/gpu/drm/i915/display/intel_display_types.h @@ -1377,6 +1377,8 @@ struct intel_crtc_state { u8 silence_period_sym_clocks; u8 lfps_half_cycle_num_of_syms; } alpm_state; + + bool has_alpm; }; enum intel_pipe_crc_source { diff --git a/drivers/gpu/drm/i915/display/intel_psr.c b/drivers/gpu/drm/i915/display/intel_psr.c index cfc8b04f98fa..90d43196d35e 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.c +++ b/drivers/gpu/drm/i915/display/intel_psr.c @@ -1680,6 +1680,8 @@ static bool intel_sel_update_config_valid(struct intel_dp *intel_dp, crtc_state->enable_psr2_su_region_et = psr2_su_region_et_valid(intel_dp, crtc_state->has_panel_replay); + crtc_state->has_alpm = intel_alpm_is_possible(intel_dp); + return true; unsupported: @@ -1749,11 +1751,17 @@ _panel_replay_compute_config(struct intel_dp *intel_dp, return false; } + if (intel_alpm_is_possible(intel_dp)) + crtc_state->has_alpm = alpm_config_valid(intel_dp, crtc_state, true, true, false); + if (!intel_dp_is_edp(intel_dp)) return true; /* Remaining checks are for eDP only */ + if (!crtc_state->has_alpm) + return false; + if (to_intel_crtc(crtc_state->uapi.crtc)->pipe != PIPE_A && to_intel_crtc(crtc_state->uapi.crtc)->pipe != PIPE_B) return false; @@ -1776,9 +1784,6 @@ _panel_replay_compute_config(struct intel_dp *intel_dp, return false; } - if (!alpm_config_valid(intel_dp, crtc_state, true, true, false)) - return false; - return true; } @@ -4444,16 +4449,6 @@ void intel_psr_connector_debugfs_add(struct intel_connector *connector) connector, &i915_psr_status_fops); } -bool intel_psr_needs_alpm(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state) -{ - /* - * eDP Panel Replay uses always ALPM - * PSR2 uses ALPM but PSR1 doesn't - */ - return intel_dp_is_edp(intel_dp) && (crtc_state->has_sel_update || - crtc_state->has_panel_replay); -} - bool intel_psr_needs_alpm_aux_less(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state) { @@ -4469,7 +4464,7 @@ void intel_psr_compute_config_late(struct intel_dp *intel_dp, if (intel_psr_needs_alpm_aux_less(intel_dp, crtc_state)) wake_lines = crtc_state->alpm_state.aux_less_wake_lines; - else if (intel_psr_needs_alpm(intel_dp, crtc_state)) + else if (crtc_state->has_alpm) wake_lines = DISPLAY_VER(display) < 20 ? psr2_block_count_lines(crtc_state->alpm_state.io_wake_lines, crtc_state->alpm_state.fast_wake_lines) : diff --git a/drivers/gpu/drm/i915/display/intel_psr.h b/drivers/gpu/drm/i915/display/intel_psr.h index 620b35928832..3cb4fa20e427 100644 --- a/drivers/gpu/drm/i915/display/intel_psr.h +++ b/drivers/gpu/drm/i915/display/intel_psr.h @@ -80,7 +80,6 @@ void intel_psr_trigger_frame_change_event(struct intel_dsb *dsb, int intel_psr_min_set_context_latency(const struct intel_crtc_state *crtc_state); void intel_psr_connector_debugfs_add(struct intel_connector *connector); void intel_psr_debugfs_register(struct intel_display *display); -bool intel_psr_needs_alpm(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state); bool intel_psr_needs_alpm_aux_less(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state); void intel_psr_compute_config_late(struct intel_dp *intel_dp, -- 2.29.0