From: Matt Roper <matthew.d.roper@intel.com>
To: Nitin Gote <nitin.r.gote@intel.com>
Cc: <intel-xe@lists.freedesktop.org>, <tejas.upadhyay@intel.com>
Subject: Re: [PATCH] drm/xe/xe3: Add WA_14024681466 for Xe3_LPG
Date: Mon, 27 Oct 2025 08:35:25 -0700 [thread overview]
Message-ID: <20251027153525.GD5409@mdroper-desk1.amr.corp.intel.com> (raw)
In-Reply-To: <20251027092643.335904-1-nitin.r.gote@intel.com>
On Mon, Oct 27, 2025 at 02:56:43PM +0530, Nitin Gote wrote:
> Apply WA_14024681466 to Xe3_LPG graphics IP versions from 30.00 to 30.05.
>
> v2: (Matthew Roper)
> - Remove stepping filter as workaround applies to all steppings.
> - Add an engine class filter so it only applies to the RENDER engine.
>
> Signed-off-by: Nitin Gote <nitin.r.gote@intel.com>
Reviewed-by: Matt Roper <matthew.d.roper@intel.com>
and applied to drm-xe-next. Thanks for the patch.
Matt
> ---
> drivers/gpu/drm/xe/regs/xe_gt_regs.h | 1 +
> drivers/gpu/drm/xe/xe_wa.c | 4 ++++
> 2 files changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> index 3545e0be06da..a895a8e801a9 100644
> --- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> +++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
> @@ -174,6 +174,7 @@
>
> #define XEHP_SLICE_COMMON_ECO_CHICKEN1 XE_REG_MCR(0x731c, XE_REG_OPTION_MASKED)
> #define MSC_MSAA_REODER_BUF_BYPASS_DISABLE REG_BIT(14)
> +#define FAST_CLEAR_VALIGN_FIX REG_BIT(13)
>
> #define XE2LPM_CCCHKNREG1 XE_REG(0x82a8)
>
> diff --git a/drivers/gpu/drm/xe/xe_wa.c b/drivers/gpu/drm/xe/xe_wa.c
> index b6dcd9827354..ec638b431131 100644
> --- a/drivers/gpu/drm/xe/xe_wa.c
> +++ b/drivers/gpu/drm/xe/xe_wa.c
> @@ -916,6 +916,10 @@ static const struct xe_rtp_entry_sr lrc_was[] = {
> XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3005), ENGINE_CLASS(RENDER)),
> XE_RTP_ACTIONS(SET(COMMON_SLICE_CHICKEN4, SBE_PUSH_CONSTANT_BEHIND_FIX_ENABLE))
> },
> + { XE_RTP_NAME("14024681466"),
> + XE_RTP_RULES(GRAPHICS_VERSION_RANGE(3000, 3005), ENGINE_CLASS(RENDER)),
> + XE_RTP_ACTIONS(SET(XEHP_SLICE_COMMON_ECO_CHICKEN1, FAST_CLEAR_VALIGN_FIX))
> + },
> };
>
> static __maybe_unused const struct xe_rtp_entry oob_was[] = {
> --
> 2.25.1
>
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
next prev parent reply other threads:[~2025-10-27 15:35 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-10-27 9:26 [PATCH] drm/xe/xe3: Add WA_14024681466 for Xe3_LPG Nitin Gote
2025-10-27 9:13 ` ✓ CI.KUnit: success for drm/xe/xe3: Add WA_14024681466 for Xe3_LPG (rev2) Patchwork
2025-10-27 9:52 ` ✓ Xe.CI.BAT: " Patchwork
2025-10-27 12:25 ` ✗ Xe.CI.Full: failure " Patchwork
2025-10-27 15:35 ` Matt Roper [this message]
-- strict thread matches above, loose matches on Subject: below --
2025-10-15 7:52 [PATCH] drm/xe/xe3: Add WA_14024681466 for Xe3_LPG Nitin Gote
2025-10-21 21:26 ` Matt Roper
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