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From: Maarten Lankhorst <dev@lankhorst.se>
To: intel-xe@lists.freedesktop.org
Subject: [FOR CI 1/8] drm/xe: Bump xe_device_l2_flush even higher
Date: Thu, 30 Oct 2025 19:47:03 +0100	[thread overview]
Message-ID: <20251030184710.359870-2-dev@lankhorst.se> (raw)
In-Reply-To: <20251030184710.359870-1-dev@lankhorst.se>

It turns out for some applications 1 ms is not enough, and 2 ms is
needed.

Failing to flush causes a catastrophic display update failure,
so we should prevent it if possible.

Add an even bigger margin of 5 ms, and complain loudly if we ever exceed
it.

Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/6097
Signed-off-by: Maarten Lankhorst <dev@lankhorst.se>
---
 drivers/gpu/drm/xe/xe_device.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/xe/xe_device.c b/drivers/gpu/drm/xe/xe_device.c
index 47f5391ad8e90..8474632531727 100644
--- a/drivers/gpu/drm/xe/xe_device.c
+++ b/drivers/gpu/drm/xe/xe_device.c
@@ -1077,8 +1077,8 @@ void xe_device_l2_flush(struct xe_device *xe)
 	spin_lock(&gt->global_invl_lock);
 
 	xe_mmio_write32(&gt->mmio, XE2_GLOBAL_INVAL, 0x1);
-	if (xe_mmio_wait32(&gt->mmio, XE2_GLOBAL_INVAL, 0x1, 0x0, 1000, NULL, true))
-		xe_gt_err_once(gt, "Global invalidation timeout\n");
+	if (xe_mmio_wait32(&gt->mmio, XE2_GLOBAL_INVAL, 0x1, 0x0, 5000, NULL, true))
+		xe_gt_err(gt, "Global invalidation timeout\n");
 
 	spin_unlock(&gt->global_invl_lock);
 
-- 
2.51.0


  reply	other threads:[~2025-10-30 18:47 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-10-30 18:47 [FOR CI 0/8] Testing PREEMPT_RT with disabling irqs in the most critical section Maarten Lankhorst
2025-10-30 18:47 ` Maarten Lankhorst [this message]
2025-10-30 18:47 ` [FOR CI 2/8] drm/i915/display: Make get_vblank_counter use intel_de_read_fw() Maarten Lankhorst
2025-10-30 18:47 ` [FOR CI 3/8] drm/i915: Use preempt_disable/enable_rt() where recommended Maarten Lankhorst
2025-10-30 18:47 ` [FOR CI 4/8] drm/i915: Don't disable interrupts on PREEMPT_RT during atomic updates Maarten Lankhorst
2025-10-30 18:47 ` [FOR CI 5/8] drm/xe/display: Disable preemption in the most critical section Maarten Lankhorst
2025-10-30 18:47 ` [FOR CI 6/8] PREEMPT_RT injection Maarten Lankhorst
2025-10-30 18:47 ` [FOR CI 7/8] With disabled irqs instead Maarten Lankhorst
2025-10-31  8:40   ` [FOR CI FIXED] " Maarten Lankhorst
2025-10-30 18:47 ` [FOR CI 8/8] drm/i915/display: Use intel_de_write_fw in intel_pipe_fastset Maarten Lankhorst
2025-10-30 18:54   ` Gustavo Sousa
2025-10-30 20:00     ` Maarten Lankhorst
2025-10-30 20:25       ` Gustavo Sousa
2025-10-31 12:49         ` Rodrigo Vivi
2025-10-31 15:43           ` Jani Nikula
2025-10-31 16:46             ` Maarten Lankhorst
2025-10-30 19:14 ` ✗ CI.checkpatch: warning for Testing PREEMPT_RT with disabling irqs in the most critical section Patchwork
2025-10-30 19:15 ` ✓ CI.KUnit: success " Patchwork
2025-10-30 19:29 ` ✗ CI.checksparse: warning " Patchwork
2025-10-30 20:18 ` ✗ Xe.CI.BAT: failure " Patchwork
2025-10-31  1:59 ` ✗ Xe.CI.Full: " Patchwork
2025-10-31  9:35 ` ✗ CI.checkpatch: warning for Testing PREEMPT_RT with disabling irqs in the most critical section. (rev2) Patchwork
2025-10-31  9:36 ` ✓ CI.KUnit: success " Patchwork
2025-10-31  9:51 ` ✗ CI.checksparse: warning " Patchwork
2025-10-31 11:09 ` ✓ Xe.CI.BAT: success " Patchwork
2025-10-31 22:04 ` ✗ Xe.CI.Full: failure " Patchwork

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