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From: Gustavo Sousa <gustavo.sousa@intel.com>
To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Cc: "Ankit Nautiyal" <ankit.k.nautiyal@intel.com>,
	"Dnyaneshwar Bhadane" <dnyaneshwar.bhadane@intel.com>,
	"Gustavo Sousa" <gustavo.sousa@intel.com>,
	"Jouni Högander" <jouni.hogander@intel.com>,
	"Juha-pekka Heikkila" <juha-pekka.heikkila@intel.com>,
	"Luca Coelho" <luciano.coelho@intel.com>,
	"Lucas De Marchi" <lucas.demarchi@intel.com>,
	"Matt Atwood" <matthew.s.atwood@intel.com>,
	"Matt Roper" <matthew.d.roper@intel.com>,
	"Ravi Kumar Vodapalli" <ravi.kumar.vodapalli@intel.com>,
	"Shekhar Chauhan" <shekhar.chauhan@intel.com>,
	"Vinod Govindapillai" <vinod.govindapillai@intel.com>,
	"Suraj Kandpal" <suraj.kandpal@intel.com>
Subject: [PATCH v3 23/29] drm/i915/power: Use intel_encoder_is_tc()
Date: Mon, 03 Nov 2025 14:18:14 -0300	[thread overview]
Message-ID: <20251103-xe3p_lpd-basic-enabling-v3-23-00e87b510ae7@intel.com> (raw)
In-Reply-To: <20251103-xe3p_lpd-basic-enabling-v3-0-00e87b510ae7@intel.com>

Starting with Xe3p_LPD, when intel_phy_is_tc() returns true, it does
not necessarily mean that the port is connected to a PHY in the Type-C
subsystem.  The reason is that there is now a VBT field called
dedicated_external that will indicate that a Type-C capable port is
connected to a (most likely) combo/dedicated PHY.  When that's the case,
we must not do the extra programming required for Type-C connections.

In an upcoming change, we will modify intel_encoder_is_tc() to take the
VBT field dedicated_external into consideration.  Update
intel_display_power_well.c to use that function instead of
intel_phy_is_tc().

Note that, even though icl_aux_power_well_{enable,disable} are not part
of Xe3p_LPD's display paths, we modify them anyway for uniformity.

Cc: Shekhar Chauhan <shekhar.chauhan@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
 .../drm/i915/display/intel_display_power_well.c    | 26 +++++++++++++++-------
 1 file changed, 18 insertions(+), 8 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
index eab7019f2252..1485fc65ab87 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
@@ -258,8 +258,9 @@ aux_ch_to_digital_port(struct intel_display *display,
 	return NULL;
 }
 
-static enum phy icl_aux_pw_to_phy(struct intel_display *display,
-				  const struct i915_power_well *power_well)
+static struct intel_encoder *
+icl_aux_pw_to_encoder(struct intel_display *display,
+		      const struct i915_power_well *power_well)
 {
 	enum aux_ch aux_ch = icl_aux_pw_to_ch(power_well);
 	struct intel_digital_port *dig_port = aux_ch_to_digital_port(display, aux_ch);
@@ -271,7 +272,15 @@ static enum phy icl_aux_pw_to_phy(struct intel_display *display,
 	 * as HDMI-only and routed to a combo PHY, the encoder either won't be
 	 * present at all or it will not have an aux_ch assigned.
 	 */
-	return dig_port ? intel_encoder_to_phy(&dig_port->base) : PHY_NONE;
+	return dig_port ? &dig_port->base : NULL;
+}
+
+static enum phy icl_aux_pw_to_phy(struct intel_display *display,
+				  const struct i915_power_well *power_well)
+{
+	struct intel_encoder *encoder = icl_aux_pw_to_encoder(display, power_well);
+
+	return encoder ? intel_encoder_to_phy(encoder) : PHY_NONE;
 }
 
 static void hsw_wait_for_power_well_enable(struct intel_display *display,
@@ -570,9 +579,9 @@ static void
 icl_aux_power_well_enable(struct intel_display *display,
 			  struct i915_power_well *power_well)
 {
-	enum phy phy = icl_aux_pw_to_phy(display, power_well);
+	struct intel_encoder *encoder = icl_aux_pw_to_encoder(display, power_well);
 
-	if (intel_phy_is_tc(display, phy))
+	if (encoder && intel_encoder_is_tc(encoder))
 		return icl_tc_phy_aux_power_well_enable(display, power_well);
 	else if (display->platform.icelake)
 		return icl_combo_phy_aux_power_well_enable(display,
@@ -585,9 +594,9 @@ static void
 icl_aux_power_well_disable(struct intel_display *display,
 			   struct i915_power_well *power_well)
 {
-	enum phy phy = icl_aux_pw_to_phy(display, power_well);
+	struct intel_encoder *encoder = icl_aux_pw_to_encoder(display, power_well);
 
-	if (intel_phy_is_tc(display, phy))
+	if (encoder && intel_encoder_is_tc(encoder))
 		return hsw_power_well_disable(display, power_well);
 	else if (display->platform.icelake)
 		return icl_combo_phy_aux_power_well_disable(display,
@@ -1849,10 +1858,11 @@ tgl_tc_cold_off_power_well_is_enabled(struct intel_display *display,
 static void xelpdp_aux_power_well_enable(struct intel_display *display,
 					 struct i915_power_well *power_well)
 {
+	struct intel_encoder *encoder = icl_aux_pw_to_encoder(display, power_well);
 	enum aux_ch aux_ch = i915_power_well_instance(power_well)->xelpdp.aux_ch;
 	enum phy phy = icl_aux_pw_to_phy(display, power_well);
 
-	if (intel_phy_is_tc(display, phy))
+	if (encoder && intel_encoder_is_tc(encoder))
 		icl_tc_port_assert_ref_held(display, power_well,
 					    aux_ch_to_digital_port(display, aux_ch));
 

-- 
2.51.0


  parent reply	other threads:[~2025-11-03 17:21 UTC|newest]

Thread overview: 58+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-11-03 17:17 [PATCH v3 00/29] drm/i915/display: Add initial support for Xe3p_LPD Gustavo Sousa
2025-11-03 17:17 ` [PATCH v3 01/29] drm/i915/xe3p_lpd: Add Xe3p_LPD display IP features Gustavo Sousa
2025-11-03 17:17 ` [PATCH v3 02/29] drm/i915/xe3p_lpd: Drop north display reset option programming Gustavo Sousa
2025-11-03 17:17 ` [PATCH v3 03/29] drm/i915/display: Use braces for if-ladder in intel_bw_init_hw() Gustavo Sousa
2025-11-03 17:17 ` [PATCH v3 04/29] drm/i915/xe3p_lpd: Update bandwidth parameters Gustavo Sousa
2025-11-03 17:17 ` [PATCH v3 05/29] drm/i915/xe3p_lpd: Expand bifield masks dbuf blocks fields Gustavo Sousa
2025-11-03 17:17 ` [PATCH v3 06/29] drm/i915/xe3p_lpd: Horizontal flip support for linear surfaces Gustavo Sousa
2025-11-03 17:17 ` [PATCH v3 07/29] drm/i915/xe3p_lpd: Remove gamma,csc bottom color checks Gustavo Sousa
2025-11-03 17:17 ` [PATCH v3 08/29] drm/i915/xe3p_lpd: Add CDCLK table Gustavo Sousa
2025-11-03 17:18 ` [PATCH v3 09/29] drm/i915/xe3p_lpd: Load DMC firmware Gustavo Sousa
2025-11-03 17:18 ` [PATCH v3 10/29] drm/i915/xe3p_lpd: Drop support for interlace mode Gustavo Sousa
2025-11-03 17:18 ` [PATCH v3 11/29] drm/i915/xe3p_lpd: Extend Wa_16025573575 Gustavo Sousa
2025-11-03 17:18 ` [PATCH v3 12/29] drm/i915/xe3p_lpd: Don't allow odd ypan or ysize with semiplanar format Gustavo Sousa
2025-11-03 17:18 ` [PATCH v3 13/29] drm/i915/xe3p_lpd: Reload DMC MMIO for pipes C and D Gustavo Sousa
2025-11-03 17:18 ` [PATCH v3 14/29] drm/i915/wm: don't use method1 in Xe3p_LPD onwards Gustavo Sousa
2025-11-03 17:18 ` [PATCH v3 15/29] drm/i915/dram: Add field ecc_impacting_de_bw Gustavo Sousa
2025-11-03 17:36   ` Matt Roper
2025-11-03 17:18 ` [PATCH v3 16/29] drm/i915/xe3p_lpd: Underrun debuggability and error codes/hints Gustavo Sousa
2025-11-03 21:51   ` Matt Roper
2025-11-05 14:42     ` Gustavo Sousa
2025-11-05 14:54       ` Gustavo Sousa
2025-11-03 17:18 ` [PATCH v3 17/29] drm/i915/xe3p_lpd: Log FBC-related debug info for PIPE underrun Gustavo Sousa
2025-11-03 22:30   ` Matt Roper
2025-11-06 15:55     ` Gustavo Sousa
2025-11-03 17:18 ` [PATCH v3 18/29] drm/i915/xe3p_lpd: Adapt to updates on MBUS_CTL/DBUF_CTL registers Gustavo Sousa
2025-11-03 17:47   ` Matt Roper
2025-11-03 17:18 ` [PATCH v3 19/29] drm/i915/wm: Do not make latency values monotonic on Xe3 onward Gustavo Sousa
2025-11-03 22:48   ` Matt Roper
2025-11-07 23:53     ` Gustavo Sousa
2025-11-03 17:18 ` [PATCH v3 20/29] drm/i915/xe3p_lpd: Always apply WaWmMemoryReadLatency Gustavo Sousa
2025-11-03 18:18   ` Matt Roper
2025-11-03 17:18 ` [PATCH v3 21/29] drm/i915/xe3p_lpd: Enable system caching for FBC Gustavo Sousa
2025-11-04  0:15   ` Matt Roper
2025-11-04 16:16     ` Gustavo Sousa
2025-11-04 16:28       ` Gustavo Sousa
2025-11-04 17:02         ` Govindapillai, Vinod
2025-11-04 16:35     ` Govindapillai, Vinod
2025-11-04 16:58       ` Gustavo Sousa
2025-11-07 23:22       ` Gustavo Sousa
2025-11-10  8:16         ` Govindapillai, Vinod
2025-11-03 17:18 ` [PATCH v3 22/29] drm/i915/vbt: Add fields dedicated_external and dyn_port_over_tc Gustavo Sousa
2025-11-03 17:18 ` Gustavo Sousa [this message]
2025-11-03 17:18 ` [PATCH v3 24/29] drm/i915/display: Handle dedicated external ports in intel_encoder_is_tc() Gustavo Sousa
2025-11-03 17:18 ` [PATCH v3 25/29] drm/i915/xe3p_lpd: Extend Type-C flow for static DDI allocation Gustavo Sousa
2025-11-03 17:18 ` [PATCH v3 26/29] drm/i915/nvls: Add NVL-S display support Gustavo Sousa
2025-11-03 17:18 ` [PATCH v3 27/29] drm/i915/display: Use platform check in HAS_LT_PHY() Gustavo Sousa
2025-11-03 17:42   ` Bhadane, Dnyaneshwar
2025-11-03 17:42   ` Matt Roper
2025-11-03 17:44     ` Gustavo Sousa
2025-11-03 17:18 ` [PATCH v3 28/29] drm/i915/display: Move HAS_LT_PHY() to intel_display_device.h Gustavo Sousa
2025-11-03 17:39   ` Matt Roper
2025-11-03 17:18 ` [PATCH v3 29/29] drm/i915/display: Use HAS_LT_PHY() for LT PHY AUX power Gustavo Sousa
2025-11-03 17:40   ` Matt Roper
2025-11-03 18:36 ` ✗ CI.checkpatch: warning for drm/i915/display: Add initial support for Xe3p_LPD (rev3) Patchwork
2025-11-03 18:37 ` ✓ CI.KUnit: success " Patchwork
2025-11-03 18:53 ` ✗ CI.checksparse: warning " Patchwork
2025-11-04  9:10 ` ✗ Xe.CI.Full: failure " Patchwork
2025-11-07  1:02 ` [PATCH v3 00/29] drm/i915/display: Add initial support for Xe3p_LPD Gustavo Sousa

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