From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 187A9CCF9E3 for ; Tue, 4 Nov 2025 19:56:26 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id BAE0310E66B; Tue, 4 Nov 2025 19:56:25 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="lhamYnhb"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.11]) by gabe.freedesktop.org (Postfix) with ESMTPS id 8888410E665 for ; Tue, 4 Nov 2025 19:56:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1762286182; x=1793822182; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=RMZ6BBZY4kugTuSd9BKcYSYPSf+CjrVZlkIpNjggXco=; b=lhamYnhb2HUTT5eetlVw1iYoQvIlp198bi6OraqMGg6VYKWvdK5rofwv 5221eLyI0SQMjUN3YTJzQvztMlPDkxutCClKrN5KGY/y03G0SRJSq1Dk8 PADoa4LGwxJu0f7dwhjuqjlSinRUbN+oeMqVc+H/CTxja/w/EipQ96Y8f BdVYzjmNsScxo/q/f3AU4sHwf/nYYm2JlJv8WirX1WXGvGxLsssTQwpBF qUXikg+e6XodPz0FNjsE1pFqPhv7QMvTfeAQ0KPNbUjcGLoeAbr6zxQot eejGZuLaRO6b5S3X6SlBK54o/BpT3GmG75KRyfwf126g7xdDwmB+DpqQY g==; X-CSE-ConnectionGUID: 9roeXV1iR0ywIog8GVMS2A== X-CSE-MsgGUID: xLIkAnJ3RB2p8MboO6HNnA== X-IronPort-AV: E=McAfee;i="6800,10657,11603"; a="74686112" X-IronPort-AV: E=Sophos;i="6.19,279,1754982000"; d="scan'208";a="74686112" Received: from fmviesa001.fm.intel.com ([10.60.135.141]) by orvoesa103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Nov 2025 11:56:22 -0800 X-CSE-ConnectionGUID: VvpVC9WXS3OlJTZtVE0+xA== X-CSE-MsgGUID: 61aiy9cOR8+YZSABucUF6Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,279,1754982000"; d="scan'208";a="218051143" Received: from lstrano-desk.jf.intel.com ([10.54.39.91]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Nov 2025 11:56:22 -0800 From: Matthew Brost To: intel-xe@lists.freedesktop.org Cc: stuart.summers@intel.com, lucas.demarchi@intel.com, matthew.d.roper@intel.com Subject: [PATCH v2 07/12] drm/xe: Rename send_tlb_inval_ppgtt to send_tlb_inval_asid_ppgtt Date: Tue, 4 Nov 2025 11:56:11 -0800 Message-Id: <20251104195616.3339137-8-matthew.brost@intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20251104195616.3339137-1-matthew.brost@intel.com> References: <20251104195616.3339137-1-matthew.brost@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" Context-based TLB invalidations have their own set of GuC TLB invalidation operations. Rename the current PPGTT invalidation function, which operates on ASIDs, to a more descriptive name that reflects its purpose. Signed-off-by: Matthew Brost --- drivers/gpu/drm/xe/xe_guc_tlb_inval.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_guc_tlb_inval.c b/drivers/gpu/drm/xe/xe_guc_tlb_inval.c index 995789f0d31f..42e9fbd062ba 100644 --- a/drivers/gpu/drm/xe/xe_guc_tlb_inval.c +++ b/drivers/gpu/drm/xe/xe_guc_tlb_inval.c @@ -131,8 +131,8 @@ static u64 normalize_invalidation_range(struct xe_gt *gt, u64 *start, u64 *end) */ #define MAX_RANGE_TLB_INVALIDATION_LENGTH (rounddown_pow_of_two(ULONG_MAX)) -static int send_tlb_inval_ppgtt(struct xe_tlb_inval *tlb_inval, u32 seqno, - u64 start, u64 end, u32 asid) +static int send_tlb_inval_asid_ppgtt(struct xe_tlb_inval *tlb_inval, u32 seqno, + u64 start, u64 end, u32 asid) { #define MAX_TLB_INVALIDATION_LEN 7 struct xe_guc *guc = tlb_inval->private; @@ -195,7 +195,7 @@ static long tlb_inval_timeout_delay(struct xe_tlb_inval *tlb_inval) static const struct xe_tlb_inval_ops guc_tlb_inval_ops = { .all = send_tlb_inval_all, .ggtt = send_tlb_inval_ggtt, - .ppgtt = send_tlb_inval_ppgtt, + .ppgtt = send_tlb_inval_asid_ppgtt, .initialized = tlb_inval_initialized, .flush = tlb_inval_flush, .timeout_delay = tlb_inval_timeout_delay, -- 2.34.1