From: Gustavo Sousa <gustavo.sousa@intel.com>
To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org
Cc: "Ankit Nautiyal" <ankit.k.nautiyal@intel.com>,
"Dnyaneshwar Bhadane" <dnyaneshwar.bhadane@intel.com>,
"Gustavo Sousa" <gustavo.sousa@intel.com>,
"Jouni Högander" <jouni.hogander@intel.com>,
"Juha-pekka Heikkila" <juha-pekka.heikkila@intel.com>,
"Luca Coelho" <luciano.coelho@intel.com>,
"Lucas De Marchi" <lucas.demarchi@intel.com>,
"Matt Atwood" <matthew.s.atwood@intel.com>,
"Matt Roper" <matthew.d.roper@intel.com>,
"Ravi Kumar Vodapalli" <ravi.kumar.vodapalli@intel.com>,
"Shekhar Chauhan" <shekhar.chauhan@intel.com>,
"Vinod Govindapillai" <vinod.govindapillai@intel.com>,
"Ville Syrjälä" <ville.syrjala@linux.intel.com>
Subject: [PATCH v4 01/11] drm/i915/wm: Do not make latency values monotonic on Xe3 onward
Date: Fri, 07 Nov 2025 21:05:34 -0300 [thread overview]
Message-ID: <20251107-xe3p_lpd-basic-enabling-v4-1-ab3367f65f15@intel.com> (raw)
In-Reply-To: <20251107-xe3p_lpd-basic-enabling-v4-0-ab3367f65f15@intel.com>
The Windows driver is rejecting non-monotonic ranges latency values for
Xe3. Let's make sure that we do not call make_wm_latency_monotonic()
for Xe3 and beyond.
Also, because of that, let's add a check at the end of
adjust_wm_latency() to ensure we raise a warning if the final list of
latency values is not monotonic.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>
---
drivers/gpu/drm/i915/display/skl_watermark.c | 17 ++++++++++++++++-
1 file changed, 16 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/skl_watermark.c b/drivers/gpu/drm/i915/display/skl_watermark.c
index 36a266f882d1..ed55fe84e930 100644
--- a/drivers/gpu/drm/i915/display/skl_watermark.c
+++ b/drivers/gpu/drm/i915/display/skl_watermark.c
@@ -3218,6 +3218,18 @@ static void make_wm_latency_monotonic(struct intel_display *display)
}
}
+static bool is_wm_latency_monotonic(struct intel_display *display)
+{
+ u16 *wm = display->wm.skl_latency;
+ int level, num_levels = display->wm.num_levels;
+
+ for (level = 1; level < num_levels; level++)
+ if (wm[level] < wm[level - 1])
+ return false;
+
+ return true;
+}
+
static void
adjust_wm_latency(struct intel_display *display)
{
@@ -3228,7 +3240,8 @@ adjust_wm_latency(struct intel_display *display)
sanitize_wm_latency(display);
- make_wm_latency_monotonic(display);
+ if (DISPLAY_VER(display) < 30)
+ make_wm_latency_monotonic(display);
/*
* WaWmMemoryReadLatency
@@ -3248,6 +3261,8 @@ adjust_wm_latency(struct intel_display *display)
*/
if (need_16gb_dimm_wa(display))
increase_wm_latency(display, 1);
+
+ drm_WARN_ON(display->drm, !is_wm_latency_monotonic(display));
}
static void mtl_read_wm_latency(struct intel_display *display)
--
2.51.0
next prev parent reply other threads:[~2025-11-08 0:06 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-08 0:05 [PATCH v4 00/11] drm/i915/display: Add initial support for Xe3p_LPD Gustavo Sousa
2025-11-08 0:05 ` Gustavo Sousa [this message]
2025-11-12 3:46 ` [PATCH v4 01/11] drm/i915/wm: Do not make latency values monotonic on Xe3 onward Kandpal, Suraj
2025-11-12 12:45 ` Gustavo Sousa
2025-11-08 0:05 ` [PATCH v4 02/11] drm/i915/vbt: Add fields dedicated_external and dyn_port_over_tc Gustavo Sousa
2025-11-11 16:02 ` Imre Deak
2025-11-11 16:15 ` Imre Deak
2025-11-12 13:00 ` Gustavo Sousa
2025-11-12 13:20 ` Imre Deak
2025-11-13 22:01 ` Gustavo Sousa
2025-11-08 0:05 ` [PATCH v4 03/11] drm/i915/power: Use intel_encoder_is_tc() Gustavo Sousa
2025-11-12 16:19 ` Imre Deak
2025-11-13 22:01 ` Gustavo Sousa
2025-11-08 0:05 ` [PATCH v4 04/11] drm/i915/display: Handle dedicated external ports in intel_encoder_is_tc() Gustavo Sousa
2025-11-12 16:24 ` Imre Deak
2025-11-13 22:02 ` Gustavo Sousa
2025-11-08 0:05 ` [PATCH v4 05/11] drm/i915/fbc: Add intel_fbc_id_for_pipe() Gustavo Sousa
2025-11-10 16:35 ` Matt Roper
2025-11-10 17:03 ` Ville Syrjälä
2025-11-10 22:18 ` Gustavo Sousa
2025-11-08 0:05 ` [PATCH v4 06/11] drm/i915/xe3p_lpd: Handle underrun debug bits Gustavo Sousa
2025-11-10 11:45 ` Jani Nikula
2025-11-11 0:23 ` Gustavo Sousa
2025-11-11 10:22 ` Jani Nikula
2025-11-11 12:22 ` Gustavo Sousa
2025-11-10 17:03 ` Ville Syrjälä
2025-11-10 23:42 ` Gustavo Sousa
2025-11-08 0:05 ` [PATCH v4 07/11] drm/i915/xe3p_lpd: Extend Type-C flow for static DDI allocation Gustavo Sousa
2025-11-12 17:53 ` Imre Deak
2025-11-14 19:46 ` Gustavo Sousa
2025-11-15 0:40 ` Imre Deak
2025-11-15 1:22 ` Imre Deak
2025-11-17 15:02 ` Gustavo Sousa
2025-11-17 15:17 ` Imre Deak
2025-11-17 17:23 ` Gustavo Sousa
2025-11-17 17:58 ` Imre Deak
2025-11-17 15:33 ` Gustavo Sousa
2025-11-17 16:01 ` Imre Deak
2025-11-08 0:05 ` [PATCH v4 08/11] drm/i915/nvls: Add NVL-S display support Gustavo Sousa
2025-11-08 0:05 ` [PATCH v4 09/11] drm/i915/display: Use platform check in HAS_LT_PHY() Gustavo Sousa
2025-11-08 0:05 ` [PATCH v4 10/11] drm/i915/display: Move HAS_LT_PHY() to intel_display_device.h Gustavo Sousa
2025-11-08 0:05 ` [PATCH v4 11/11] drm/i915/display: Use HAS_LT_PHY() for LT PHY AUX power Gustavo Sousa
2025-11-08 0:15 ` [PATCH v4 00/11] drm/i915/display: Add initial support for Xe3p_LPD Gustavo Sousa
2025-11-08 1:52 ` ✗ CI.checkpatch: warning for drm/i915/display: Add initial support for Xe3p_LPD (rev4) Patchwork
2025-11-08 1:54 ` ✓ CI.KUnit: success " Patchwork
2025-11-08 2:09 ` ✗ CI.checksparse: warning " Patchwork
2025-11-08 2:31 ` ✗ Xe.CI.BAT: failure " Patchwork
2025-11-09 8:10 ` ✗ Xe.CI.Full: " Patchwork
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