From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 672E4CEACDA for ; Fri, 14 Nov 2025 20:53:42 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 29BDA10EB3F; Fri, 14 Nov 2025 20:53:42 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="MrJx7VXg"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.13]) by gabe.freedesktop.org (Postfix) with ESMTPS id 45CD910EB29; Fri, 14 Nov 2025 20:53:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1763153620; x=1794689620; h=from:date:subject:mime-version:content-transfer-encoding: message-id:references:in-reply-to:to:cc; bh=wVJSv8jsEfgpkqpfeSf5ibjSJE3sMpio/tjEmLrOLSk=; b=MrJx7VXgrogGHUFdpHwm7plPVF9zatbyX6v6pVDh4lO24TRM4w6pkcT2 2m30EpAFCJWMg9rrhx6BMg/cyDZ/I04cSprEDI9h5T7yUNFKzV38ytIvH sOsni0E4KJ10/f9ICeKWTw+5hs5WptTl/HpxQbt3iPqhtnfIZMLch4dMu gbEkFgt/qLTk7xbGn2zJRcsJa2S7LgDlDQmlPwAfVlNqziIafAQUwOVHz UlZK7f/tlrxqzEgPd++o7QUITMgnGNzZ21W9QKM6vbIHKE3luL3SRcRWo dyR2/R0551eiaIb9qvH/4AWfgk0kK1YYbwnVbZLkTq0o60rtY8Kd3jw5c w==; X-CSE-ConnectionGUID: nwsu7TWVRDesvqed6e5ocw== X-CSE-MsgGUID: m1FIg0gjSeC/qVJw8l75dg== X-IronPort-AV: E=McAfee;i="6800,10657,11613"; a="67859902" X-IronPort-AV: E=Sophos;i="6.19,305,1754982000"; d="scan'208";a="67859902" Received: from orviesa001.jf.intel.com ([10.64.159.141]) by fmvoesa107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Nov 2025 12:53:40 -0800 X-CSE-ConnectionGUID: H8sHLhViRvW4rksnhabJnQ== X-CSE-MsgGUID: S5zYjqj4T3SvzsFccqOxIA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,305,1754982000"; d="scan'208";a="227214226" Received: from dnelso2-mobl.amr.corp.intel.com (HELO [192.168.1.16]) ([10.124.220.50]) by smtpauth.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Nov 2025 12:53:36 -0800 From: Gustavo Sousa Date: Fri, 14 Nov 2025 17:52:13 -0300 Subject: [PATCH v5 6/8] drm/i915/display: Use platform check in HAS_LT_PHY() MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: 7bit Message-Id: <20251114-xe3p_lpd-basic-enabling-v5-6-c183388367f4@intel.com> References: <20251114-xe3p_lpd-basic-enabling-v5-0-c183388367f4@intel.com> In-Reply-To: <20251114-xe3p_lpd-basic-enabling-v5-0-c183388367f4@intel.com> To: intel-xe@lists.freedesktop.org, intel-gfx@lists.freedesktop.org Cc: Ankit Nautiyal , Dnyaneshwar Bhadane , Gustavo Sousa , =?utf-8?q?Jouni_H=C3=B6gander?= , Juha-pekka Heikkila , Luca Coelho , Lucas De Marchi , Matt Atwood , Matt Roper , Ravi Kumar Vodapalli , Shekhar Chauhan , Vinod Govindapillai , Suraj Kandpal X-Mailer: b4 0.15-dev X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" NVL uses the Lake Tahoe PHY for display output and the driver recently added the macro HAS_LT_PHY() to allow selecting code paths specific for that type of PHY. While NVL uses Xe3p_LPD as display IP, the type of PHY is actually defined at the SoC level, so use a platform check instead of display version. Bspec: 74199 Cc: Suraj Kandpal Cc: Matt Roper Reviewed-by: Matt Roper Reviewed-by: Dnyaneshwar Bhadane Signed-off-by: Gustavo Sousa --- drivers/gpu/drm/i915/display/intel_lt_phy.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/display/intel_lt_phy.h b/drivers/gpu/drm/i915/display/intel_lt_phy.h index b7911acd7dcd..0820968e51b5 100644 --- a/drivers/gpu/drm/i915/display/intel_lt_phy.h +++ b/drivers/gpu/drm/i915/display/intel_lt_phy.h @@ -42,6 +42,6 @@ void intel_xe3plpd_pll_enable(struct intel_encoder *encoder, const struct intel_crtc_state *crtc_state); void intel_xe3plpd_pll_disable(struct intel_encoder *encoder); -#define HAS_LT_PHY(display) (DISPLAY_VER(display) >= 35) +#define HAS_LT_PHY(display) ((display)->platform.novalake) #endif /* __INTEL_LT_PHY_H__ */ -- 2.51.0