From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 38D77CE8D6B for ; Mon, 17 Nov 2025 05:44:40 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id EBFB310E2C4; Mon, 17 Nov 2025 05:44:39 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="Sf6yrKok"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.15]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6FE2010E2C5; Mon, 17 Nov 2025 05:44:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1763358278; x=1794894278; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=1fnd9wylmlb4DM6BrZIfa9B3OjBFiIrneohqhPv8Ncc=; b=Sf6yrKokvj4axDPkAQMjBZO6hO/fqe9ByN2N0wDO8aYTHlOAyd28TIAJ BMApk7Q9c+h+3Q0cdj+52wMTmtRlQ/pENkZnGxeBQjiWhzrBBZKa3bykK Q8FDudg8DODOEef6+Mc+5/q+avEpv437rWVpe37oFxspqHVMSlw92O9dM x16bTktldnGDyZPnNZNPExsEWuD00s2AnB+VdO7bxxx3RVD7kIg2WJZqA bKOSNo1/TcBt6wVLJVF68pR32Ci+h1kAwC8xM/r2lN4K4rtdCgqmTwTXD 4rV7otUZ8qe3YqzjMfVoB8MRDXVRvDkMx/BZBgltYrHSG6YqtJCFZSueW A==; X-CSE-ConnectionGUID: dU544twHQ1WlKW3KyAw0Tw== X-CSE-MsgGUID: NBGGsvK8SiOGn6pPnCPwPw== X-IronPort-AV: E=McAfee;i="6800,10657,11615"; a="65446008" X-IronPort-AV: E=Sophos;i="6.19,311,1754982000"; d="scan'208";a="65446008" Received: from fmviesa007.fm.intel.com ([10.60.135.147]) by fmvoesa109.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Nov 2025 21:44:38 -0800 X-CSE-ConnectionGUID: CzyVKY1DQ/+XJ3daMd+1TA== X-CSE-MsgGUID: 0xY3Bf5nRqSBrqhVdeo06w== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.19,311,1754982000"; d="scan'208";a="190016308" Received: from mgolanimitul-x299-ud4-pro.iind.intel.com ([10.190.239.114]) by fmviesa007.fm.intel.com with ESMTP; 16 Nov 2025 21:44:36 -0800 From: Mitul Golani To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, mitulkumar.ajitkumar.golani@intel.com, ankit.k.nautiyal@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH v8 04/18] drm/i915/vrr: Add functions to read out vmin/vmax stuff Date: Mon, 17 Nov 2025 11:14:28 +0530 Message-ID: <20251117054442.4047665-5-mitulkumar.ajitkumar.golani@intel.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20251117054442.4047665-1-mitulkumar.ajitkumar.golani@intel.com> References: <20251117054442.4047665-1-mitulkumar.ajitkumar.golani@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" From: Ville Syrjälä Calculate delayed vblank start position with the help of added vmin/vmax stuff for next frame and final computation. --v2: - Correct Author details. --v3: - Separate register details from this patch. --v4: - Add mask macros. --v5: - As live prefix params indicate timings for current frame, read just _live prefix values instead of next frame timings as done previously. - Squash Refactor vrr params patch. Signed-off-by: Ville Syrjälä Signed-off-by: Mitul Golani Reviewed-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_vrr.c | 56 ++++++++++++++++++++++++ drivers/gpu/drm/i915/display/intel_vrr.h | 5 +++ 2 files changed, 61 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index b92c42fde937..7f0ead192777 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -261,6 +261,12 @@ static int intel_vrr_hw_value(const struct intel_crtc_state *crtc_state, return value - crtc_state->set_context_latency; } +static int intel_vrr_vblank_start(const struct intel_crtc_state *crtc_state, + int vmin_vmax) +{ + return intel_vrr_hw_value(crtc_state, vmin_vmax) - crtc_state->vrr.guardband; +} + /* * For fixed refresh rate mode Vmin, Vmax and Flipline all are set to * Vtotal value. @@ -898,3 +904,53 @@ int intel_vrr_vmin_safe_window_end(const struct intel_crtc_state *crtc_state) return intel_vrr_vmin_vblank_start(crtc_state) - crtc_state->set_context_latency; } + +int intel_vrr_dcb_vmin_vblank_start_next(const struct intel_crtc_state *crtc_state) +{ + struct intel_display *display = to_intel_display(crtc_state); + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; + u32 tmp = 0; + + tmp = intel_de_read(display, TRANS_VRR_DCB_ADJ_FLIPLINE_CFG_LIVE(cpu_transcoder)); + + if (REG_FIELD_GET(VRR_DCB_ADJ_FLIPLINE_CNT_MASK, tmp) == 0) + return -1; + + return intel_vrr_vblank_start(crtc_state, VRR_DCB_ADJ_FLIPLINE(tmp) + 1); +} + +int intel_vrr_dcb_vmax_vblank_start_next(const struct intel_crtc_state *crtc_state) +{ + struct intel_display *display = to_intel_display(crtc_state); + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; + u32 tmp = 0; + + tmp = intel_de_read(display, TRANS_VRR_DCB_ADJ_VMAX_CFG_LIVE(cpu_transcoder)); + + if (REG_FIELD_GET(VRR_DCB_ADJ_VMAX_CNT_MASK, tmp) == 0) + return -1; + + return intel_vrr_vblank_start(crtc_state, VRR_DCB_ADJ_VMAX(tmp) + 1); +} + +int intel_vrr_dcb_vmin_vblank_start_final(const struct intel_crtc_state *crtc_state) +{ + struct intel_display *display = to_intel_display(crtc_state); + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; + u32 tmp = 0; + + tmp = intel_de_read(display, TRANS_VRR_DCB_FLIPLINE_LIVE(cpu_transcoder)); + + return intel_vrr_vblank_start(crtc_state, VRR_DCB_FLIPLINE(tmp) + 1); +} + +int intel_vrr_dcb_vmax_vblank_start_final(const struct intel_crtc_state *crtc_state) +{ + struct intel_display *display = to_intel_display(crtc_state); + enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; + u32 tmp = 0; + + tmp = intel_de_read(display, TRANS_VRR_DCB_VMAX_LIVE(cpu_transcoder)); + + return intel_vrr_vblank_start(crtc_state, VRR_DCB_VMAX(tmp) + 1); +} diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h index bc9044621635..66fb9ad846f2 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.h +++ b/drivers/gpu/drm/i915/display/intel_vrr.h @@ -43,4 +43,9 @@ bool intel_vrr_always_use_vrr_tg(struct intel_display *display); int intel_vrr_safe_window_start(const struct intel_crtc_state *crtc_state); int intel_vrr_vmin_safe_window_end(const struct intel_crtc_state *crtc_state); +int intel_vrr_dcb_vmin_vblank_start_next(const struct intel_crtc_state *crtc_state); +int intel_vrr_dcb_vmax_vblank_start_next(const struct intel_crtc_state *crtc_state); +int intel_vrr_dcb_vmin_vblank_start_final(const struct intel_crtc_state *crtc_state); +int intel_vrr_dcb_vmax_vblank_start_final(const struct intel_crtc_state *crtc_state); + #endif /* __INTEL_VRR_H__ */ -- 2.48.1