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* [PATCH] drm/i915/display: Stop touching vga on post enable
@ 2025-11-19 20:04 Lucas De Marchi
  2025-11-19 23:36 ` ✓ CI.KUnit: success for " Patchwork
                   ` (3 more replies)
  0 siblings, 4 replies; 6+ messages in thread
From: Lucas De Marchi @ 2025-11-19 20:04 UTC (permalink / raw)
  To: intel-xe, intel-gfx; +Cc: Lucas De Marchi

Touching VGA_MIS_W goes back to commit f9dcb0dfee98 ("drm/i915: touch
VGA MSR after we enable the power well"). That case doesn't seem to be
reproduced anymore, even considering that the unclaimed accesses are now
printed with debug log level. Also note that the original issue was
reproduced with vgacon, but that is not used anymore on x86 when booted
with EFI.

Signed-off-by: Lucas De Marchi <lucas.demarchi@intel.com>
---
WIP to drop the VGA accesses and allow xe driver to be used with
non-x86 platforms. There are multiple patches floating around, some
disabling code for non-x86, some disabling for !CONFIG_VGA_CONSOLE.

For this v1, I think the entire workaround can be removed. Sending it
for CI while I look into the other cases.

Get some initial tests running to see if it breaks the world before
ICL, particularly before gen7 where unclaimed accesses for non-display-engine
registers worked, systems booted without EFI, etc. If this is not an
issue anymore, a patch completely dropping the has_vga could follow
since this is the only user.
---
 .../gpu/drm/i915/display/intel_display_power_well.c   |  3 ---
 drivers/gpu/drm/i915/display/intel_vga.c              | 19 -------------------
 2 files changed, 22 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display_power_well.c b/drivers/gpu/drm/i915/display/intel_display_power_well.c
index f4f7e73acc874..01213f7d1c9ef 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power_well.c
+++ b/drivers/gpu/drm/i915/display/intel_display_power_well.c
@@ -205,9 +205,6 @@ int intel_power_well_refcount(struct i915_power_well *power_well)
 static void hsw_power_well_post_enable(struct intel_display *display,
 				       u8 irq_pipe_mask, bool has_vga)
 {
-	if (has_vga)
-		intel_vga_reset_io_mem(display);
-
 	if (irq_pipe_mask)
 		gen8_irq_power_well_post_enable(display, irq_pipe_mask);
 }
diff --git a/drivers/gpu/drm/i915/display/intel_vga.c b/drivers/gpu/drm/i915/display/intel_vga.c
index 6e125564db34c..97d4c06c2e2fd 100644
--- a/drivers/gpu/drm/i915/display/intel_vga.c
+++ b/drivers/gpu/drm/i915/display/intel_vga.c
@@ -76,25 +76,6 @@ void intel_vga_disable(struct intel_display *display)
 	intel_de_posting_read(display, vga_reg);
 }
 
-void intel_vga_reset_io_mem(struct intel_display *display)
-{
-	struct pci_dev *pdev = to_pci_dev(display->drm->dev);
-
-	/*
-	 * After we re-enable the power well, if we touch VGA register 0x3d5
-	 * we'll get unclaimed register interrupts. This stops after we write
-	 * anything to the VGA MSR register. The vgacon module uses this
-	 * register all the time, so if we unbind our driver and, as a
-	 * consequence, bind vgacon, we'll get stuck in an infinite loop at
-	 * console_unlock(). So make here we touch the VGA MSR register, making
-	 * sure vgacon can keep working normally without triggering interrupts
-	 * and error messages.
-	 */
-	vga_get_uninterruptible(pdev, VGA_RSRC_LEGACY_IO);
-	outb(inb(VGA_MIS_R), VGA_MIS_W);
-	vga_put(pdev, VGA_RSRC_LEGACY_IO);
-}
-
 int intel_vga_register(struct intel_display *display)
 {
 




^ permalink raw reply related	[flat|nested] 6+ messages in thread
end of thread, other threads:[~2025-11-20  6:02 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2025-11-19 20:04 [PATCH] drm/i915/display: Stop touching vga on post enable Lucas De Marchi
2025-11-19 23:36 ` ✓ CI.KUnit: success for " Patchwork
2025-11-20  0:41 ` [PATCH] " Ville Syrjälä
2025-11-20  4:28   ` Lucas De Marchi
2025-11-20  0:43 ` ✓ Xe.CI.BAT: success for " Patchwork
2025-11-20  6:02 ` ✓ Xe.CI.Full: " Patchwork

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