From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 81EA7D116F3 for ; Thu, 27 Nov 2025 09:16:14 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 4349710E7C4; Thu, 27 Nov 2025 09:16:14 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="HQHWeyO4"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [192.198.163.10]) by gabe.freedesktop.org (Postfix) with ESMTPS id EE03F10E7BF; Thu, 27 Nov 2025 09:16:10 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1764234970; x=1795770970; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=potS8n9pmS2acvuS6N97gfPD0jgcrXv6evASbp4l54M=; b=HQHWeyO4ESD9CjIStIaksebKl239hX6kgSyxNIUwK1vrQQ1R6Dzzu7s0 voQz3964e/V5FtzmzOyjVTES5ZEh5Ot9fuu5qZEg1o/zkErFKaM803RVF RjQ7PXIOVl/kdHGdDBnyY9pUtLMqMdHXqAsF8X/TZM/dv78oYUEcQWBDb d/fqMIRuVNoiqgUzYqcLVqXkSLq7GYDEdXOWn5NHgcFBVIZ8TCk3OP6dk a86bGP/kPAYt04U4tTouJvpbfwlyh6pfUkJMKO4eGAkO9SjCl2chgMZm5 Kc5Jb9YVtT5ci6UYfYpoJvAjlXSHVeKfI7YC8XYdgCvyh4M/CPWsvKCWg g==; X-CSE-ConnectionGUID: JUjD3VWBS76pUshfAH6Qdg== X-CSE-MsgGUID: 1mcR67uRTM6l2iOeRmcogA== X-IronPort-AV: E=McAfee;i="6800,10657,11625"; a="77642336" X-IronPort-AV: E=Sophos;i="6.20,230,1758610800"; d="scan'208";a="77642336" Received: from fmviesa003.fm.intel.com ([10.60.135.143]) by fmvoesa104.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 27 Nov 2025 01:16:10 -0800 X-CSE-ConnectionGUID: IHz7Zy7pR5eV61BpDLAZxA== X-CSE-MsgGUID: AAHc3Uu2Q4GFNcrnCTGTDg== X-ExtLoop1: 1 Received: from mgolanimitul-x299-ud4-pro.iind.intel.com ([10.190.239.114]) by fmviesa003.fm.intel.com with ESMTP; 27 Nov 2025 01:16:09 -0800 From: Mitul Golani To: intel-gfx@lists.freedesktop.org Cc: intel-xe@lists.freedesktop.org, mitulkumar.ajitkumar.golani@intel.com, ankit.k.nautiyal@intel.com, ville.syrjala@linux.intel.com Subject: [PATCH v9 08/17] drm/i915/vrr: Add function to reset DC balance accumulated params Date: Thu, 27 Nov 2025 14:46:05 +0530 Message-ID: <20251127091614.648791-9-mitulkumar.ajitkumar.golani@intel.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: <20251127091614.648791-1-mitulkumar.ajitkumar.golani@intel.com> References: <20251127091614.648791-1-mitulkumar.ajitkumar.golani@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" Add function which resets all accumulated DC Balance parameters whenever adaptive mode of VRR goes off. This helps to give a fresh start when VRR is re-enabled. --v2: - Typo, change crtc_state to old_crtc_state. (Ankit) Signed-off-by: Mitul Golani --- drivers/gpu/drm/i915/display/intel_display.c | 1 + drivers/gpu/drm/i915/display/intel_vrr.c | 13 +++++++++++++ drivers/gpu/drm/i915/display/intel_vrr.h | 3 +++ 3 files changed, 17 insertions(+) diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index db4f84cb8762..d41ab965c013 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -1158,6 +1158,7 @@ static void intel_pre_plane_update(struct intel_atomic_state *state, if (intel_crtc_vrr_disabling(state, crtc)) { intel_vrr_disable(old_crtc_state); + intel_vrr_dcb_reset(old_crtc_state, crtc); intel_crtc_update_active_timings(old_crtc_state, false); } diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c index 45e632e8a981..ff65c1167e1b 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.c +++ b/drivers/gpu/drm/i915/display/intel_vrr.c @@ -632,6 +632,19 @@ void intel_vrr_set_transcoder_timings(const struct intel_crtc_state *crtc_state) EMP_AS_SDP_DB_TL(crtc_state->vrr.vsync_start)); } +void +intel_vrr_dcb_reset(const struct intel_crtc_state *old_crtc_state, + struct intel_crtc *crtc) +{ + struct intel_display *display = to_intel_display(old_crtc_state); + enum pipe pipe = crtc->pipe; + + if (!old_crtc_state->vrr.dc_balance.enable) + return; + + intel_de_write(display, PIPEDMC_DCB_BALANCE_RESET(pipe), 0); +} + void intel_vrr_send_push(struct intel_dsb *dsb, const struct intel_crtc_state *crtc_state) { diff --git a/drivers/gpu/drm/i915/display/intel_vrr.h b/drivers/gpu/drm/i915/display/intel_vrr.h index 66fb9ad846f2..d40ed5504180 100644 --- a/drivers/gpu/drm/i915/display/intel_vrr.h +++ b/drivers/gpu/drm/i915/display/intel_vrr.h @@ -11,6 +11,7 @@ struct drm_connector_state; struct intel_atomic_state; struct intel_connector; +struct intel_crtc; struct intel_crtc_state; struct intel_dsb; struct intel_display; @@ -39,6 +40,8 @@ bool intel_vrr_is_fixed_rr(const struct intel_crtc_state *crtc_state); void intel_vrr_transcoder_enable(const struct intel_crtc_state *crtc_state); void intel_vrr_transcoder_disable(const struct intel_crtc_state *crtc_state); void intel_vrr_set_fixed_rr_timings(const struct intel_crtc_state *crtc_state); +void intel_vrr_dcb_reset(const struct intel_crtc_state *old_crtc_state, + struct intel_crtc *crtc); bool intel_vrr_always_use_vrr_tg(struct intel_display *display); int intel_vrr_safe_window_start(const struct intel_crtc_state *crtc_state); int intel_vrr_vmin_safe_window_end(const struct intel_crtc_state *crtc_state); -- 2.48.1