From: Arun R Murthy <arun.r.murthy@intel.com>
To: "Maarten Lankhorst" <maarten.lankhorst@linux.intel.com>,
"Maxime Ripard" <mripard@kernel.org>,
"Thomas Zimmermann" <tzimmermann@suse.de>,
"David Airlie" <airlied@gmail.com>,
"Simona Vetter" <simona@ffwll.ch>,
"Harry Wentland" <harry.wentland@amd.com>,
"Leo Li" <sunpeng.li@amd.com>,
"Rodrigo Siqueira" <siqueira@igalia.com>,
"Alex Deucher" <alexander.deucher@amd.com>,
"Christian König" <christian.koenig@amd.com>,
"Jani Nikula" <jani.nikula@linux.intel.com>,
"Rodrigo Vivi" <rodrigo.vivi@intel.com>,
"Joonas Lahtinen" <joonas.lahtinen@linux.intel.com>,
"Tvrtko Ursulin" <tursulin@ursulin.net>,
"Lucas De Marchi" <lucas.demarchi@intel.com>,
"Thomas Hellström" <thomas.hellstrom@linux.intel.com>,
uma.shankar@intel.com, chaitanya.kumar.borah@intel.com,
suraj.kandpal@intel.com
Cc: dri-devel@lists.freedesktop.org, amd-gfx@lists.freedesktop.org,
intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org,
"Imported from f20250128-dpst-v8-0-871b94d777f8"@intel.com,
Arun R Murthy <arun.r.murthy@intel.com>
Subject: [PATCH DO_NOT_RTEVIEW v9 12/20] Plane Color Pipeline support for Intel platforms
Date: Mon, 01 Dec 2025 13:58:54 +0530 [thread overview]
Message-ID: <20251201-dpst-v9-12-e462d55dba65@intel.com> (raw)
In-Reply-To: <20251201-dpst-v9-0-e462d55dba65@intel.com>
This patch is a squashed series of
https://patchwork.freedesktop.org/series/129811/
Note: The entire series is not taken
Signed-off-by: Arun R Murthy <arun.r.murthy@intel.com>
---
drivers/gpu/drm/i915/Makefile | 2 ++
drivers/gpu/drm/i915/display/intel_display_limits.h | 8 ++++++++
drivers/gpu/drm/i915/display/intel_display_types.h | 5 +++++
drivers/gpu/drm/xe/Makefile | 2 ++
4 files changed, 17 insertions(+)
diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 004e8fc092a3b9ba7dd907a228b835ceaf8f2ba5..5088a0ef0be67f5e3851ab8e43b8f661824d561a 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -236,6 +236,8 @@ i915-y += \
display/intel_cdclk.o \
display/intel_cmtg.o \
display/intel_color.o \
+ display/intel_colorop.o \
+ display/intel_color_pipeline.o \
display/intel_combo_phy.o \
display/intel_connector.o \
display/intel_crtc.o \
diff --git a/drivers/gpu/drm/i915/display/intel_display_limits.h b/drivers/gpu/drm/i915/display/intel_display_limits.h
index f0fa27e365ab6d1fad1616266ac2b0508ce92a91..55fd574ba313176b5da637e3623ad106dd27880c 100644
--- a/drivers/gpu/drm/i915/display/intel_display_limits.h
+++ b/drivers/gpu/drm/i915/display/intel_display_limits.h
@@ -138,4 +138,12 @@ enum hpd_pin {
HPD_NUM_PINS
};
+enum intel_color_block {
+ INTEL_PLANE_CB_PRE_CSC_LUT,
+ INTEL_PLANE_CB_CSC,
+ INTEL_PLANE_CB_POST_CSC_LUT,
+
+ INTEL_CB_MAX
+};
+
#endif /* __INTEL_DISPLAY_LIMITS_H__ */
diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h b/drivers/gpu/drm/i915/display/intel_display_types.h
index b8a1be24cd0408dfa5377c9afe5309a9f1e743dd..ac5fa0dbffd77dbf927b61d2916a9624eeabac24 100644
--- a/drivers/gpu/drm/i915/display/intel_display_types.h
+++ b/drivers/gpu/drm/i915/display/intel_display_types.h
@@ -1987,6 +1987,11 @@ struct intel_dp_mst_encoder {
struct intel_connector *connector;
};
+struct intel_colorop {
+ struct drm_colorop base;
+ enum intel_color_block id;
+};
+
static inline struct intel_encoder *
intel_attached_encoder(struct intel_connector *connector)
{
diff --git a/drivers/gpu/drm/xe/Makefile b/drivers/gpu/drm/xe/Makefile
index 38008a644a0919868d6ff99fdda024df0eca944e..cd84f2be4ed37847d4da031ad9e330f56982431d 100644
--- a/drivers/gpu/drm/xe/Makefile
+++ b/drivers/gpu/drm/xe/Makefile
@@ -230,6 +230,8 @@ xe-$(CONFIG_DRM_XE_DISPLAY) += \
i915-display/intel_cdclk.o \
i915-display/intel_cmtg.o \
i915-display/intel_color.o \
+ i915-display/intel_colorop.o \
+ i915-display/intel_color_pipeline.o \
i915-display/intel_combo_phy.o \
i915-display/intel_connector.o \
i915-display/intel_crtc.o \
--
2.25.1
next prev parent reply other threads:[~2025-12-01 8:29 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-01 8:28 [PATCH v9 00/20] Display Global Histogram Arun R Murthy
2025-12-01 8:28 ` [PATCH v9 01/20] DO_NOT_REVIEW: plane/crtc color pipeline Arun R Murthy
2025-12-01 8:28 ` [PATCH v9 02/20] drm: Define histogram structures exposed to user Arun R Murthy
2025-12-01 8:28 ` [PATCH v9 03/20] drm: Add new element histogram for colorop Arun R Murthy
2025-12-01 8:28 ` [PATCH v9 04/20] drm/colorop: Export function to create pipeline element histogram Arun R Murthy
2025-12-01 8:28 ` [PATCH v9 05/20] drm: Define ImageEnhancemenT LUT structures exposed to user Arun R Murthy
2025-12-01 8:28 ` [PATCH v9 06/20] drm: Add new element Image EnhancemenT for colorop Arun R Murthy
2025-12-01 8:28 ` [PATCH v9 07/20] drm/colorop: Export function to create pipeline element iet lut Arun R Murthy
2025-12-01 8:28 ` [PATCH v9 08/20] drm/i915/histogram: Define registers for histogram Arun R Murthy
2025-12-01 8:28 ` [PATCH v9 09/20] drm/i915/histogram: Add support " Arun R Murthy
2025-12-01 8:28 ` [PATCH v9 10/20] drm/xe: Add histogram support to Xe builds Arun R Murthy
2025-12-01 8:28 ` [PATCH v9 11/20] drm/i915/histogram: histogram interrupt handling Arun R Murthy
2025-12-01 8:28 ` Arun R Murthy [this message]
2025-12-01 8:28 ` [PATCH v9 13/20] drm/i915/colorop: Add crtc color pipeline for i915 Arun R Murthy
2025-12-01 8:28 ` [PATCH v9 14/20] drm/i915/histogram: Hook i915 histogram with drm histogram Arun R Murthy
2025-12-01 8:28 ` [PATCH v9 15/20] drm/i915/iet: Add support to writing the IET LUT data Arun R Murthy
2025-12-01 8:28 ` [PATCH v9 16/20] drm/i915/colorop: create IET LUT properties Arun R Murthy
2025-12-01 8:28 ` [PATCH v9 17/20] drm/i915/crtc: Hook i915 IET LUT with the drm IET properties Arun R Murthy
2025-12-01 8:29 ` [PATCH v9 18/20] drm/i915/histogram: histogram delay counter doesn't reset Arun R Murthy
2025-12-01 8:29 ` [PATCH v9 19/20] drm/i915/histogram: Histogram changes for Display 20+ Arun R Murthy
2025-12-01 8:29 ` [PATCH v9 20/20] drm/i915/histogram: Enable pipe dithering Arun R Murthy
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