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From: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org,
	mitulkumar.ajitkumar.golani@intel.com,
	ankit.k.nautiyal@intel.com, ville.syrjala@linux.intel.com,
	uma.shankar@intel.com, jani.nikula@intel.com
Subject: [PATCH v10 07/17] drm/i915/vrr: Add compute config for DC Balance params
Date: Tue,  2 Dec 2025 13:06:42 +0530	[thread overview]
Message-ID: <20251202073659.926838-8-mitulkumar.ajitkumar.golani@intel.com> (raw)
In-Reply-To: <20251202073659.926838-1-mitulkumar.ajitkumar.golani@intel.com>

Compute DC Balance parameters and tunable params based on
experiments.

--v2:
- Document tunable params. (Ankit)

--v3:
- Add line spaces to compute config. (Ankit)
- Remove redundancy checks.

--v4:
- Separate out conpute config to separate function.
- As all the valuse are being computed in scanlines, and slope
is still in usec, convert and store it to scanlines.

--v5:
- Update and add comments for slope calculation. (Ankit)
- Update early return conditions for dc balance compute. (Ankit)

--v6:
- Early return condition simplified for dc balance compute config. (Ankit)
- Make use of pipe restrictions to this patch. (Ankit)

Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
---
 drivers/gpu/drm/i915/display/intel_vrr.c | 60 ++++++++++++++++++++++++
 1 file changed, 60 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_vrr.c b/drivers/gpu/drm/i915/display/intel_vrr.c
index 427ef1741051..74ad661f2654 100644
--- a/drivers/gpu/drm/i915/display/intel_vrr.c
+++ b/drivers/gpu/drm/i915/display/intel_vrr.c
@@ -6,6 +6,7 @@
 
 #include <drm/drm_print.h>
 
+#include "intel_crtc.h"
 #include "intel_de.h"
 #include "intel_display_regs.h"
 #include "intel_display_types.h"
@@ -20,6 +21,14 @@
 #define FIXED_POINT_PRECISION		100
 #define CMRR_PRECISION_TOLERANCE	10
 
+/*
+ * Tunable parameters for DC Balance correction.
+ * These are captured based on experimentations.
+ */
+#define DCB_CORRECTION_SENSITIVITY	30
+#define DCB_CORRECTION_AGGRESSIVENESS	1000 /* ms × 100; 10 ms */
+#define DCB_BLANK_TARGET		50
+
 bool intel_vrr_is_capable(struct intel_connector *connector)
 {
 	struct intel_display *display = to_intel_display(connector);
@@ -342,6 +351,55 @@ int intel_vrr_compute_vmax(struct intel_connector *connector,
 	return vmax;
 }
 
+static bool intel_vrr_dc_balance_possible(const struct intel_crtc_state *crtc_state)
+{
+	struct intel_display *display = to_intel_display(crtc_state);
+	struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+	enum pipe pipe = crtc->pipe;
+
+	/*
+	 * FIXME: Currently Firmware supports DC Balancing on PIPE A
+	 * and PIPE B. Account those limitation while computing DC
+	 * Balance parameters.
+	 */
+	return (HAS_VRR_DC_BALANCE(display) &&
+		((pipe == PIPE_A) || (pipe == PIPE_B)));
+}
+
+static void
+intel_vrr_dc_balance_compute_config(struct intel_crtc_state *crtc_state)
+{
+	int guardband_usec, adjustment_usec;
+	struct drm_display_mode *adjusted_mode = &crtc_state->hw.adjusted_mode;
+
+	if (!intel_vrr_dc_balance_possible(crtc_state) || !crtc_state->vrr.enable)
+		return;
+
+	crtc_state->vrr.dc_balance.vmax = crtc_state->vrr.vmax;
+	crtc_state->vrr.dc_balance.vmin = crtc_state->vrr.vmin;
+	crtc_state->vrr.dc_balance.max_increase =
+		crtc_state->vrr.vmax - crtc_state->vrr.vmin;
+	crtc_state->vrr.dc_balance.max_decrease =
+		crtc_state->vrr.vmax - crtc_state->vrr.vmin;
+	crtc_state->vrr.dc_balance.guardband =
+		DIV_ROUND_UP(crtc_state->vrr.dc_balance.vmax *
+			     DCB_CORRECTION_SENSITIVITY, 100);
+	guardband_usec =
+		intel_scanlines_to_usecs(adjusted_mode,
+					 crtc_state->vrr.dc_balance.guardband);
+	/*
+	 *  The correction_aggressiveness/100 is the number of milliseconds to
+	 *  adjust by when the balance is at twice the guardband.
+	 *  guardband_slope = correction_aggressiveness / (guardband * 100)
+	 */
+	adjustment_usec = DCB_CORRECTION_AGGRESSIVENESS * 10;
+	crtc_state->vrr.dc_balance.slope =
+		DIV_ROUND_UP(adjustment_usec, guardband_usec);
+	crtc_state->vrr.dc_balance.vblank_target =
+		DIV_ROUND_UP((crtc_state->vrr.vmax - crtc_state->vrr.vmin) *
+			     DCB_BLANK_TARGET, 100);
+}
+
 void
 intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
 			 struct drm_connector_state *conn_state)
@@ -399,6 +457,8 @@ intel_vrr_compute_config(struct intel_crtc_state *crtc_state,
 			(crtc_state->hw.adjusted_mode.crtc_vtotal -
 			 crtc_state->hw.adjusted_mode.crtc_vsync_end);
 	}
+
+	intel_vrr_dc_balance_compute_config(crtc_state);
 }
 
 static int
-- 
2.48.1


  parent reply	other threads:[~2025-12-02  7:36 UTC|newest]

Thread overview: 36+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2025-12-02  7:36 [PATCH v10 00/17] Enable/Disable DC balance along with VRR DSB Mitul Golani
2025-12-02  7:36 ` [PATCH v10 01/17] drm/i915/display: Add source param for dc balance Mitul Golani
2025-12-02  7:36 ` [PATCH v10 02/17] drm/i915/dmc: Add pipe dmc registers and bits for DC Balance Mitul Golani
2025-12-02  7:36 ` [PATCH v10 03/17] drm/i915/vrr: Add VRR DC balance registers Mitul Golani
2025-12-02  7:36 ` [PATCH v10 04/17] drm/i915/vrr: Add functions to read out vmin/vmax stuff Mitul Golani
2025-12-15  6:22   ` Shankar, Uma
2025-12-16 12:33   ` Nautiyal, Ankit K
2025-12-02  7:36 ` [PATCH v10 05/17] drm/i915/vrr: Add DC Balance params to crtc_state Mitul Golani
2025-12-02  7:36 ` [PATCH v10 06/17] drm/i915/vrr: Add state dump for DC Balance params Mitul Golani
2025-12-02  7:36 ` Mitul Golani [this message]
2025-12-15  6:25   ` [PATCH v10 07/17] drm/i915/vrr: Add compute config " Shankar, Uma
2025-12-02  7:36 ` [PATCH v10 08/17] drm/i915/vrr: Add function to reset DC balance accumulated params Mitul Golani
2025-12-02  7:36 ` [PATCH v10 09/17] drm/i915/display: Add DC Balance flip count operations Mitul Golani
2025-12-02  7:36 ` [PATCH v10 10/17] drm/i915/vrr: Write DC balance params to hw registers Mitul Golani
2025-12-02  7:36 ` [PATCH v10 11/17] drm/i915/vblank: Extract vrr_vblank_start() Mitul Golani
2025-12-02  7:36 ` [PATCH v10 12/17] drm/i915/vrr: Implement vblank evasion with DC balancing Mitul Golani
2025-12-02  7:36 ` [PATCH v10 13/17] drm/i915/display: Wait for VRR PUSH status update Mitul Golani
2025-12-15  6:27   ` Shankar, Uma
2025-12-16 12:34   ` Nautiyal, Ankit K
2025-12-02  7:36 ` [PATCH v10 14/17] drm/i915/dsb: Add pipedmc dc balance enable/disable Mitul Golani
2025-12-02  7:36 ` [PATCH v10 15/17] drm/i915/vrr: Pause DC Balancing for DSB commits Mitul Golani
2025-12-15  7:40   ` Shankar, Uma
2025-12-16 12:35   ` Nautiyal, Ankit K
2025-12-02  7:36 ` [PATCH v10 16/17] drm/i915/display: Add function to configure event for dc balance Mitul Golani
2025-12-15  7:42   ` Shankar, Uma
2025-12-16 12:36   ` Nautiyal, Ankit K
2025-12-02  7:36 ` [PATCH v10 17/17] drm/i915/vrr: Enable DC Balance Mitul Golani
2025-12-15  7:47   ` Shankar, Uma
2025-12-23 10:56     ` Golani, Mitulkumar Ajitkumar
2025-12-16 12:30   ` Nautiyal, Ankit K
2025-12-23 10:57     ` Golani, Mitulkumar Ajitkumar
2025-12-02  8:20 ` ✗ CI.checkpatch: warning for Enable/Disable DC balance along with VRR DSB Patchwork
2025-12-02  8:21 ` ✓ CI.KUnit: success " Patchwork
2025-12-02  8:37 ` ✗ CI.checksparse: warning " Patchwork
2025-12-02  9:23 ` ✓ Xe.CI.BAT: success " Patchwork
2025-12-02 10:21 ` ✓ Xe.CI.Full: " Patchwork

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