From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8A6D9D3B7F8 for ; Mon, 8 Dec 2025 19:17:31 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 3A0F810E43B; Mon, 8 Dec 2025 19:17:31 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=igalia.com header.i=@igalia.com header.b="opWHf/ZZ"; dkim-atps=neutral Received: from fanzine2.igalia.com (fanzine2.igalia.com [213.97.179.56]) by gabe.freedesktop.org (Postfix) with ESMTPS id 86B3810E0E6 for ; Mon, 8 Dec 2025 19:17:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=igalia.com; s=20170329; h=Content-Transfer-Encoding:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:Cc:To:From:Sender:Reply-To:Content-Type:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe: List-Post:List-Owner:List-Archive; bh=cvcfiejSUc2eUV6b0jh/Ag2hjs21w0D6iavyMxytHDY=; b=opWHf/ZZhu6AP+/6M4I6d8r8Z7 SGM4nCw65M4b+7kB7j0TrfPJTCIiqz2VKd/h7mnDra8hv6xiRafu/UuGspiIgiYqcwgLkH9RT5H1q /b0545Bv+N6eXJDhA4u3MwOIz2auJhkH00ViJ8T2tQasz6KeZ5+xxeC1hCOBt3Cr+n0zoCTgXWmtM 0UDN3xhPcFqd4v+2/3lzHhmB03+riaCqtID8cObvzxKHPxiyr65KNzfH6hgmRuBiSYYgjRWSDjPVl zblBUneppNg1fCmkiriz3OYvWUCvg169/xHJEhgvPilwciH7y30M0KnUDkMRNrwUb7e5Get3mOlCA /LiU1B+Q==; Received: from [86.33.28.86] (helo=localhost) by fanzine2.igalia.com with utf8esmtpsa (Cipher TLS1.3:ECDHE_SECP256R1__RSA_PSS_RSAE_SHA256__AES_256_GCM:256) (Exim) id 1vSgjg-00AC71-Np; Mon, 08 Dec 2025 20:17:28 +0100 From: Tvrtko Ursulin To: intel-xe@lists.freedesktop.org Cc: kernel-dev@igalia.com, Tvrtko Ursulin , Rodrigo Vivi Subject: [PATCH v15 02/10] drm/xe/xelp: Quiesce memory traffic before invalidating AuxCCS Date: Mon, 8 Dec 2025 20:17:13 +0100 Message-ID: <20251208191722.7194-3-tursulin@igalia.com> X-Mailer: git-send-email 2.52.0 In-Reply-To: <20251208191722.7194-1-tursulin@igalia.com> References: <20251208191722.7194-1-tursulin@igalia.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" From: Tvrtko Ursulin According to i915 commit ad8ebf12217e ("drm/i915/gt: Ensure memory quiesced before invalidation") quiescing of the memory traffic is required before invalidating the AuxCCS tables. Add an extra pipe control flush to achieve that. Signed-off-by: Tvrtko Ursulin Cc: Rodrigo Vivi Reviewed-by: Rodrigo Vivi --- drivers/gpu/drm/xe/xe_ring_ops.c | 10 +++++++++- drivers/gpu/drm/xe/xe_ring_ops_types.h | 2 +- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/xe/xe_ring_ops.c b/drivers/gpu/drm/xe/xe_ring_ops.c index 5336ea626031..bc806cabb5c3 100644 --- a/drivers/gpu/drm/xe/xe_ring_ops.c +++ b/drivers/gpu/drm/xe/xe_ring_ops.c @@ -358,12 +358,20 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job, struct xe_gt *gt = job->q->gt; struct xe_device *xe = gt_to_xe(gt); bool lacks_render = !(gt->info.engine_mask & XE_HW_ENGINE_RCS_MASK); + const bool aux_ccs = has_aux_ccs(xe); u32 mask_flags = 0; *head = lrc->ring.tail; i = emit_copy_timestamp(lrc, dw, i); + /* + * On AuxCCS platforms the invalidation of the Aux table requires + * quiescing the memory traffic beforehand. + */ + if (aux_ccs) + i = emit_render_cache_flush(job, dw, i); + dw[i++] = preparser_disable(true); if (lacks_render) mask_flags = PIPE_CONTROL_3D_ARCH_FLAGS; @@ -374,7 +382,7 @@ static void __emit_job_gen12_render_compute(struct xe_sched_job *job, i = emit_pipe_invalidate(mask_flags, job->ring_ops_flush_tlb, dw, i); /* hsdes: 1809175790 */ - if (has_aux_ccs(xe)) + if (aux_ccs) i = emit_aux_table_inv(gt, CCS_AUX_INV, dw, i); dw[i++] = preparser_disable(false); diff --git a/drivers/gpu/drm/xe/xe_ring_ops_types.h b/drivers/gpu/drm/xe/xe_ring_ops_types.h index d7e3e150a9a5..477dc7defd72 100644 --- a/drivers/gpu/drm/xe/xe_ring_ops_types.h +++ b/drivers/gpu/drm/xe/xe_ring_ops_types.h @@ -8,7 +8,7 @@ struct xe_sched_job; -#define MAX_JOB_SIZE_DW 58 +#define MAX_JOB_SIZE_DW 70 #define MAX_JOB_SIZE_BYTES (MAX_JOB_SIZE_DW * 4) /** -- 2.52.0