From: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: intel-xe@lists.freedesktop.org,
mitulkumar.ajitkumar.golani@intel.com,
ankit.k.nautiyal@intel.com, ville.syrjala@linux.intel.com,
uma.shankar@intel.com, jani.nikula@intel.com
Subject: [PATCH v11 13/18] drm/i915/vrr: Implement vblank evasion with DC balancing
Date: Tue, 23 Dec 2025 16:15:35 +0530 [thread overview]
Message-ID: <20251223104542.2688548-14-mitulkumar.ajitkumar.golani@intel.com> (raw)
In-Reply-To: <20251223104542.2688548-1-mitulkumar.ajitkumar.golani@intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
Add vblank evasion logic when vrr is already enabled along with
dc balance is computed.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Mitul Golani <mitulkumar.ajitkumar.golani@intel.com>
Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
---
drivers/gpu/drm/i915/display/intel_dsb.c | 31 ++++++++++++++++++++-
drivers/gpu/drm/i915/display/intel_vblank.c | 26 +++++++++++++++--
2 files changed, 53 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dsb.c b/drivers/gpu/drm/i915/display/intel_dsb.c
index ec2a3fb171ab..91060e2a5762 100644
--- a/drivers/gpu/drm/i915/display/intel_dsb.c
+++ b/drivers/gpu/drm/i915/display/intel_dsb.c
@@ -704,7 +704,36 @@ void intel_dsb_vblank_evade(struct intel_atomic_state *state,
if (crtc_state->has_psr)
intel_dsb_emit_wait_dsl(dsb, DSB_OPCODE_WAIT_DSL_OUT, 0, 0);
- if (pre_commit_is_vrr_active(state, crtc)) {
+ if (pre_commit_is_vrr_active(state, crtc) && crtc_state->vrr.dc_balance.enable) {
+ int vblank_delay = crtc_state->set_context_latency;
+ int vmin_vblank_start, vmax_vblank_start;
+
+ vmin_vblank_start = intel_vrr_dcb_vmin_vblank_start_next(crtc_state);
+
+ if (vmin_vblank_start >= 0) {
+ end = vmin_vblank_start;
+ start = end - vblank_delay - latency;
+ intel_dsb_wait_scanline_out(state, dsb, start, end);
+ }
+
+ vmax_vblank_start = intel_vrr_dcb_vmax_vblank_start_next(crtc_state);
+
+ if (vmax_vblank_start >= 0) {
+ end = vmax_vblank_start;
+ start = end - vblank_delay - latency;
+ intel_dsb_wait_scanline_out(state, dsb, start, end);
+ }
+
+ vmin_vblank_start = intel_vrr_dcb_vmin_vblank_start_final(crtc_state);
+ end = vmin_vblank_start;
+ start = end - vblank_delay - latency;
+ intel_dsb_wait_scanline_out(state, dsb, start, end);
+
+ vmax_vblank_start = intel_vrr_dcb_vmax_vblank_start_final(crtc_state);
+ end = vmax_vblank_start;
+ start = end - vblank_delay - latency;
+ intel_dsb_wait_scanline_out(state, dsb, start, end);
+ } else if (pre_commit_is_vrr_active(state, crtc)) {
int vblank_delay = crtc_state->set_context_latency;
end = intel_vrr_vmin_vblank_start(crtc_state);
diff --git a/drivers/gpu/drm/i915/display/intel_vblank.c b/drivers/gpu/drm/i915/display/intel_vblank.c
index de20baeb9d99..df5879489963 100644
--- a/drivers/gpu/drm/i915/display/intel_vblank.c
+++ b/drivers/gpu/drm/i915/display/intel_vblank.c
@@ -654,10 +654,30 @@ intel_pre_commit_crtc_state(struct intel_atomic_state *state,
static int vrr_vblank_start(const struct intel_crtc_state *crtc_state)
{
- if (intel_vrr_is_push_sent(crtc_state))
- return intel_vrr_vmin_vblank_start(crtc_state);
+ bool is_push_sent = intel_vrr_is_push_sent(crtc_state);
+ int vblank_start;
+
+ if (!crtc_state->vrr.dc_balance.enable) {
+ if (is_push_sent)
+ return intel_vrr_vmin_vblank_start(crtc_state);
+ else
+ return intel_vrr_vmax_vblank_start(crtc_state);
+ }
+
+ if (is_push_sent)
+ vblank_start = intel_vrr_dcb_vmin_vblank_start_next(crtc_state);
else
- return intel_vrr_vmax_vblank_start(crtc_state);
+ vblank_start = intel_vrr_dcb_vmax_vblank_start_next(crtc_state);
+
+ if (vblank_start >= 0)
+ return vblank_start;
+
+ if (is_push_sent)
+ vblank_start = intel_vrr_dcb_vmin_vblank_start_final(crtc_state);
+ else
+ vblank_start = intel_vrr_dcb_vmax_vblank_start_final(crtc_state);
+
+ return vblank_start;
}
void intel_vblank_evade_init(const struct intel_crtc_state *old_crtc_state,
--
2.48.1
next prev parent reply other threads:[~2025-12-23 10:45 UTC|newest]
Thread overview: 25+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-12-23 10:45 [PATCH v11 00/18] Enable/Disable DC balance along with VRR DSB Mitul Golani
2025-12-23 10:45 ` [PATCH v11 01/18] drm/i915/display: Add source param for dc balance Mitul Golani
2025-12-23 10:45 ` [PATCH v11 02/18] drm/i915/dmc: Add pipe dmc registers and bits for DC Balance Mitul Golani
2025-12-23 10:45 ` [PATCH v11 03/18] drm/i915/vrr: Add VRR DC balance registers Mitul Golani
2025-12-23 10:45 ` [PATCH v11 04/18] drm/i915/vrr: Add functions to read out vmin/vmax stuff Mitul Golani
2025-12-23 10:45 ` [PATCH v11 05/18] drm/i915/vrr: Add DC Balance params to crtc_state Mitul Golani
2025-12-23 10:45 ` [PATCH v11 06/18] drm/i915/vrr: Add state dump for DC Balance params Mitul Golani
2025-12-23 10:45 ` [PATCH v11 07/18] drm/i915/vrr: Add compute config " Mitul Golani
2025-12-23 10:45 ` [PATCH v11 08/18] drm/i915/vrr: Add function to check if DC Balance Possible Mitul Golani
2025-12-24 4:20 ` Nautiyal, Ankit K
2025-12-23 10:45 ` [PATCH v11 09/18] drm/i915/vrr: Add function to reset DC balance accumulated params Mitul Golani
2025-12-23 10:45 ` [PATCH v11 10/18] drm/i915/display: Add DC Balance flip count operations Mitul Golani
2025-12-23 10:45 ` [PATCH v11 11/18] drm/i915/vrr: Write DC balance params to hw registers Mitul Golani
2025-12-23 10:45 ` [PATCH v11 12/18] drm/i915/vblank: Extract vrr_vblank_start() Mitul Golani
2025-12-23 10:45 ` Mitul Golani [this message]
2025-12-23 10:45 ` [PATCH v11 14/18] drm/i915/display: Wait for VRR PUSH status update Mitul Golani
2025-12-23 10:45 ` [PATCH v11 15/18] drm/i915/dsb: Add pipedmc dc balance enable/disable Mitul Golani
2025-12-23 10:45 ` [PATCH v11 16/18] drm/i915/vrr: Pause DC Balancing for DSB commits Mitul Golani
2025-12-23 10:45 ` [PATCH v11 17/18] drm/i915/display: Add function to configure event for dc balance Mitul Golani
2025-12-23 10:45 ` [PATCH v11 18/18] drm/i915/vrr: Enable DC Balance Mitul Golani
2025-12-23 10:57 ` ✗ CI.checkpatch: warning for Enable/Disable DC balance along with VRR DSB Patchwork
2025-12-23 10:58 ` ✓ CI.KUnit: success " Patchwork
2025-12-23 11:13 ` ✗ CI.checksparse: warning " Patchwork
2025-12-23 11:35 ` ✓ Xe.CI.BAT: success " Patchwork
2025-12-23 21:49 ` ✗ Xe.CI.Full: failure " Patchwork
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