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From: Matt Roper <matthew.d.roper@intel.com>
To: Gustavo Sousa <gustavo.sousa@intel.com>
Cc: <intel-xe@lists.freedesktop.org>
Subject: Re: [PATCH 10/12] drm/xe/kunit: Include hw_engines in xe_wa test
Date: Wed, 28 Jan 2026 13:08:50 -0800	[thread overview]
Message-ID: <20260128210850.GU458797@mdroper-desk1.amr.corp.intel.com> (raw)
In-Reply-To: <20260116-rtp-mcr-check-v1-10-d420b9c1a327@intel.com>

On Fri, Jan 16, 2026 at 07:12:18PM -0300, Gustavo Sousa wrote:
> For better coverage, include RTP to register save/store processing for
> hw_engines as another xe_wa test case.
> 
> Note that, since one of the RTP rules involve calling
> xe_rtp_cfeg_wmtp_disabled(), we need to intercept a MMIO read to
> XEHP_FUSE4 to allow the test to run without crashing.
> 
> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com>

The read interception approach may need to be changed if you take
Michal's suggestion on patches 5/6, but otherwise,

Reviewed-by: Matt Roper <matthew.d.roper@intel.com>


> ---
>  drivers/gpu/drm/xe/tests/xe_wa_test.c | 50 ++++++++++++++++++++++++++++++++++-
>  1 file changed, 49 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/xe/tests/xe_wa_test.c b/drivers/gpu/drm/xe/tests/xe_wa_test.c
> index 2bf6fab015cd..3311f05a6fc2 100644
> --- a/drivers/gpu/drm/xe/tests/xe_wa_test.c
> +++ b/drivers/gpu/drm/xe/tests/xe_wa_test.c
> @@ -6,15 +6,34 @@
>  #include <drm/drm_drv.h>
>  #include <drm/drm_kunit_helpers.h>
>  
> +#include <kunit/static_stub.h>
>  #include <kunit/test.h>
>  
> +#include "regs/xe_gt_regs.h"
> +#include "tests/xe_mmio_intercept.h"
>  #include "xe_device.h"
> +#include "xe_gt.h"
> +#include "xe_hw_engine.h"
>  #include "xe_kunit_helpers.h"
>  #include "xe_pci_test.h"
>  #include "xe_reg_sr.h"
>  #include "xe_tuning.h"
>  #include "xe_wa.h"
>  
> +static bool xe_wa_mmio_intercept_read32(struct kunit *test,
> +					struct xe_mmio *mmio,
> +					struct xe_reg reg,
> +					u32 *val)
> +{
> +	/* For XE_RTP_RULES(...FUNC(xe_rtp_cfeg_wmtp_disabled)...). */
> +	if (reg.raw == XEHP_FUSE4.raw) {
> +		*val = CFEG_WMTP_DISABLE;
> +		return true;
> +	}
> +
> +	return false;
> +}
> +
>  static int xe_wa_test_init(struct kunit *test)
>  {
>  	const struct xe_pci_fake_data *param = test->param_value;
> @@ -33,10 +52,13 @@ static int xe_wa_test_init(struct kunit *test)
>  	ret = xe_pci_fake_device_init(xe);
>  	KUNIT_ASSERT_EQ(test, ret, 0);
>  
> +	kunit_activate_static_stub(test,
> +				   xe_mmio_intercept_read32,
> +				   xe_wa_mmio_intercept_read32);
> +
>  	if (!param->graphics_verx100)
>  		xe->info.step = param->step;
>  
> -	/* TODO: init hw engines for engine/LRC WAs */
>  	xe->drm.dev = dev;
>  	test->priv = xe;
>  
> @@ -59,8 +81,34 @@ static void xe_wa_gt(struct kunit *test)
>  	}
>  }
>  
> +static void xe_wa_hw_engines(struct kunit *test)
> +{
> +	struct xe_device *xe = test->priv;
> +	struct xe_gt *gt;
> +	int id;
> +
> +	for_each_gt(gt, xe, id) {
> +		struct xe_hw_engine *hwe;
> +		int hwe_id;
> +
> +		/*
> +		 * The early initialization also causes RTP processing to build
> +		 * up each engine's reg_sr.
> +		 */
> +		xe_hw_engines_init_early(gt);
> +		for_each_hw_engine(hwe, gt, hwe_id)
> +			KUNIT_EXPECT_EQ(test, hwe->reg_sr.errors, 0);
> +
> +		for_each_hw_engine(hwe, gt, hwe_id) {
> +			xe_hw_engine_setup_reg_lrc(hwe);
> +			KUNIT_EXPECT_EQ(test, hwe->reg_lrc.errors, 0);
> +		}
> +	}
> +}
> +
>  static struct kunit_case xe_wa_tests[] = {
>  	KUNIT_CASE_PARAM(xe_wa_gt, xe_pci_fake_data_gen_params),
> +	KUNIT_CASE_PARAM(xe_wa_hw_engines, xe_pci_fake_data_gen_params),
>  	{}
>  };
>  
> 
> -- 
> 2.52.0
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

  reply	other threads:[~2026-01-28 21:09 UTC|newest]

Thread overview: 31+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-01-16 22:12 [PATCH 00/12] Fix MCR inconsistencies in RTP tables Gustavo Sousa
2026-01-16 22:12 ` [PATCH 01/12] drm/xe: Define CACHE_MODE_1 as MCR register Gustavo Sousa
2026-01-21  0:04   ` Matt Roper
2026-01-16 22:12 ` [PATCH 02/12] drm/xe: Define and use MCR version of COMMON_SLICE_CHICKEN1 Gustavo Sousa
2026-01-21  0:06   ` Matt Roper
2026-01-16 22:12 ` [PATCH 03/12] drm/xe: Define and use MCR version of COMMON_SLICE_CHICKEN4 Gustavo Sousa
2026-01-21  0:08   ` Matt Roper
2026-01-16 22:12 ` [PATCH 04/12] drm/xe/kunit: Add xe_kunit_is_live_test() Gustavo Sousa
2026-01-16 22:59   ` Michal Wajdeczko
2026-05-05 18:32     ` Gustavo Sousa
2026-01-16 22:12 ` [PATCH 05/12] drm/xe/kunit: Abort test if MMIO operation is attempted Gustavo Sousa
2026-01-16 23:15   ` Michal Wajdeczko
2026-05-05 19:11     ` Gustavo Sousa
2026-01-16 22:12 ` [PATCH 06/12] drm/xe/kunit: Allow intercepting MMIO operations Gustavo Sousa
2026-01-16 22:12 ` [PATCH 07/12] drm/xe: Extract xe_hw_engine_setup_reg_lrc() Gustavo Sousa
2026-01-21  0:12   ` Matt Roper
2026-01-16 22:12 ` [PATCH 08/12] drm/xe: Extract xe_hw_engines_setup_runtime_mask() Gustavo Sousa
2026-01-28 18:07   ` Matt Roper
2026-01-16 22:12 ` [PATCH 09/12] drm/xe/kunit: Use KUNIT_EXPECT_EQ() in xe_wa_gt() Gustavo Sousa
2026-01-16 23:29   ` Michal Wajdeczko
2026-01-28 18:09   ` Matt Roper
2026-01-16 22:12 ` [PATCH 10/12] drm/xe/kunit: Include hw_engines in xe_wa test Gustavo Sousa
2026-01-28 21:08   ` Matt Roper [this message]
2026-01-16 22:12 ` [PATCH 11/12] drm/xe/mcr: Extract reg_in_steering_type_ranges() Gustavo Sousa
2026-01-28 21:11   ` Matt Roper
2026-01-16 22:12 ` [PATCH 12/12] drm/xe/reg_sr: Do sanity check for MCR vs non-MCR Gustavo Sousa
2026-01-28 23:59   ` Matt Roper
2026-05-05 19:39     ` Gustavo Sousa
2026-05-08 21:52       ` Gustavo Sousa
2026-01-16 23:15 ` ✗ CI.checkpatch: warning for Fix MCR inconsistencies in RTP tables Patchwork
2026-01-16 23:16 ` ✓ CI.KUnit: success " Patchwork

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