From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9F657D172CE for ; Mon, 2 Feb 2026 05:25:28 +0000 (UTC) Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id 5AEE010E0FD; Mon, 2 Feb 2026 05:25:28 +0000 (UTC) Authentication-Results: gabe.freedesktop.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.b="M+ezvoLW"; dkim-atps=neutral Received: from mgamail.intel.com (mgamail.intel.com [198.175.65.19]) by gabe.freedesktop.org (Postfix) with ESMTPS id 91B7310E0FD for ; Mon, 2 Feb 2026 05:25:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1770009927; x=1801545927; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=W7PmMtPpPOKMpdRFcvf9WVs/VgoefIaNBmlhQ6Jw1aI=; b=M+ezvoLW5xX5gbLh9YfdPdF+Q1wW610CshWAsiNkpvzFevcIAK/VRinH g2MOfUrLm36BsqXvDKcyuT/bD5FdQvpK+dfk2hRWMToCzeJtVwuSiR0yu rJMjJVoNgpDYOb8G4Zmo2wQ3QmayZ2ZnbgFdgoJoZpLuYTa9GzLXejVqV blUClG2/5oE0RHTN4RIlpkqfZFjTgKYzsQ/EoPvZ2/U6yX6qJ9qV0h98h FK6rOjL5/v5vj5NOf3vTFts1R+6OE4eFEt4+yzILh8y4ZgxM2ubpCpnmZ eu6oG5zeU/Qv+wcinHVs48FRBcK7JYrKvR7c0o0g6gBxdaPy0eYfQjHgu w==; X-CSE-ConnectionGUID: rZ+5H4y/SlyhEMWhM5Xp1Q== X-CSE-MsgGUID: VT8YxXkYQxGLiH2DQWZo1Q== X-IronPort-AV: E=McAfee;i="6800,10657,11689"; a="71059558" X-IronPort-AV: E=Sophos;i="6.21,268,1763452800"; d="scan'208";a="71059558" Received: from orviesa007.jf.intel.com ([10.64.159.147]) by orvoesa111.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Feb 2026 21:25:27 -0800 X-CSE-ConnectionGUID: 5ShY/ZHkQ9mLE2EStiNoMw== X-CSE-MsgGUID: QrgJOhX5QO22DbryzehmDg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.21,268,1763452800"; d="scan'208";a="209497670" Received: from varungup-desk.iind.intel.com ([10.190.238.71]) by orviesa007-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 01 Feb 2026 21:25:26 -0800 From: Varun Gupta To: intel-xe@lists.freedesktop.org Cc: matthew.brost@intel.com, matthew.d.roper@intel.com, himal.prasad.ghimiray@intel.com, priyanka.dandamudi@intel.com Subject: [PATCH v3 0/2] drm/xe: Add prefetch pagefault support for Xe3p Date: Mon, 2 Feb 2026 10:55:13 +0530 Message-ID: <20260202052515.840084-1-varun.gupta@intel.com> X-Mailer: git-send-email 2.43.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-BeenThere: intel-xe@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel Xe graphics driver List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-xe-bounces@lists.freedesktop.org Sender: "Intel-xe" Xe3p hardware prefetches memory ranges and notifies software via an additional bit (bit 11) in the page fault descriptor that the fault was caused by prefetch. Patch 1 adds a dedicated stats counter to track invalid prefetch pagefaults separately from regular faults. Patch 2 implements the prefetch support by extracting the prefetch bit from the fault descriptor and echoing it in the response (bit 6) only when handling fails. This prevents CAT errors for prefetch faults. For failed prefetch faults, a single-line error message with the prefetch bit value is printed to reduce excessive logging. Based on original patches by Brian Welty and Priyanka Dandamudi. v3: - Split stats counter into separate patch (Matt Brost) - Drop xe_guc_pagefault_types.h rename patch (Matt Brost) - Move prefetch check to caller of xe_pagefault_print (Matt Brost) - Rename XE3P_PFD_PREFETCH/PFR_PREFETCH to remove XE3P_ prefix, add comments about Xe3+ platform support (Matt Brost) - Rename PREFETCH_PAGEFAULT_COUNT to INVALID_PREFETCH_PAGEFAULT_COUNT for clarity (Matt Brost) - Include prefetch bit value in error message (Matt Brost) v2: - Initial implementation combining all changes Varun Gupta (2): drm/xe: Add counter for invalid prefetch pagefaults drm/xe: Add prefetch fault support for Xe3p drivers/gpu/drm/xe/xe_gt_stats.c | 1 + drivers/gpu/drm/xe/xe_gt_stats_types.h | 1 + drivers/gpu/drm/xe/xe_guc_fwif.h | 5 +++-- drivers/gpu/drm/xe/xe_guc_pagefault.c | 2 ++ drivers/gpu/drm/xe/xe_pagefault.c | 16 +++++++++++++--- drivers/gpu/drm/xe/xe_pagefault_types.h | 8 +++++++- 6 files changed, 27 insertions(+), 6 deletions(-) -- 2.43.0