From: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
To: intel-gfx@lists.freedesktop.org, intel-xe@lists.freedesktop.org
Cc: jouni.hogander@intel.com, ville.syrjala@linux.intel.com,
animesh.manna@intel.com, michal.grzelak@intel.com,
Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Subject: [RESEND 5/5] drm/i915/alpm: Disable LOBF around transitioning for LRR/seamless MN
Date: Wed, 4 Feb 2026 10:32:50 +0530 [thread overview]
Message-ID: <20260204050250.762718-6-ankit.k.nautiyal@intel.com> (raw)
In-Reply-To: <20260204050250.762718-1-ankit.k.nautiyal@intel.com>
When enabling LRR/seamless MN disable LOBF first and re-enable
afterwards.
- pre_plane_update: if LOBF was enabled, disable LOBF before the
update_lrr/update_m_n transition.
- post_plane_update: Re-enable LOBF after the transition.
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>
---
drivers/gpu/drm/i915/display/intel_display.c | 8 ++++++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
index 739a0a74e008..295f14416be7 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1014,7 +1014,9 @@ static bool intel_crtc_lobf_enabling(const struct intel_crtc_state *old_crtc_sta
if (!new_crtc_state->hw.active)
return false;
- return is_enabling(has_lobf, old_crtc_state, new_crtc_state);
+ return is_enabling(has_lobf, old_crtc_state, new_crtc_state) ||
+ (new_crtc_state->has_lobf &&
+ (new_crtc_state->update_lrr || new_crtc_state->update_m_n));
}
static bool intel_crtc_lobf_disabling(const struct intel_crtc_state *old_crtc_state,
@@ -1023,7 +1025,9 @@ static bool intel_crtc_lobf_disabling(const struct intel_crtc_state *old_crtc_st
if (!old_crtc_state->hw.active)
return false;
- return is_disabling(has_lobf, old_crtc_state, new_crtc_state);
+ return is_disabling(has_lobf, old_crtc_state, new_crtc_state) ||
+ (old_crtc_state->has_lobf &&
+ (new_crtc_state->update_lrr || new_crtc_state->update_m_n));
}
#undef is_disabling
--
2.45.2
next prev parent reply other threads:[~2026-02-04 5:18 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-04 5:02 [RESEND 0/5] LOBF fixes Ankit Nautiyal
2026-02-04 5:02 ` [RESEND 1/5] drm/i915/alpm: Compute LOBF late after guardband is already determined Ankit Nautiyal
2026-02-04 6:24 ` Hogander, Jouni
2026-02-04 5:02 ` [RESEND 2/5] drm/i915/alpm: Allow LOBF only if window1 > alpm check_entry lines Ankit Nautiyal
2026-02-04 5:02 ` [RESEND 3/5] drm/i915/alpm: Allow LOBF only for platform that have Always on VRR TG Ankit Nautiyal
2026-02-04 5:02 ` [RESEND 4/5] drm/i915/alpm: Simplify and align LOBF checks in pre/post plane update Ankit Nautiyal
2026-02-04 6:24 ` Hogander, Jouni
2026-02-04 5:02 ` Ankit Nautiyal [this message]
2026-02-04 5:26 ` ✓ CI.KUnit: success for LOBF fixes (rev5) Patchwork
2026-02-04 5:42 ` ✗ CI.checksparse: warning " Patchwork
2026-02-04 6:00 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-02-04 18:18 ` ✗ Xe.CI.FULL: " Patchwork
2026-02-04 19:09 ` ✓ CI.KUnit: success for LOBF fixes (rev6) Patchwork
2026-02-04 19:25 ` ✗ CI.checksparse: warning " Patchwork
2026-02-04 19:55 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-02-04 20:35 ` ✓ Xe.CI.BAT: success " Patchwork
2026-02-05 7:35 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-02-05 9:20 ` [RESEND 0/5] LOBF fixes Nautiyal, Ankit K
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