From: Julia Filipchuk <julia.filipchuk@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: Julia Filipchuk <julia.filipchuk@intel.com>
Subject: [PATCH v3 3/3] Revert "drm/xe/xe3p_xpc: Enable Indirect Ring State for xe3p_xpc"
Date: Fri, 6 Feb 2026 14:55:24 -0800 [thread overview]
Message-ID: <20260206225610.3232909-8-julia.filipchuk@intel.com> (raw)
In-Reply-To: <20260206225610.3232909-5-julia.filipchuk@intel.com>
This reverts commit 81e77c028848b7131d7653dd443a4049334a920b.
With indirect ring state now enabled for all XE2+ platforms this setting
is already set by XE2_GFX_FEATURES macro.
Signed-off-by: Julia Filipchuk <julia.filipchuk@intel.com>
---
drivers/gpu/drm/xe/xe_pci.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/xe_pci.c b/drivers/gpu/drm/xe/xe_pci.c
index 2b8d2a2e81d7..7dd50cabbb03 100644
--- a/drivers/gpu/drm/xe/xe_pci.c
+++ b/drivers/gpu/drm/xe/xe_pci.c
@@ -117,7 +117,6 @@ static const struct xe_graphics_desc graphics_xe2 = {
static const struct xe_graphics_desc graphics_xe3p_xpc = {
XE2_GFX_FEATURES,
- .has_indirect_ring_state = 1,
.hw_engine_mask =
GENMASK(XE_HW_ENGINE_BCS8, XE_HW_ENGINE_BCS1) |
GENMASK(XE_HW_ENGINE_CCS3, XE_HW_ENGINE_CCS0),
--
2.51.0
next prev parent reply other threads:[~2026-02-06 22:56 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-06 22:55 [PATCH v3 0/3] drm/xe: Enable Wa_14025515070, Enable indirect ring state for XE2+ Julia Filipchuk
2026-02-06 22:55 ` [PATCH v3 1/3] drm/xe: Enable Wa_14025515070 Julia Filipchuk
2026-02-13 0:14 ` Daniele Ceraolo Spurio
2026-02-06 22:55 ` [PATCH v3 2/3] Reapply "drm/xe/xe2: Enable Indirect Ring State support for Xe2" Julia Filipchuk
2026-02-06 22:55 ` Julia Filipchuk [this message]
2026-02-06 23:19 ` ✗ CI.checkpatch: warning for drm/xe: Enable Wa_14025515070, Enable indirect ring state for XE2+ (rev3) Patchwork
2026-02-06 23:21 ` ✓ CI.KUnit: success " Patchwork
2026-02-07 0:08 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-02-07 21:14 ` ✗ Xe.CI.FULL: " Patchwork
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