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From: Raag Jadav <raag.jadav@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: matthew.brost@intel.com, rodrigo.vivi@intel.com,
	riana.tauro@intel.com, michal.wajdeczko@intel.com,
	matthew.d.roper@intel.com, umesh.nerlige.ramappa@intel.com,
	mallesh.koujalagi@intel.com, soham.purkait@intel.com,
	anoop.c.vijay@intel.com, Raag Jadav <raag.jadav@intel.com>
Subject: [PATCH v2 2/4] drm/xe/sysctrl: Add system controller interrupt handler
Date: Fri, 13 Feb 2026 13:46:00 +0530	[thread overview]
Message-ID: <20260213081644.2085314-3-raag.jadav@intel.com> (raw)
In-Reply-To: <20260213081644.2085314-1-raag.jadav@intel.com>

Add system controller interrupt handler which is denoted by 11th bit in
GFX master interrupt register. While at it, add worker for scheduling
system controller work.

v2: Use system_percpu_wq instead of dedicated (Matthew Brost)

Co-developed-by: Soham Purkait <soham.purkait@intel.com>
Signed-off-by: Soham Purkait <soham.purkait@intel.com>
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
---
 drivers/gpu/drm/xe/regs/xe_irq_regs.h |  1 +
 drivers/gpu/drm/xe/xe_irq.c           |  2 ++
 drivers/gpu/drm/xe/xe_sysctrl.c       | 39 ++++++++++++++++++++++-----
 drivers/gpu/drm/xe/xe_sysctrl.h       |  3 +++
 drivers/gpu/drm/xe/xe_sysctrl_types.h |  7 +++++
 5 files changed, 45 insertions(+), 7 deletions(-)

diff --git a/drivers/gpu/drm/xe/regs/xe_irq_regs.h b/drivers/gpu/drm/xe/regs/xe_irq_regs.h
index 9d74f454d3ff..1d6b976c4de0 100644
--- a/drivers/gpu/drm/xe/regs/xe_irq_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_irq_regs.h
@@ -22,6 +22,7 @@
 #define   DISPLAY_IRQ				REG_BIT(16)
 #define   SOC_H2DMEMINT_IRQ			REG_BIT(13)
 #define   I2C_IRQ				REG_BIT(12)
+#define   SYSCTRL_IRQ				REG_BIT(11)
 #define   GT_DW_IRQ(x)				REG_BIT(x)
 
 /*
diff --git a/drivers/gpu/drm/xe/xe_irq.c b/drivers/gpu/drm/xe/xe_irq.c
index 7560a45f7f64..9e49e2241da4 100644
--- a/drivers/gpu/drm/xe/xe_irq.c
+++ b/drivers/gpu/drm/xe/xe_irq.c
@@ -24,6 +24,7 @@
 #include "xe_mmio.h"
 #include "xe_pxp.h"
 #include "xe_sriov.h"
+#include "xe_sysctrl.h"
 #include "xe_tile.h"
 
 /*
@@ -525,6 +526,7 @@ static irqreturn_t dg1_irq_handler(int irq, void *arg)
 				xe_heci_csc_irq_handler(xe, master_ctl);
 			xe_display_irq_handler(xe, master_ctl);
 			xe_i2c_irq_handler(xe, master_ctl);
+			xe_sysctrl_irq_handler(xe, master_ctl);
 			xe_mert_irq_handler(xe, master_ctl);
 			gu_misc_iir = gu_misc_irq_ack(xe, master_ctl);
 		}
diff --git a/drivers/gpu/drm/xe/xe_sysctrl.c b/drivers/gpu/drm/xe/xe_sysctrl.c
index 430bccbdc3b9..aba2166650aa 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl.c
+++ b/drivers/gpu/drm/xe/xe_sysctrl.c
@@ -7,6 +7,7 @@
 #include <linux/device.h>
 #include <linux/mutex.h>
 
+#include "regs/xe_irq_regs.h"
 #include "regs/xe_sysctrl_regs.h"
 #include "xe_device.h"
 #include "xe_mmio.h"
@@ -28,10 +29,16 @@
  * with the System Controller through the mailbox.
  */
 
+static void xe_sysctrl_work(struct work_struct *work)
+{
+}
+
 static void xe_sysctrl_fini(void *arg)
 {
 	struct xe_device *xe = arg;
+	struct xe_sysctrl *sc = &xe->sc;
 
+	cancel_work_sync(&sc->work);
 	xe->soc_remapper.set_sysctrl_region(xe, 0);
 }
 
@@ -56,12 +63,6 @@ int xe_sysctrl_init(struct xe_device *xe)
 	if (!xe->soc_remapper.set_sysctrl_region)
 		return -ENODEV;
 
-	xe->soc_remapper.set_sysctrl_region(xe, SYSCTRL_MAILBOX_INDEX);
-
-	ret = devm_add_action_or_reset(xe->drm.dev, xe_sysctrl_fini, xe);
-	if (ret)
-		return ret;
-
 	sc->mmio = devm_kzalloc(xe->drm.dev, sizeof(*sc->mmio), GFP_KERNEL);
 	if (!sc->mmio)
 		return -ENOMEM;
@@ -74,7 +75,31 @@ int xe_sysctrl_init(struct xe_device *xe)
 	if (ret)
 		return ret;
 
+	ret = drmm_mutex_init(&xe->drm, &sc->work_lock);
+	if (ret)
+		return ret;
+
+	xe->soc_remapper.set_sysctrl_region(xe, SYSCTRL_MAILBOX_INDEX);
 	xe_sysctrl_mailbox_init(sc);
+	INIT_WORK(&sc->work, xe_sysctrl_work);
 
-	return 0;
+	return devm_add_action_or_reset(xe->drm.dev, xe_sysctrl_fini, xe);
+}
+
+/**
+ * xe_sysctrl_irq_handler() - Handler for System Controller interrupts
+ * @xe: xe device instance
+ * @master_ctl: interrupt register
+ *
+ * Handle interrupts generated by System Controller.
+ */
+void xe_sysctrl_irq_handler(struct xe_device *xe, u32 master_ctl)
+{
+	struct xe_sysctrl *sc = &xe->sc;
+
+	if (!xe->info.has_sysctrl)
+		return;
+
+	if (master_ctl & SYSCTRL_IRQ)
+		schedule_work(&sc->work);
 }
diff --git a/drivers/gpu/drm/xe/xe_sysctrl.h b/drivers/gpu/drm/xe/xe_sysctrl.h
index ee7826fe4c98..5919310b9db9 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl.h
+++ b/drivers/gpu/drm/xe/xe_sysctrl.h
@@ -6,8 +6,11 @@
 #ifndef _XE_SYSCTRL_H_
 #define _XE_SYSCTRL_H_
 
+#include <linux/types.h>
+
 struct xe_device;
 
 int xe_sysctrl_init(struct xe_device *xe);
+void xe_sysctrl_irq_handler(struct xe_device *xe, u32 master_ctl);
 
 #endif /* _XE_SYSCTRL_H_ */
diff --git a/drivers/gpu/drm/xe/xe_sysctrl_types.h b/drivers/gpu/drm/xe/xe_sysctrl_types.h
index d4a362564925..bfaa9ad085ce 100644
--- a/drivers/gpu/drm/xe/xe_sysctrl_types.h
+++ b/drivers/gpu/drm/xe/xe_sysctrl_types.h
@@ -8,6 +8,7 @@
 
 #include <linux/mutex.h>
 #include <linux/types.h>
+#include <linux/workqueue_types.h>
 
 struct xe_mmio;
 
@@ -28,6 +29,12 @@ struct xe_sysctrl {
 	 * messages to help distinguish message boundaries.
 	 */
 	bool phase_bit;
+
+	/** @work: Pending events work */
+	struct work_struct work;
+
+	/** @work_lock: Mutex protecting pending events */
+	struct mutex work_lock;
 };
 
 #endif /* _XE_SYSCTRL_TYPES_H_ */
-- 
2.43.0


  parent reply	other threads:[~2026-02-13  8:18 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2026-02-13  8:15 [PATCH v2 0/4] Introduce Xe Correctable Error Handling Raag Jadav
2026-02-13  8:15 ` [PATCH v2 1/4] drm/xe/sysctrl: Add System Controller Raag Jadav
2026-02-13  8:16 ` Raag Jadav [this message]
2026-02-25 10:10   ` [PATCH v2 2/4] drm/xe/sysctrl: Add system controller interrupt handler Mallesh, Koujalagi
2026-02-27  5:12     ` Raag Jadav
2026-02-13  8:16 ` [PATCH v2 3/4] drm/xe/sysctrl: Add system controller event support Raag Jadav
2026-03-10  6:21   ` Mallesh, Koujalagi
2026-03-10  8:49     ` Raag Jadav
2026-02-13  8:16 ` [PATCH v2 4/4] drm/xe/ras: Introduce correctable error handling Raag Jadav
2026-03-10 10:18   ` Mallesh, Koujalagi
2026-03-10 12:12     ` Raag Jadav
2026-02-13  8:23 ` ✗ CI.checkpatch: warning for Introduce Xe Correctable Error Handling (rev2) Patchwork
2026-02-13  8:25 ` ✓ CI.KUnit: success " Patchwork
2026-02-13  9:40 ` ✓ Xe.CI.BAT: " Patchwork
2026-02-14  5:19 ` ✓ Xe.CI.FULL: " Patchwork

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