From: Raag Jadav <raag.jadav@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: matthew.brost@intel.com, rodrigo.vivi@intel.com,
riana.tauro@intel.com, michal.wajdeczko@intel.com,
matthew.d.roper@intel.com, umesh.nerlige.ramappa@intel.com,
mallesh.koujalagi@intel.com, Raag Jadav <raag.jadav@intel.com>
Subject: [PATCH v1 1/3] drm/xe/cri: Setup hardware error routing
Date: Tue, 17 Feb 2026 17:16:31 +0530 [thread overview]
Message-ID: <20260217114656.2546878-2-raag.jadav@intel.com> (raw)
In-Reply-To: <20260217114656.2546878-1-raag.jadav@intel.com>
Setup hardware error routing based on XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET
which will be used for debug cases on Crescent Island.
Signed-off-by: Raag Jadav <raag.jadav@intel.com>
---
drivers/gpu/drm/xe/regs/xe_hw_error_regs.h | 5 +++++
drivers/gpu/drm/xe/xe_hw_error.c | 22 +++++++++++++++++++++-
drivers/gpu/drm/xe/xe_hw_error.h | 1 +
3 files changed, 27 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/xe/regs/xe_hw_error_regs.h b/drivers/gpu/drm/xe/regs/xe_hw_error_regs.h
index c146b9ef44eb..88593f0a48fd 100644
--- a/drivers/gpu/drm/xe/regs/xe_hw_error_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_hw_error_regs.h
@@ -11,6 +11,11 @@
#define HEC_UNCORR_FW_ERR_DW0(base) XE_REG((base) + 0x124)
+#define DEV_ERR_ROUTING_CTRL XE_REG(0x100170)
+#define FATAL_ERR_ROUTING BIT(2)
+#define NONFATAL_ERR_ROUTING BIT(1)
+#define CORR_ERR_ROUTING BIT(0)
+
#define DEV_ERR_STAT_NONFATAL 0x100178
#define DEV_ERR_STAT_CORRECTABLE 0x10017c
#define DEV_ERR_STAT_REG(x) XE_REG(_PICK_EVEN((x), \
diff --git a/drivers/gpu/drm/xe/xe_hw_error.c b/drivers/gpu/drm/xe/xe_hw_error.c
index 8c65291f36fc..eb557266d083 100644
--- a/drivers/gpu/drm/xe/xe_hw_error.c
+++ b/drivers/gpu/drm/xe/xe_hw_error.c
@@ -146,6 +146,23 @@ void xe_hw_error_irq_handler(struct xe_tile *tile, const u32 master_ctl)
hw_error_source_handler(tile, hw_err);
}
+/**
+ * xe_hw_error_irq_route - irq routing of hw errors
+ * @xe: xe device instance
+ *
+ * Set irq routing of hw errors.
+ */
+void xe_hw_error_irq_route(struct xe_device *xe)
+{
+ u32 mask = CORR_ERR_ROUTING | NONFATAL_ERR_ROUTING | FATAL_ERR_ROUTING;
+ bool irq = xe->wedged.mode == XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET;
+ struct xe_tile *tile;
+ u8 id;
+
+ for_each_tile(tile, xe, id)
+ xe_mmio_rmw32(&tile->mmio, DEV_ERR_ROUTING_CTRL, mask, irq ? mask : 0);
+}
+
/*
* Process hardware errors during boot
*/
@@ -178,5 +195,8 @@ void xe_hw_error_init(struct xe_device *xe)
INIT_WORK(&tile->csc_hw_error_work, csc_hw_error_work);
- process_hw_errors(xe);
+ if (xe->info.platform == XE_CRESCENTISLAND)
+ xe_hw_error_irq_route(xe);
+ else
+ process_hw_errors(xe);
}
diff --git a/drivers/gpu/drm/xe/xe_hw_error.h b/drivers/gpu/drm/xe/xe_hw_error.h
index d86e28c5180c..8f155b66b5f1 100644
--- a/drivers/gpu/drm/xe/xe_hw_error.h
+++ b/drivers/gpu/drm/xe/xe_hw_error.h
@@ -11,5 +11,6 @@ struct xe_tile;
struct xe_device;
void xe_hw_error_irq_handler(struct xe_tile *tile, const u32 master_ctl);
+void xe_hw_error_irq_route(struct xe_device *xe);
void xe_hw_error_init(struct xe_device *xe);
#endif
--
2.43.0
next prev parent reply other threads:[~2026-02-17 11:51 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-17 11:46 [PATCH v1 0/3] Hardware Error handling for Crescent Island Raag Jadav
2026-02-17 11:46 ` Raag Jadav [this message]
2026-02-17 21:47 ` [PATCH v1 1/3] drm/xe/cri: Setup hardware error routing Matt Roper
2026-02-19 8:36 ` Raag Jadav
2026-03-26 12:49 ` Mallesh, Koujalagi
2026-04-01 18:21 ` Raag Jadav
2026-02-17 11:46 ` [PATCH v1 2/3] drm/xe/hw_error: Reuse CSC worker for generic error handling Raag Jadav
2026-02-17 11:46 ` [PATCH v1 3/3] drm/xe/cri: Wedge the device on hardware error Raag Jadav
2026-02-17 22:10 ` Matt Roper
2026-02-17 12:42 ` ✓ CI.KUnit: success for Hardware Error handling for Crescent Island Patchwork
2026-02-17 13:52 ` ✗ Xe.CI.BAT: failure " Patchwork
2026-02-17 16:14 ` ✓ Xe.CI.FULL: success " Patchwork
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