From: Matt Roper <matthew.d.roper@intel.com>
To: intel-xe@lists.freedesktop.org
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>,
Ashutosh Dixit <ashutosh.dixit@intel.com>,
Harish Chegondi <harish.chegondi@intel.com>,
Matt Roper <matthew.d.roper@intel.com>
Subject: [PATCH v4 0/4] Add debugfs facility to catch RTP mistakes
Date: Wed, 18 Feb 2026 14:09:11 -0800 [thread overview]
Message-ID: <20260218-sr_verify-v4-0-35d6deeb3421@intel.com> (raw)
Unlike i915, Xe doesn't currently do any readback verification of
workaround/tuning settings that it tries to program. If an entry gets
placed on the wrong table, or applied to the wrong platform/IP, the
programming may be silently ineffective without anyone noticing.
i915's solution of doing verification at application time was
problematic because raising warnings during probe would be treated by CI
as a fatal problem and would prevent CI from even attempting any other
testing until the issue was dealt with. Let's avoid that with Xe and
instead perform the verification on-demand when a debugfs entry is read.
This makes it very easy to do verification at various times during
manual debugging. It should also be simply to wrap a dedicated IGT test
around the debugfs entry such that any unexpected failures are reported
against that one test rather than bringing down the entire CI system.
Note that verification of LRC programming is a bit more complicated than
verification of GT/engine programming since we can't just blindly read
the register values from the CPU and expect the RTP values to be in
effect. Applying LRC programming ensures that every GPU context created
should have the updated values in the LRC, and those values will get
loaded into the register when the hardware context switches to it.
However when no context is running on the hardware, the register values
may revert to their hardware defaults which do not have the programming
applied. Instead, we should verify LRC programming by parsing the
engine's 'default LRC' image and making sure the desired programming
appears somewhere in one of the MI_LOAD_REGISTER_IMM state emission
commands.
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Ashutosh Dixit <ashutosh.dixit@intel.com>
v2:
- Avoid processing RTP -> SR for gt/hwe lists in VF to ensure the
debugfs entry is safe to use in an SR-IOV VF. (Ashutosh)
- Add verification of LRC adjustments by searching engine type's
default LRC.
v3:
- Add missing checks to avoid SR-IOV VF processing of RTP -> SR in
hw_engine_setup_default_state() and
xe_reg_whitelist_process_engine().
v4:
- Add an extra parameter to xe_rtp_process_to_sr() to determine whether
the RTP -> sr processing should be performed for SR-IOV VF devices or
not, rather than adding the VF conditional checks to the callsites.
(Ashutosh)
- Fix a missing parameter to kerneldoc for xe_reg_sr_lrc_check.
Matt Roper (4):
drm/xe/reg_sr: Don't process gt/hwe lists in VF
drm/xe/reg_sr: Add debugfs to verify status of reg_sr programming
drm/xe: Add facility to lookup the value of a register in a default
LRC
drm/xe/reg_sr: Allow register_save_restore_check debugfs to verify LRC
values
drivers/gpu/drm/xe/xe_gt_debugfs.c | 26 ++++++++
drivers/gpu/drm/xe/xe_hw_engine.c | 3 +
drivers/gpu/drm/xe/xe_lrc.c | 96 +++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_lrc.h | 4 ++
drivers/gpu/drm/xe/xe_reg_sr.c | 71 +++++++++++++++++++-
drivers/gpu/drm/xe/xe_reg_sr.h | 7 ++
drivers/gpu/drm/xe/xe_reg_whitelist.c | 3 +
drivers/gpu/drm/xe/xe_tuning.c | 7 ++
drivers/gpu/drm/xe/xe_wa.c | 6 ++
9 files changed, 221 insertions(+), 2 deletions(-)
To: intel-xe@lists.freedesktop.org
--
2.53.0
---
Matt Roper (4):
drm/xe/reg_sr: Don't process gt/hwe lists in VF
drm/xe/reg_sr: Add debugfs to verify status of reg_sr programming
drm/xe: Add facility to lookup the value of a register in a default LRC
drm/xe/reg_sr: Allow register_save_restore_check debugfs to verify LRC values
drivers/gpu/drm/xe/tests/xe_rtp_test.c | 3 +-
drivers/gpu/drm/xe/xe_gt_debugfs.c | 26 +++++++++
drivers/gpu/drm/xe/xe_hw_engine.c | 6 ++-
drivers/gpu/drm/xe/xe_lrc.c | 96 ++++++++++++++++++++++++++++++++++
drivers/gpu/drm/xe/xe_lrc.h | 4 ++
drivers/gpu/drm/xe/xe_reg_sr.c | 72 ++++++++++++++++++++++++-
drivers/gpu/drm/xe/xe_reg_sr.h | 7 +++
drivers/gpu/drm/xe/xe_reg_whitelist.c | 2 +-
drivers/gpu/drm/xe/xe_rtp.c | 8 ++-
drivers/gpu/drm/xe/xe_rtp.h | 3 +-
drivers/gpu/drm/xe/xe_tuning.c | 9 ++--
drivers/gpu/drm/xe/xe_wa.c | 9 ++--
12 files changed, 231 insertions(+), 14 deletions(-)
---
base-commit: 7ee0795cb4f30c9ccc2b8a580faebcefbdf150c5
change-id: 20260218-sr_verify-78b230b10acf
Best regards,
--
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation
next reply other threads:[~2026-02-18 22:09 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-02-18 22:09 Matt Roper [this message]
2026-02-18 22:09 ` [PATCH v4 1/4] drm/xe/reg_sr: Don't process gt/hwe lists in VF Matt Roper
2026-02-18 22:55 ` Dixit, Ashutosh
2026-02-18 22:09 ` [PATCH v4 2/4] drm/xe/reg_sr: Add debugfs to verify status of reg_sr programming Matt Roper
2026-02-18 22:09 ` [PATCH v4 3/4] drm/xe: Add facility to lookup the value of a register in a default LRC Matt Roper
2026-02-19 2:23 ` Dixit, Ashutosh
2026-02-18 22:09 ` [PATCH v4 4/4] drm/xe/reg_sr: Allow register_save_restore_check debugfs to verify LRC values Matt Roper
2026-02-19 2:23 ` Dixit, Ashutosh
2026-02-18 22:52 ` ✓ CI.KUnit: success for Add debugfs facility to catch RTP mistakes (rev3) Patchwork
2026-02-18 23:28 ` ✓ Xe.CI.BAT: " Patchwork
2026-02-19 0:30 ` ✗ Xe.CI.FULL: failure " Patchwork
2026-02-19 15:36 ` Matt Roper
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