Re: [PATCH] drm/xe: restric multi-lrc to VCS/VECS engines

[Matt Roper <matthew.d.roper@intel.com>]

On Wed, Feb 18, 2026 at 05:50:33AM +0000, Xin Wang wrote:
> Remove multi-lrc support on non‑media engines for ModSched
> platforms, since GuC firmware no longer supports this and
> there’s no valid use case.
> 
> Signed-off-by: Xin Wang <x.wang@intel.com>

Ack on tightening our uapi checks here.  It was an oversight that this
restriction wasn't already in place since we usually try to avoid
allowing uapi cases that we have no userspace consumer for.  It's been
somewhat of a moot point until now since width > 1 requires multiple
engines of a given type and our currently supported platforms with
force_probe lifted simply don't have that:

 - There's never more than one RCS.
 - Our current platforms have 2 BCS engines, but only one is exposed to
   userspace.
 - All current Xe2/Xe3 platforms except BMG only have a single CCS
   engine.  BMG does have two CCS engines [although you need to adjust
   ccs_mode to see both of them], so technically someone could have
   tried to use this on BMG CCS, but I don't think there's any actual
   userspace that would try to do this aside from an IGT test that
   blindly creates exec_queues without paying attention to what the
   underlying engine type is.

But should we move this check higher in the function, before we ever
bother with a VM lookup?  Then we won't need to release the VM lock and
put the VM back.

Also, do we need the GRAPHICS_VER check?  While there may be more cases
of multiple engines of a type existing on Xe1 (e.g., multiple BCS
engines on PVC), there's still no expected uesrspace consumers.  Plus
Xe1 platforms aren't officially supported by this driver; if you
manually force Xe to load on those platforms you've already tainted the
kernel and all bets are off in general.


Matt

> ---
>  drivers/gpu/drm/xe/xe_exec_queue.c | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/drivers/gpu/drm/xe/xe_exec_queue.c b/drivers/gpu/drm/xe/xe_exec_queue.c
> index 66d0e10ee2c4..9f5e9d78c8c6 100644
> --- a/drivers/gpu/drm/xe/xe_exec_queue.c
> +++ b/drivers/gpu/drm/xe/xe_exec_queue.c
> @@ -1200,6 +1200,15 @@ int xe_exec_queue_create_ioctl(struct drm_device *dev, void *data,
>  			return -ENOENT;
>  		}
>  
> +		/* multi-lrc is only supported on VIDEO_DECODE and VIDEO_ENHANCE engines */
> +		if (XE_IOCTL_DBG(xe, args->width > 1 && GRAPHICS_VER(xe) > 20 &&
> +				 !(eci[0].engine_class == DRM_XE_ENGINE_CLASS_VIDEO_DECODE ||
> +				   eci[0].engine_class == DRM_XE_ENGINE_CLASS_VIDEO_ENHANCE))) {
> +			up_read(&vm->lock);
> +			xe_vm_put(vm);
> +			return -EOPNOTSUPP;
> +		}
> +
>  		/* SRIOV sched groups are not compatible with multi-lrc */
>  		if (XE_IOCTL_DBG(xe, args->width > 1 && has_sched_groups(hwe->gt))) {
>  			up_read(&vm->lock);
> -- 
> 2.43.0
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation